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fix span issue with really old ddx and non-tcl r100 chips

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This commit is contained in:
Roland Scheidegger 2008-10-16 16:23:47 +02:00
parent a7b24ac02f
commit 73e1193632
1 changed files with 1 additions and 1 deletions
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2
src/mesa/drivers/dri/radeon/radeon_screen.c
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@ -900,7 +900,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
screen->depthHasSurface = (sPriv->ddx_version.major > 4) ||
/* these chips don't use tiled z without hyperz. So always pretend
we have set up a surface which will cause linear reads/writes */
((screen->chip_family & RADEON_CLASS_R100) &&
(IS_R100_CLASS(screen) &&
!(screen->chip_flags & RADEON_CHIPSET_TCL));
if ( dri_priv->textureSize == 0 ) {