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pan/va: Rename LEA_ATTR to LEA_VARY

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This more accurately reflects the function of the instruction. Unlike
earlier Malis, there don't seem to be attribute records for varyings.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14292>
This commit is contained in:
Alyssa Rosenzweig 2021-12-07 19:02:50 -05:00 • committed by Marge Bot
parent 1e5a20a33b
commit 73d7a046ff
2 changed files with 5 additions and 5 deletions
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8
src/panfrost/bifrost/valhall/ISA.xml
View file

@ -522,7 +522,7 @@
<desc>Memory segment written to by a `STORE` instruction.</desc>
<value desc="Global or workgroup local memory" default="none">global</value>
<value desc="Position output (in a position shader)">pos</value>
<value desc="Varyings with LEA_ATTR computed addresses">vary</value>
<value desc="Varyings with LEA_VARY computed addresses">vary</value>
<value desc="Thread local storage">tl</value>
</enum>
@ -923,15 +923,15 @@
<src>Index</src>
</ins>
<ins name="LEA_ATTR" title="Load effective address" opcode="0x5E" unit="LS">
<ins name="LEA_VARY" title="Load varying effective address" opcode="0x5E" unit="LS">
<desc>
Loads the effective address of the position buffer (in a position shader)
or the varying buffer (in a varying shader). That is, the base pointer
plus the vertex's linear ID (the first source) times the buffer's
per-vertex stride. `LEA_ATTR` should be executed once in a
per-vertex stride. `LEA_VARY` should be executed once in a
position/varying shader, with the linear ID preloaded as `r59`. Each
position/varying store can then be constructed as `STORE` with the base
address sourced from the 64-bit destination of `LEA_ATTR` and an
address sourced from the 64-bit destination of `LEA_VARY` and an
appropriately computed offset. Varying stores bypass the usual conversion
hardware for attributes; this diverges from earlier Mali hardware.
</desc>

2
src/panfrost/bifrost/valhall/test/assembler-cases.txt
View file

@ -53,7 +53,7 @@ c0 00 00 00 00 f6 10 01 IADD_IMM.i32 r54, 0x0, #0x0
3c d0 ea 00 02 bc 7d 68 ATEST.td @r60, r60, 0x3F800000, atest_datum
40 db 05 04 00 c1 a1 00 MKVEC.v2i16 r1, `r0.h00, 0x3C000000.h10
f0 00 3c 33 04 40 7f 78 BLEND.slot0.v4.f16.return @r0:r1, @r60, blend_descriptor_0_x, target:0x0
7b 0d 00 40 04 84 5e 08 LEA_ATTR.slot1.wait0 @r4:r5, `r59, unk:0xD
7b 0d 00 40 04 84 5e 08 LEA_VARY.slot1.wait0 @r4:r5, `r59, unk:0xD
00 dd c0 08 14 c2 b2 00 FMA.f32 r2, r0, 0x44000000.neg.h1, 0x0.neg
41 88 c0 00 04 c1 b2 00 FMA.f32 r1, `r1, u8, 0x0.neg
40 88 c0 00 04 c0 b2 10 FMA.f32.wait1 r0, `r0, u8, 0x0.neg