From 736834931bb2e72a3bb9f25c507eb654e5c1b66e Mon Sep 17 00:00:00 2001 From: Witold Baryluk Date: Thu, 28 Jan 2021 17:52:06 +0000 Subject: [PATCH] radv: memset the alignment hole in cache_entry to 0 Detected using valgrind. Otherwise these bytes at the end will be touched by zstd compression, spamming valgrind output. Other option is to do full memset(entry, 0, size), but that is somehow unnecessary and suboptimal. Reviewed-by: Bas Nieuwenhuizen Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_pipeline_cache.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_pipeline_cache.c b/src/amd/vulkan/radv_pipeline_cache.c index 9062d5611f6..5345083d263 100644 --- a/src/amd/vulkan/radv_pipeline_cache.c +++ b/src/amd/vulkan/radv_pipeline_cache.c @@ -393,8 +393,8 @@ radv_pipeline_cache_insert_shaders(struct radv_device *device, for (int i = 0; i < MESA_SHADER_STAGES; ++i) if (variants[i]) size += binaries[i]->total_size; - size = align(size, alignof(struct cache_entry)); - + const size_t size_without_align = size; + size = align(size_without_align, alignof(struct cache_entry)); entry = vk_alloc(&cache->alloc, size, 8, VK_SYSTEM_ALLOCATION_SCOPE_CACHE); @@ -418,6 +418,11 @@ radv_pipeline_cache_insert_shaders(struct radv_device *device, p += binaries[i]->total_size; } + // Make valgrind happy by filling the alignment hole at the end. + assert((void*)p == (void*)entry + size_without_align); + assert(sizeof(*entry) + ((void*)p - (void*)entry->code) == size_without_align); + memset((void*)entry + size_without_align, 0, size - size_without_align); + /* Always add cache items to disk. This will allow collection of * compiled shaders by third parties such as steam, even if the app * implements its own pipeline cache.