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etnaviv: move etna_layout_multiple into etnaviv_resource.c

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The call sites of this function make a number of adjustments to the
padding/alignment returned by this function, which are inconsistent
and still don't cover all necessary cases. To be able to extend this
function move it out of the header and make the parameters passed
more useful by providing all necessary information at once.

No functional change, just a preparation for the following changes.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19066>
This commit is contained in:
Lucas Stach 2022-10-13 18:28:33 +02:00 • committed by Marge Bot
parent 93fb84237f
commit 735718ed33
2 changed files with 46 additions and 61 deletions
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60
src/gallium/drivers/etnaviv/etnaviv_resource.c
View file

@ -190,13 +190,51 @@ setup_miptree(struct etna_resource *rsc, unsigned paddingX, unsigned paddingY,
return size;
}
/* Is rs alignment needed? */
static bool is_rs_align(struct etna_screen *screen,
const struct pipe_resource *tmpl)
/* Compute the slice/miplevel alignment (in pixels) and the texture sampler
* HALIGN parameter from the resource parameters and the target layout.
*/
static void
etna_layout_multiple(const struct etna_screen *screen,
const struct pipe_resource *templat, unsigned layout,
unsigned *paddingX, unsigned *paddingY, unsigned *halign)
{
return screen->specs.use_blt ? false : (
VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
!etna_resource_sampler_only(tmpl));
const struct etna_specs *specs = &screen->specs;
/* If we have the TEXTURE_HALIGN feature, we can always align to the resolve
* engine's width. If not, we must not align resources used only for
* textures. If this GPU uses the BLT engine, never do RS align.
*/
bool rs_align = !specs->use_blt && !etna_resource_sampler_only(templat) &&
VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN);
switch (layout) {
case ETNA_LAYOUT_LINEAR:
*paddingX = rs_align ? 16 : 4;
*paddingY = 1;
*halign = rs_align ? TEXTURE_HALIGN_SIXTEEN : TEXTURE_HALIGN_FOUR;
break;
case ETNA_LAYOUT_TILED:
*paddingX = rs_align ? 16 : 4;
*paddingY = 4;
*halign = rs_align ? TEXTURE_HALIGN_SIXTEEN : TEXTURE_HALIGN_FOUR;
break;
case ETNA_LAYOUT_SUPER_TILED:
*paddingX = 64;
*paddingY = 64;
*halign = TEXTURE_HALIGN_SUPER_TILED;
break;
case ETNA_LAYOUT_MULTI_TILED:
*paddingX = 16;
*paddingY = 4 * specs->pixel_pipes;
*halign = TEXTURE_HALIGN_SPLIT_TILED;
break;
case ETNA_LAYOUT_MULTI_SUPERTILED:
*paddingX = 64;
*paddingY = 64 * specs->pixel_pipes;
*halign = TEXTURE_HALIGN_SPLIT_SUPER_TILED;
break;
default:
DBG("Unhandled layout %i", layout);
}
}
/* Create a new resource object, using the given template info */
@ -236,12 +274,7 @@ etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
unsigned paddingX = 0, paddingY = 0;
unsigned halign = TEXTURE_HALIGN_FOUR;
if (!util_format_is_compressed(templat->format)) {
/* If we have the TEXTURE_HALIGN feature, we can always align to the
* resolve engine's width. If not, we must not align resources used
* only for textures. If this GPU uses the BLT engine, never do RS align.
*/
etna_layout_multiple(layout, screen->specs.pixel_pipes,
is_rs_align (screen, templat),
etna_layout_multiple(screen, templat, layout,
&paddingX, &paddingY, &halign);
assert(paddingX && paddingY);
} else {
@ -511,8 +544,7 @@ etna_resource_from_handle(struct pipe_screen *pscreen,
/* Determine padding of the imported resource. */
unsigned paddingX = 0, paddingY = 0;
etna_layout_multiple(rsc->layout, screen->specs.pixel_pipes,
is_rs_align(screen, tmpl),
etna_layout_multiple(screen, tmpl, rsc->layout,
&paddingX, &paddingY, &rsc->halign);
if (!screen->specs.use_blt && rsc->layout == ETNA_LAYOUT_LINEAR)

47
src/gallium/drivers/etnaviv/etnaviv_translate.h
View file

@ -348,53 +348,6 @@ translate_draw_mode(unsigned mode)
}
}
/* Get size multiple for size of texture/rendertarget with a certain layout
* This is affected by many different parameters:
* - A horizontal multiple of 16 is used when possible as resolve can be used
* at the cost of only a little bit extra memory usage.
* - If the surface is to be used with the resolve engine, set rs_align true.
* If set, a horizontal multiple of 16 will be used for tiled and linear,
* otherwise one of 16. However, such a surface will be incompatible
* with the samplers if the GPU does hot support the HALIGN feature.
* - If the surface is supertiled, horizontal and vertical multiple is always 64
* - If the surface is multi tiled or supertiled, make sure that the vertical size
* is a multiple of the number of pixel pipes as well.
* */
static inline void
etna_layout_multiple(unsigned layout, unsigned pixel_pipes, bool rs_align,
unsigned *paddingX, unsigned *paddingY, unsigned *halign)
{
switch (layout) {
case ETNA_LAYOUT_LINEAR:
*paddingX = rs_align ? 16 : 4;
*paddingY = 1;
*halign = rs_align ? TEXTURE_HALIGN_SIXTEEN : TEXTURE_HALIGN_FOUR;
break;
case ETNA_LAYOUT_TILED:
*paddingX = rs_align ? 16 : 4;
*paddingY = 4;
*halign = rs_align ? TEXTURE_HALIGN_SIXTEEN : TEXTURE_HALIGN_FOUR;
break;
case ETNA_LAYOUT_SUPER_TILED:
*paddingX = 64;
*paddingY = 64;
*halign = TEXTURE_HALIGN_SUPER_TILED;
break;
case ETNA_LAYOUT_MULTI_TILED:
*paddingX = 16;
*paddingY = 4 * pixel_pipes;
*halign = TEXTURE_HALIGN_SPLIT_TILED;
break;
case ETNA_LAYOUT_MULTI_SUPERTILED:
*paddingX = 64;
*paddingY = 64 * pixel_pipes;
*halign = TEXTURE_HALIGN_SPLIT_SUPER_TILED;
break;
default:
DBG("Unhandled layout %i", layout);
}
}
static inline uint32_t
translate_clear_depth_stencil(enum pipe_format format, float depth,
unsigned stencil)