From 7343aff8aa7bb9a4b948abe7a8bf90fef747e1ff Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Fri, 6 Mar 2026 16:24:30 +0100 Subject: [PATCH] radv: fix missing HTILE decompression with separate depth/stencil layouts These two layouts mean either the depth or the stencil aspect is compressed. Without TC-compat HTILE (mostly < GFX8), the driver must expand HTILE. This prevents regressions with Vulkan runtime code using separate depth/stencil layouts by default. Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_image.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 917ab432ae1..285c4b8c7d9 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -1598,6 +1598,8 @@ radv_layout_is_htile_compressed(const struct radv_device *device, const struct r case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL: case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL: case VK_IMAGE_LAYOUT_ATTACHMENT_OPTIMAL: + case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL: + case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL: return radv_htile_enabled(image, level); case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL: return radv_tc_compat_htile_enabled(image, level) ||