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radv: fix missing HTILE decompression with separate depth/stencil layouts

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These two layouts mean either the depth or the stencil aspect is
compressed. Without TC-compat HTILE (mostly < GFX8), the driver must
expand HTILE.

This prevents regressions with Vulkan runtime code using separate
depth/stencil layouts by default.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40154>
This commit is contained in:
Samuel Pitoiset 2026-03-06 16:24:30 +01:00 • committed by Marge Bot
parent 5192ee3c88
commit 7343aff8aa
1 changed files with 2 additions and 0 deletions
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2
src/amd/vulkan/radv_image.c
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@ -1598,6 +1598,8 @@ radv_layout_is_htile_compressed(const struct radv_device *device, const struct r
case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL:
case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL:
case VK_IMAGE_LAYOUT_ATTACHMENT_OPTIMAL:
case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL:
case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL:
return radv_htile_enabled(image, level);
case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
return radv_tc_compat_htile_enabled(image, level) ||