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mesa/st: glsl_to_tgsi move some helper classes to extra files

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To prepare the implementation of a temp register lifetime tracker
some of the classes are moved into seperate header/implementation
files to make them accessible from other files.

Specifically these are:

    class st_src_reg;
    class st_dst_reg;
    class glsl_to_tgsi_instruction;
    struct rename_reg_pair;

    int swizzle_for_type(const glsl_type *type, int component);

  as inline:

    bool is_resource_instruction(unsigned opcode);
    unsigned num_inst_dst_regs(const glsl_to_tgsi_instruction *op);
    unsigned num_inst_src_regs(const glsl_to_tgsi_instruction *op);

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Gert Wollny 2017-06-21 10:05:23 +02:00 • committed by Nicolai Hähnle
parent b65ff7a02d
commit 732246701f
4 changed files with 368 additions and 287 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/mesa/Makefile.sources
View file

@ -511,6 +511,8 @@ STATETRACKER_FILES = \
state_tracker/st_glsl_to_nir.cpp \
state_tracker/st_glsl_to_tgsi.cpp \
state_tracker/st_glsl_to_tgsi.h \
state_tracker/st_glsl_to_tgsi_private.cpp \
state_tracker/st_glsl_to_tgsi_private.h \
state_tracker/st_glsl_types.cpp \
state_tracker/st_glsl_types.h \
state_tracker/st_manager.c \

289
src/mesa/state_tracker/st_glsl_to_tgsi.cpp
View file

@ -55,6 +55,7 @@
#include "st_format.h"
#include "st_nir.h"
#include "st_shader_cache.h"
#include "st_glsl_to_tgsi_private.h"
#include "util/hash_table.h"
#include <algorithm>
@ -65,28 +66,6 @@
#define MAX_GLSL_TEXTURE_OFFSET 4
class st_src_reg;
class st_dst_reg;
static int swizzle_for_size(int size);
static int swizzle_for_type(const glsl_type *type, int component = 0)
{
unsigned num_elements = 4;
if (type) {
type = type->without_array();
if (type->is_scalar() || type->is_vector() || type->is_matrix())
num_elements = type->vector_elements;
}
int swizzle = swizzle_for_size(num_elements);
assert(num_elements + component <= 4);
swizzle += component * MAKE_SWIZZLE4(1, 1, 1, 1);
return swizzle;
}
static unsigned is_precise(const ir_variable *ir)
{
if (!ir)
@ -94,231 +73,6 @@ static unsigned is_precise(const ir_variable *ir)
return ir->data.precise || ir->data.invariant;
}
/**
* This struct is a corresponding struct to TGSI ureg_src.
*/
class st_src_reg {
public:
st_src_reg(gl_register_file file, int index, const glsl_type *type,
int component = 0, unsigned array_id = 0)
{
assert(file != PROGRAM_ARRAY || array_id != 0);
this->file = file;
this->index = index;
this->swizzle = swizzle_for_type(type, component);
this->negate = 0;
this->abs = 0;
this->index2D = 0;
this->type = type ? type->base_type : GLSL_TYPE_ERROR;
this->reladdr = NULL;
this->reladdr2 = NULL;
this->has_index2 = false;
this->double_reg2 = false;
this->array_id = array_id;
this->is_double_vertex_input = false;
}
st_src_reg(gl_register_file file, int index, enum glsl_base_type type)
{
assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
this->type = type;
this->file = file;
this->index = index;
this->index2D = 0;
this->swizzle = SWIZZLE_XYZW;
this->negate = 0;
this->abs = 0;
this->reladdr = NULL;
this->reladdr2 = NULL;
this->has_index2 = false;
this->double_reg2 = false;
this->array_id = 0;
this->is_double_vertex_input = false;
}
st_src_reg(gl_register_file file, int index, enum glsl_base_type type, int index2D)
{
assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
this->type = type;
this->file = file;
this->index = index;
this->index2D = index2D;
this->swizzle = SWIZZLE_XYZW;
this->negate = 0;
this->abs = 0;
this->reladdr = NULL;
this->reladdr2 = NULL;
this->has_index2 = false;
this->double_reg2 = false;
this->array_id = 0;
this->is_double_vertex_input = false;
}
st_src_reg()
{
this->type = GLSL_TYPE_ERROR;
this->file = PROGRAM_UNDEFINED;
this->index = 0;
this->index2D = 0;
this->swizzle = 0;
this->negate = 0;
this->abs = 0;
this->reladdr = NULL;
this->reladdr2 = NULL;
this->has_index2 = false;
this->double_reg2 = false;
this->array_id = 0;
this->is_double_vertex_input = false;
}
explicit st_src_reg(st_dst_reg reg);
int32_t index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
int16_t index2D;
uint16_t swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
int negate:4; /**< NEGATE_XYZW mask from mesa */
unsigned abs:1;
enum glsl_base_type type:5; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
unsigned has_index2:1;
gl_register_file file:5; /**< PROGRAM_* from Mesa */
/*
* Is this the second half of a double register pair?
* currently used for input mapping only.
*/
unsigned double_reg2:1;
unsigned is_double_vertex_input:1;
unsigned array_id:10;
/** Register index should be offset by the integer in this reg. */
st_src_reg *reladdr;
st_src_reg *reladdr2;
st_src_reg get_abs()
{
st_src_reg reg = *this;
reg.negate = 0;
reg.abs = 1;
return reg;
}
};
class st_dst_reg {
public:
st_dst_reg(gl_register_file file, int writemask, enum glsl_base_type type, int index)
{
assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
this->file = file;
this->index = index;
this->index2D = 0;
this->writemask = writemask;
this->reladdr = NULL;
this->reladdr2 = NULL;
this->has_index2 = false;
this->type = type;
this->array_id = 0;
}
st_dst_reg(gl_register_file file, int writemask, enum glsl_base_type type)
{
assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
this->file = file;
this->index = 0;
this->index2D = 0;
this->writemask = writemask;
this->reladdr = NULL;
this->reladdr2 = NULL;
this->has_index2 = false;
this->type = type;
this->array_id = 0;
}
st_dst_reg()
{
this->type = GLSL_TYPE_ERROR;
this->file = PROGRAM_UNDEFINED;
this->index = 0;
this->index2D = 0;
this->writemask = 0;
this->reladdr = NULL;
this->reladdr2 = NULL;
this->has_index2 = false;
this->array_id = 0;
}
explicit st_dst_reg(st_src_reg reg);
int32_t index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
int16_t index2D;
gl_register_file file:5; /**< PROGRAM_* from Mesa */
unsigned writemask:4; /**< Bitfield of WRITEMASK_[XYZW] */
enum glsl_base_type type:5; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
unsigned has_index2:1;
unsigned array_id:10;
/** Register index should be offset by the integer in this reg. */
st_src_reg *reladdr;
st_src_reg *reladdr2;
};
st_src_reg::st_src_reg(st_dst_reg reg)
{
this->type = reg.type;
this->file = reg.file;
this->index = reg.index;
this->swizzle = SWIZZLE_XYZW;
this->negate = 0;
this->abs = 0;
this->reladdr = reg.reladdr;
this->index2D = reg.index2D;
this->reladdr2 = reg.reladdr2;
this->has_index2 = reg.has_index2;
this->double_reg2 = false;
this->array_id = reg.array_id;
this->is_double_vertex_input = false;
}
st_dst_reg::st_dst_reg(st_src_reg reg)
{
this->type = reg.type;
this->file = reg.file;
this->index = reg.index;
this->writemask = WRITEMASK_XYZW;
this->reladdr = reg.reladdr;
this->index2D = reg.index2D;
this->reladdr2 = reg.reladdr2;
this->has_index2 = reg.has_index2;
this->array_id = reg.array_id;
}
class glsl_to_tgsi_instruction : public exec_node {
public:
DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction)
st_dst_reg dst[2];
st_src_reg src[4];
st_src_reg resource; /**< sampler, image or buffer register */
st_src_reg *tex_offsets;
/** Pointer to the ir source this tree came from for debugging */
ir_instruction *ir;
unsigned op:8; /**< TGSI opcode */
unsigned precise:1;
unsigned saturate:1;
unsigned is_64bit_expanded:1;
unsigned sampler_base:5;
unsigned sampler_array_size:6; /**< 1-based size of sampler array, 1 if not array */
unsigned tex_target:4; /**< One of TEXTURE_*_INDEX */
glsl_base_type tex_type:5;
unsigned tex_shadow:1;
unsigned image_format:9;
unsigned tex_offset_num_offset:3;
unsigned dead_mask:4; /**< Used in dead code elimination */
unsigned buffer_access:3; /**< buffer access type */
const struct tgsi_opcode_info *info;
};
class variable_storage {
DECLARE_RZALLOC_CXX_OPERATORS(variable_storage)
@ -398,11 +152,6 @@ find_array_type(struct inout_decl *decls, unsigned count, unsigned array_id)
return GLSL_TYPE_ERROR;
}
struct rename_reg_pair {
bool valid;
int new_reg;
};
struct glsl_to_tgsi_visitor : public ir_visitor {
public:
glsl_to_tgsi_visitor();
@ -606,7 +355,7 @@ fail_link(struct gl_shader_program *prog, const char *fmt, ...)
prog->data->LinkStatus = linking_failure;
}
static int
int
swizzle_for_size(int size)
{
static const int size_swizzles[4] = {
@ -620,40 +369,6 @@ swizzle_for_size(int size)
return size_swizzles[size - 1];
}
static bool
is_resource_instruction(unsigned opcode)
{
switch (opcode) {
case TGSI_OPCODE_RESQ:
case TGSI_OPCODE_LOAD:
case TGSI_OPCODE_ATOMUADD:
case TGSI_OPCODE_ATOMXCHG:
case TGSI_OPCODE_ATOMCAS:
case TGSI_OPCODE_ATOMAND:
case TGSI_OPCODE_ATOMOR:
case TGSI_OPCODE_ATOMXOR:
case TGSI_OPCODE_ATOMUMIN:
case TGSI_OPCODE_ATOMUMAX:
case TGSI_OPCODE_ATOMIMIN:
case TGSI_OPCODE_ATOMIMAX:
return true;
default:
return false;
}
}
static unsigned
num_inst_dst_regs(const glsl_to_tgsi_instruction *op)
{
return op->info->num_dst;
}
static unsigned
num_inst_src_regs(const glsl_to_tgsi_instruction *op)
{
return op->info->is_tex || is_resource_instruction(op->op) ?
op->info->num_src - 1 : op->info->num_src;
}
glsl_to_tgsi_instruction *
glsl_to_tgsi_visitor::emit_asm(ir_instruction *ir, unsigned op,

196
src/mesa/state_tracker/st_glsl_to_tgsi_private.cpp Normal file
View file

@ -0,0 +1,196 @@
/*
* Copyright © 2010 Intel Corporation
* Copyright © 2011 Bryan Cain
* Copyright © 2017 Gert Wollny
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#include "st_glsl_to_tgsi_private.h"
#include <tgsi/tgsi_info.h>
#include <mesa/program/prog_instruction.h>
static int swizzle_for_type(const glsl_type *type, int component = 0)
{
unsigned num_elements = 4;
if (type) {
type = type->without_array();
if (type->is_scalar() || type->is_vector() || type->is_matrix())
num_elements = type->vector_elements;
}
int swizzle = swizzle_for_size(num_elements);
assert(num_elements + component <= 4);
swizzle += component * MAKE_SWIZZLE4(1, 1, 1, 1);
return swizzle;
}
st_src_reg::st_src_reg(gl_register_file file, int index, const glsl_type *type,
int component, unsigned array_id)
{
assert(file != PROGRAM_ARRAY || array_id != 0);
this->file = file;
this->index = index;
this->swizzle = swizzle_for_type(type, component);
this->negate = 0;
this->abs = 0;
this->index2D = 0;
this->type = type ? type->base_type : GLSL_TYPE_ERROR;
this->reladdr = NULL;
this->reladdr2 = NULL;
this->has_index2 = false;
this->double_reg2 = false;
this->array_id = array_id;
this->is_double_vertex_input = false;
}
st_src_reg::st_src_reg(gl_register_file file, int index, enum glsl_base_type type)
{
assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
this->type = type;
this->file = file;
this->index = index;
this->index2D = 0;
this->swizzle = SWIZZLE_XYZW;
this->negate = 0;
this->abs = 0;
this->reladdr = NULL;
this->reladdr2 = NULL;
this->has_index2 = false;
this->double_reg2 = false;
this->array_id = 0;
this->is_double_vertex_input = false;
}
st_src_reg::st_src_reg(gl_register_file file, int index, enum glsl_base_type type, int index2D)
{
assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
this->type = type;
this->file = file;
this->index = index;
this->index2D = index2D;
this->swizzle = SWIZZLE_XYZW;
this->negate = 0;
this->abs = 0;
this->reladdr = NULL;
this->reladdr2 = NULL;
this->has_index2 = false;
this->double_reg2 = false;
this->array_id = 0;
this->is_double_vertex_input = false;
}
st_src_reg::st_src_reg()
{
this->type = GLSL_TYPE_ERROR;
this->file = PROGRAM_UNDEFINED;
this->index = 0;
this->index2D = 0;
this->swizzle = 0;
this->negate = 0;
this->abs = 0;
this->reladdr = NULL;
this->reladdr2 = NULL;
this->has_index2 = false;
this->double_reg2 = false;
this->array_id = 0;
this->is_double_vertex_input = false;
}
st_src_reg::st_src_reg(st_dst_reg reg)
{
this->type = reg.type;
this->file = reg.file;
this->index = reg.index;
this->swizzle = SWIZZLE_XYZW;
this->negate = 0;
this->abs = 0;
this->reladdr = reg.reladdr;
this->index2D = reg.index2D;
this->reladdr2 = reg.reladdr2;
this->has_index2 = reg.has_index2;
this->double_reg2 = false;
this->array_id = reg.array_id;
this->is_double_vertex_input = false;
}
st_src_reg st_src_reg::get_abs()
{
st_src_reg reg = *this;
reg.negate = 0;
reg.abs = 1;
return reg;
}
st_dst_reg::st_dst_reg(st_src_reg reg)
{
this->type = reg.type;
this->file = reg.file;
this->index = reg.index;
this->writemask = WRITEMASK_XYZW;
this->reladdr = reg.reladdr;
this->index2D = reg.index2D;
this->reladdr2 = reg.reladdr2;
this->has_index2 = reg.has_index2;
this->array_id = reg.array_id;
}
st_dst_reg::st_dst_reg(gl_register_file file, int writemask, enum glsl_base_type type, int index)
{
assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
this->file = file;
this->index = index;
this->index2D = 0;
this->writemask = writemask;
this->reladdr = NULL;
this->reladdr2 = NULL;
this->has_index2 = false;
this->type = type;
this->array_id = 0;
}
st_dst_reg::st_dst_reg(gl_register_file file, int writemask, enum glsl_base_type type)
{
assert(file != PROGRAM_ARRAY); /* need array_id > 0 */
this->file = file;
this->index = 0;
this->index2D = 0;
this->writemask = writemask;
this->reladdr = NULL;
this->reladdr2 = NULL;
this->has_index2 = false;
this->type = type;
this->array_id = 0;
}
st_dst_reg::st_dst_reg()
{
this->type = GLSL_TYPE_ERROR;
this->file = PROGRAM_UNDEFINED;
this->index = 0;
this->index2D = 0;
this->writemask = 0;
this->reladdr = NULL;
this->reladdr2 = NULL;
this->has_index2 = false;
this->array_id = 0;
}

168
src/mesa/state_tracker/st_glsl_to_tgsi_private.h Normal file
View file

@ -0,0 +1,168 @@
/*
* Copyright © 2010 Intel Corporation
* Copyright © 2011 Bryan Cain
* Copyright © 2017 Gert Wollny
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef ST_GLSL_TO_TGSI_PRIVATE_H
#define ST_GLSL_TO_TGSI_PRIVATE_H
#include <mesa/main/mtypes.h>
#include <compiler/glsl_types.h>
#include <compiler/glsl/ir.h>
#include <tgsi/tgsi_info.h>
int swizzle_for_size(int size);
class st_dst_reg;
/**
* This struct is a corresponding struct to TGSI ureg_src.
*/
class st_src_reg {
public:
st_src_reg(gl_register_file file, int index, const glsl_type *type,
int component = 0, unsigned array_id = 0);
st_src_reg(gl_register_file file, int index, enum glsl_base_type type);
st_src_reg(gl_register_file file, int index, enum glsl_base_type type, int index2D);
st_src_reg();
explicit st_src_reg(st_dst_reg reg);
st_src_reg get_abs();
int32_t index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
int16_t index2D;
uint16_t swizzle; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
int negate:4; /**< NEGATE_XYZW mask from mesa */
unsigned abs:1;
enum glsl_base_type type:5; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
unsigned has_index2:1;
gl_register_file file:5; /**< PROGRAM_* from Mesa */
/*
* Is this the second half of a double register pair?
* currently used for input mapping only.
*/
unsigned double_reg2:1;
unsigned is_double_vertex_input:1;
unsigned array_id:10;
/** Register index should be offset by the integer in this reg. */
st_src_reg *reladdr;
st_src_reg *reladdr2;
};
class st_dst_reg {
public:
st_dst_reg(gl_register_file file, int writemask, enum glsl_base_type type, int index);
st_dst_reg(gl_register_file file, int writemask, enum glsl_base_type type);
st_dst_reg();
explicit st_dst_reg(st_src_reg reg);
int32_t index; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
int16_t index2D;
gl_register_file file:5; /**< PROGRAM_* from Mesa */
unsigned writemask:4; /**< Bitfield of WRITEMASK_[XYZW] */
enum glsl_base_type type:5; /** GLSL_TYPE_* from GLSL IR (enum glsl_base_type) */
unsigned has_index2:1;
unsigned array_id:10;
/** Register index should be offset by the integer in this reg. */
st_src_reg *reladdr;
st_src_reg *reladdr2;
};
class glsl_to_tgsi_instruction : public exec_node {
public:
DECLARE_RALLOC_CXX_OPERATORS(glsl_to_tgsi_instruction)
st_dst_reg dst[2];
st_src_reg src[4];
st_src_reg resource; /**< sampler or buffer register */
st_src_reg *tex_offsets;
/** Pointer to the ir source this tree came fe02549fdrom for debugging */
ir_instruction *ir;
unsigned op:8; /**< TGSI opcode */
unsigned precise:1;
unsigned saturate:1;
unsigned is_64bit_expanded:1;
unsigned sampler_base:5;
unsigned sampler_array_size:6; /**< 1-based size of sampler array, 1 if not array */
unsigned tex_target:4; /**< One of TEXTURE_*_INDEX */
glsl_base_type tex_type:5;
unsigned tex_shadow:1;
unsigned image_format:9;
unsigned tex_offset_num_offset:3;
unsigned dead_mask:4; /**< Used in dead code elimination */
unsigned buffer_access:3; /**< buffer access type */
const struct tgsi_opcode_info *info;
};
struct rename_reg_pair {
bool valid;
int new_reg;
};
inline static bool
is_resource_instruction(unsigned opcode)
{
switch (opcode) {
case TGSI_OPCODE_RESQ:
case TGSI_OPCODE_LOAD:
case TGSI_OPCODE_ATOMUADD:
case TGSI_OPCODE_ATOMXCHG:
case TGSI_OPCODE_ATOMCAS:
case TGSI_OPCODE_ATOMAND:
case TGSI_OPCODE_ATOMOR:
case TGSI_OPCODE_ATOMXOR:
case TGSI_OPCODE_ATOMUMIN:
case TGSI_OPCODE_ATOMUMAX:
case TGSI_OPCODE_ATOMIMIN:
case TGSI_OPCODE_ATOMIMAX:
return true;
default:
return false;
}
}
inline static unsigned
num_inst_dst_regs(const glsl_to_tgsi_instruction *op)
{
return op->info->num_dst;
}
inline static unsigned
num_inst_src_regs(const glsl_to_tgsi_instruction *op)
{
return op->info->is_tex || is_resource_instruction(op->op) ?
op->info->num_src - 1 : op->info->num_src;
}
#endif