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radeon: make DRI1 one work with new CS mechanism

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This commit is contained in:
Dave Airlie 2008-12-01 16:24:50 +10:00
parent 9770bb32f5
commit 72cd2c8c0c
10 changed files with 185 additions and 108 deletions
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8
src/mesa/drivers/dri/r300/r300_cmdbuf.c
View file

@ -234,7 +234,7 @@ void r300EmitState(r300ContextPtr r300)
static unsigned packet0_count(r300ContextPtr r300, uint32_t *pkt)
{
if (r300->radeon.radeonScreen->driScreen->dri2.enabled) {
if (r300->radeon.radeonScreen->kernel_mm) {
return ((((*pkt) >> 16) & 0x3FFF) + 1);
} else {
drm_r300_cmd_header_t *t = (drm_r300_cmd_header_t*)pkt;
@ -252,7 +252,7 @@ void emit_vpu(r300ContextPtr r300, struct r300_state_atom * atom)
drm_r300_cmd_header_t cmd;
uint32_t addr, ndw, i;
if (!r300->radeon.radeonScreen->driScreen->dri2.enabled) {
if (!r300->radeon.radeonScreen->kernel_mm) {
uint32_t dwords;
dwords = (*atom->check) (r300, atom);
BEGIN_BATCH_NO_AUTOSTATE(dwords);
@ -744,7 +744,7 @@ void r300InitCmdBuf(r300ContextPtr r300)
size * 4, r300->hw.max_state_size * 4);
}
if (r300->radeon.radeonScreen->driScreen->dri2.enabled) {
if (r300->radeon.radeonScreen->kernel_mm) {
int fd = r300->radeon.radeonScreen->driScreen->fd;
r300->cmdbuf.csm = radeon_cs_manager_gem_ctor(fd);
} else {
@ -770,7 +770,7 @@ void r300DestroyCmdBuf(r300ContextPtr r300)
foreach(atom, &r300->hw.atomlist) {
FREE(atom->cmd);
}
if (r300->radeon.radeonScreen->driScreen->dri2.enabled) {
if (r300->radeon.radeonScreen->driScreen->dri2.enabled || r300->radeon.radeonScreen->kernel_mm) {
radeon_cs_manager_gem_dtor(r300->cmdbuf.csm);
} else {
radeon_cs_manager_legacy_dtor(r300->cmdbuf.csm);

8
src/mesa/drivers/dri/r300/r300_emit.c
View file

@ -436,10 +436,10 @@ int r300EmitArrays(GLcontext * ctx)
}
/* Setup INPUT_ROUTE. */
if (rmesa->radeon.radeonScreen->driScreen->dri2.enabled) {
R300_STATECHANGE(rmesa, vir[0]);
rmesa->hw.vir[0].cmd[0] &= 0xC000FFFF;
rmesa->hw.vir[1].cmd[0] &= 0xC000FFFF;
if (rmesa->radeon.radeonScreen->kernel_mm) {
R300_STATECHANGE(rmesa, vir[0]);
rmesa->hw.vir[0].cmd[0] &= 0xC000FFFF;
rmesa->hw.vir[1].cmd[0] &= 0xC000FFFF;
rmesa->hw.vir[0].cmd[0] |=
(r300VAPInputRoute0(&rmesa->hw.vir[0].cmd[R300_VIR_CNTL_0],
vb->AttribPtr, inputs, tab, nr) & 0x3FFF) << 16;

10
src/mesa/drivers/dri/r300/r300_emit.h
View file

@ -54,7 +54,7 @@
static INLINE uint32_t cmdpacket0(struct radeon_screen *rscrn,
int reg, int count)
{
if (!rscrn->driScreen->dri2.enabled) {
if (!rscrn->kernel_mm) {
drm_r300_cmd_header_t cmd;
cmd.packet0.cmd_type = R300_CMD_PACKET0;
@ -158,7 +158,7 @@ static INLINE uint32_t cmdpacify(struct radeon_screen *rscrn)
* Outputs 2 dwords and expects (num_extra+1) additional dwords afterwards.
*/
#define OUT_BATCH_PACKET3(packet, num_extra) do {\
if (!b_l_r300->radeon.radeonScreen->driScreen->dri2.enabled) { \
if (!b_l_r300->radeon.radeonScreen->kernel_mm) { \
OUT_BATCH(cmdpacket3(b_l_r300->radeon.radeonScreen,\
R300_CMD_PACKET3_RAW)); \
}\
@ -172,7 +172,7 @@ void static INLINE end_3d(r300ContextPtr rmesa)
{
BATCH_LOCALS(rmesa);
if (!rmesa->radeon.radeonScreen->driScreen->dri2.enabled) {
if (!rmesa->radeon.radeonScreen->kernel_mm) {
BEGIN_BATCH(1);
OUT_BATCH(cmdpacify(rmesa->radeon.radeonScreen));
END_BATCH();
@ -183,7 +183,7 @@ void static INLINE cp_delay(r300ContextPtr rmesa, unsigned short count)
{
BATCH_LOCALS(rmesa);
if (!rmesa->radeon.radeonScreen->driScreen->dri2.enabled) {
if (!rmesa->radeon.radeonScreen->kernel_mm) {
BEGIN_BATCH(1);
OUT_BATCH(cmdcpdelay(rmesa->radeon.radeonScreen, count));
END_BATCH();
@ -195,7 +195,7 @@ void static INLINE cp_wait(r300ContextPtr rmesa, unsigned char flags)
BATCH_LOCALS(rmesa);
uint32_t wait_until;
if (!rmesa->radeon.radeonScreen->driScreen->dri2.enabled) {
if (!rmesa->radeon.radeonScreen->kernel_mm) {
BEGIN_BATCH_NO_AUTOSTATE(1);
OUT_BATCH(cmdwait(rmesa->radeon.radeonScreen, flags));
END_BATCH();

2
src/mesa/drivers/dri/r300/r300_ioctl.c
View file

@ -168,7 +168,7 @@ static void r300ClearBuffer(r300ContextPtr r300, int flags,
END_BATCH();
}
if (!rmesa->radeon.radeonScreen->driScreen->dri2.enabled) {
if (!rmesa->radeon.radeonScreen->kernel_mm) {
BEGIN_BATCH_NO_AUTOSTATE(9);
OUT_BATCH(cmdpacket3(r300->radeon.radeonScreen, R300_CMD_PACKET3_CLEAR));
OUT_BATCH_FLOAT32(dPriv->w / 2.0);

4
src/mesa/drivers/dri/r300/r300_render.c
View file

@ -199,7 +199,7 @@ static void r300FireEB(r300ContextPtr rmesa, int vertex_count, int type)
type |
R300_VAP_VF_CNTL__INDEX_SIZE_32bit);
if (!rmesa->radeon.radeonScreen->driScreen->dri2.enabled) {
if (!rmesa->radeon.radeonScreen->kernel_mm) {
OUT_BATCH_PACKET3(R300_PACKET3_INDX_BUFFER, 2);
OUT_BATCH(R300_EB_UNK1 | (0 << 16) | R300_EB_UNK2);
OUT_BATCH_RELOC(rmesa->state.elt_dma_offset,
@ -238,7 +238,7 @@ static void r300EmitAOS(r300ContextPtr rmesa, GLuint nr, GLuint offset)
OUT_BATCH(nr);
if (!rmesa->radeon.radeonScreen->driScreen->dri2.enabled) {
if (!rmesa->radeon.radeonScreen->kernel_mm) {
for (i = 0; i + 1 < nr; i += 2) {
OUT_BATCH((rmesa->state.aos[i].components << 0) |
(rmesa->state.aos[i].stride << 8) |

132
src/mesa/drivers/dri/r300/radeon_context.c
View file

@ -303,55 +303,107 @@ void radeonCopySubBuffer(__DRIdrawablePrivate * dPriv,
}
static void
radeon_make_renderbuffer_current(radeonContextPtr radeon,
GLframebuffer *draw)
radeon_make_kernel_renderbuffer_current(radeonContextPtr radeon,
GLframebuffer *draw)
{
int size = 4096*4096*4;
/* if radeon->fake */
struct radeon_renderbuffer *rb;
if ((rb = (void *)draw->Attachment[BUFFER_FRONT_LEFT].Renderbuffer)) {
if (!rb->bo) {
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->frontOffset +
radeon->radeonScreen->fbLocation,
size,
4096,
RADEON_GEM_DOMAIN_VRAM,
0);
}
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->frontOffset,
0,
0,
RADEON_GEM_DOMAIN_VRAM,
0);
}
rb->cpp = radeon->radeonScreen->cpp;
rb->pitch = radeon->radeonScreen->frontPitch * rb->cpp;
}
if ((rb = (void *)draw->Attachment[BUFFER_BACK_LEFT].Renderbuffer)) {
if (!rb->bo) {
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->backOffset +
radeon->radeonScreen->fbLocation,
size,
4096,
RADEON_GEM_DOMAIN_VRAM,
0);
}
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->backOffset,
0,
0,
RADEON_GEM_DOMAIN_VRAM,
0);
}
rb->cpp = radeon->radeonScreen->cpp;
rb->pitch = radeon->radeonScreen->backPitch * rb->cpp;
}
if ((rb = (void *)draw->Attachment[BUFFER_DEPTH].Renderbuffer)) {
if (!rb->bo) {
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->depthOffset +
radeon->radeonScreen->fbLocation,
size,
4096,
RADEON_GEM_DOMAIN_VRAM,
0);
}
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->depthOffset,
0,
0,
RADEON_GEM_DOMAIN_VRAM,
0);
}
rb->cpp = radeon->radeonScreen->cpp;
rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp;
}
}
static void
radeon_make_renderbuffer_current(radeonContextPtr radeon,
GLframebuffer *draw)
{
int size = 4096*4096*4;
/* if radeon->fake */
struct radeon_renderbuffer *rb;
if (radeon->radeonScreen->kernel_mm) {
radeon_make_kernel_renderbuffer_current(radeon, draw);
return;
}
if ((rb = (void *)draw->Attachment[BUFFER_FRONT_LEFT].Renderbuffer)) {
if (!rb->bo) {
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->frontOffset +
radeon->radeonScreen->fbLocation,
size,
4096,
RADEON_GEM_DOMAIN_VRAM,
0);
}
rb->cpp = radeon->radeonScreen->cpp;
rb->pitch = radeon->radeonScreen->frontPitch * rb->cpp;
}
if ((rb = (void *)draw->Attachment[BUFFER_BACK_LEFT].Renderbuffer)) {
if (!rb->bo) {
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->backOffset +
radeon->radeonScreen->fbLocation,
size,
4096,
RADEON_GEM_DOMAIN_VRAM,
0);
}
rb->cpp = radeon->radeonScreen->cpp;
rb->pitch = radeon->radeonScreen->backPitch * rb->cpp;
}
if ((rb = (void *)draw->Attachment[BUFFER_DEPTH].Renderbuffer)) {
if (!rb->bo) {
rb->bo = radeon_bo_open(radeon->radeonScreen->bom,
radeon->radeonScreen->depthOffset +
radeon->radeonScreen->fbLocation,
size,
4096,
RADEON_GEM_DOMAIN_VRAM,
0);
}
rb->cpp = radeon->radeonScreen->cpp;
rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp;
}
}
void
radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
{
@ -496,15 +548,15 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
dfb = driDrawPriv->driverPrivate;
rfb = driReadPriv->driverPrivate;
if (driContextPriv->driScreenPriv->dri2.enabled) {
radeon_update_renderbuffers(driContextPriv, driDrawPriv);
if (driDrawPriv != driReadPriv)
radeon_update_renderbuffers(driContextPriv, driReadPriv);
radeon->state.color.rrb =
(void *)dfb->Attachment[BUFFER_BACK_LEFT].Renderbuffer;
radeon->state.depth_buffer =
(void *)dfb->Attachment[BUFFER_DEPTH].Renderbuffer;
}
if (driContextPriv->driScreenPriv->dri2.enabled) {
radeon_update_renderbuffers(driContextPriv, driDrawPriv);
if (driDrawPriv != driReadPriv)
radeon_update_renderbuffers(driContextPriv, driReadPriv);
radeon->state.color.rrb =
(void *)dfb->Attachment[BUFFER_BACK_LEFT].Renderbuffer;
radeon->state.depth_buffer =
(void *)dfb->Attachment[BUFFER_DEPTH].Renderbuffer;
}
if (RADEON_DEBUG & DEBUG_DRI)
@ -514,10 +566,10 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv,
if (driReadPriv != driDrawPriv)
driUpdateFramebufferSize(radeon->glCtx, driReadPriv);
if (!driContextPriv->driScreenPriv->dri2.enabled) {
radeon_make_renderbuffer_current(radeon, dfb);
}
if (!driContextPriv->driScreenPriv->dri2.enabled) {
radeon_make_renderbuffer_current(radeon, dfb);
}
_mesa_make_current(radeon->glCtx, dfb, rfb);
if (radeon->dri.drawable != driDrawPriv) {

3
src/mesa/drivers/dri/r300/radeon_lock.c
View file

@ -121,7 +121,8 @@ void radeonGetLock(radeonContextPtr rmesa, GLuint flags)
if (sarea->ctx_owner != rmesa->dri.hwContext) {
sarea->ctx_owner = rmesa->dri.hwContext;
radeon_bo_legacy_texture_age(rmesa->radeonScreen->bom);
if (!rmesa->radeonScreen->kernel_mm)
radeon_bo_legacy_texture_age(rmesa->radeonScreen->bom);
}
rmesa->lost_context = GL_TRUE;

2
src/mesa/drivers/dri/r300/radeon_state.c
View file

@ -153,7 +153,7 @@ void radeonSetCliprects(radeonContextPtr radeon)
GLframebuffer *const draw_fb = (GLframebuffer*)drawable->driverPrivate;
GLframebuffer *const read_fb = (GLframebuffer*)readable->driverPrivate;
if (!radeon->radeonScreen->driScreen->dri2.enabled) {
if (!radeon->radeonScreen->driScreen->dri2.enabled) {
if (draw_fb->_ColorDrawBufferIndexes[0] == BUFFER_BACK_LEFT) {
/* Can't ignore 2d windows if we are page flipping. */
if (drawable->numBackClipRects == 0 || radeon->doPageFlip ||

121
src/mesa/drivers/dri/radeon/radeon_screen.c
View file

@ -35,6 +35,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
* \author Gareth Hughes <gareth@valinux.com>
*/
#include <errno.h>
#include "main/glheader.h"
#include "main/imports.h"
#include "main/mtypes.h"
@ -366,7 +367,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
{
radeonScreenPtr screen;
RADEONDRIPtr dri_priv = (RADEONDRIPtr)sPriv->pDevPriv;
unsigned char *RADEONMMIO;
unsigned char *RADEONMMIO = NULL;
int i;
int ret;
uint32_t temp;
@ -398,6 +399,21 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
screen->card_type = (dri_priv->IsPCI ? RADEON_CARD_PCI : RADEON_CARD_AGP);
{
int ret;
#ifdef RADEON_PARAM_KERNEL_MM
ret = radeonGetParam( sPriv->fd, RADEON_PARAM_KERNEL_MM,
&screen->kernel_mm);
if (ret && ret != -EINVAL) {
FREE( screen );
fprintf(stderr, "drm_radeon_getparam_t (RADEON_OFFSET): %d\n", ret);
return NULL;
}
if (ret == -EINVAL)
screen->kernel_mm = 0;
#endif
ret = radeonGetParam( sPriv->fd, RADEON_PARAM_GART_BUFFER_OFFSET,
&screen->gart_buffer_offset);
@ -431,58 +447,60 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
screen->drmSupportsVertexProgram = (sPriv->drm_version.minor >= 25);
}
screen->mmio.handle = dri_priv->registerHandle;
screen->mmio.size = dri_priv->registerSize;
if ( drmMap( sPriv->fd,
screen->mmio.handle,
screen->mmio.size,
&screen->mmio.map ) ) {
FREE( screen );
__driUtilMessage("%s: drmMap failed\n", __FUNCTION__ );
return NULL;
}
if (!screen->kernel_mm) {
screen->mmio.handle = dri_priv->registerHandle;
screen->mmio.size = dri_priv->registerSize;
if ( drmMap( sPriv->fd,
screen->mmio.handle,
screen->mmio.size,
&screen->mmio.map ) ) {
FREE( screen );
__driUtilMessage("%s: drmMap failed\n", __FUNCTION__ );
return NULL;
}
RADEONMMIO = screen->mmio.map;
RADEONMMIO = screen->mmio.map;
screen->status.handle = dri_priv->statusHandle;
screen->status.size = dri_priv->statusSize;
if ( drmMap( sPriv->fd,
screen->status.handle,
screen->status.size,
&screen->status.map ) ) {
drmUnmap( screen->mmio.map, screen->mmio.size );
FREE( screen );
__driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ );
return NULL;
}
screen->scratch = (__volatile__ uint32_t *)
((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET);
screen->status.handle = dri_priv->statusHandle;
screen->status.size = dri_priv->statusSize;
if ( drmMap( sPriv->fd,
screen->status.handle,
screen->status.size,
&screen->status.map ) ) {
drmUnmap( screen->mmio.map, screen->mmio.size );
FREE( screen );
__driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ );
return NULL;
}
screen->scratch = (__volatile__ uint32_t *)
((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET);
screen->buffers = drmMapBufs( sPriv->fd );
if ( !screen->buffers ) {
drmUnmap( screen->status.map, screen->status.size );
drmUnmap( screen->mmio.map, screen->mmio.size );
FREE( screen );
__driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__ );
return NULL;
}
if ( dri_priv->gartTexHandle && dri_priv->gartTexMapSize ) {
screen->gartTextures.handle = dri_priv->gartTexHandle;
screen->gartTextures.size = dri_priv->gartTexMapSize;
if ( drmMap( sPriv->fd,
screen->gartTextures.handle,
screen->gartTextures.size,
(drmAddressPtr)&screen->gartTextures.map ) ) {
screen->buffers = drmMapBufs( sPriv->fd );
if ( !screen->buffers ) {
drmUnmap( screen->status.map, screen->status.size );
drmUnmap( screen->mmio.map, screen->mmio.size );
FREE( screen );
__driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__ );
return NULL;
}
if ( dri_priv->gartTexHandle && dri_priv->gartTexMapSize ) {
screen->gartTextures.handle = dri_priv->gartTexHandle;
screen->gartTextures.size = dri_priv->gartTexMapSize;
if ( drmMap( sPriv->fd,
screen->gartTextures.handle,
screen->gartTextures.size,
(drmAddressPtr)&screen->gartTextures.map ) ) {
drmUnmapBufs( screen->buffers );
drmUnmap( screen->status.map, screen->status.size );
drmUnmap( screen->mmio.map, screen->mmio.size );
FREE( screen );
__driUtilMessage("%s: drmMap failed for GART texture area\n", __FUNCTION__);
return NULL;
}
screen->gart_texture_offset = dri_priv->gartTexOffset + screen->gart_base;
}
screen->gart_texture_offset = dri_priv->gartTexOffset + screen->gart_base;
}
}
screen->chip_flags = 0;
@ -849,7 +867,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
ret = radeonGetParam( sPriv->fd, RADEON_PARAM_FB_LOCATION,
&temp);
if (ret) {
if (screen->chip_family < CHIP_FAMILY_RS690)
if (screen->chip_family < CHIP_FAMILY_RS690 && !screen->kernel_mm)
screen->fbLocation = ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff) << 16;
else {
FREE( screen );
@ -973,10 +991,14 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
screen->sarea_priv_offset = dri_priv->sarea_priv_offset;
screen->sarea = (drm_radeon_sarea_t *) ((GLubyte *) sPriv->pSAREA +
screen->sarea_priv_offset);
screen->bom = radeon_bo_manager_legacy_ctor(screen);
if (screen->kernel_mm)
screen->bom = radeon_bo_manager_gem_ctor(sPriv->fd);
else
screen->bom = radeon_bo_manager_legacy_ctor(screen);
if (screen->bom == NULL) {
free(screen);
return NULL;
free(screen);
return NULL;
}
return screen;
}
@ -1004,6 +1026,7 @@ radeonCreateScreen2(__DRIscreenPrivate *sPriv)
driParseOptionInfo (&screen->optionCache,
__driConfigOptions, __driNConfigOptions);
screen->kernel_mm = 1;
screen->chip_flags = 0;
/* FIXME: do either an ioctl (bad) or a sysfs file for driver to
* information about which chipset is their */
@ -1058,7 +1081,7 @@ radeonDestroyScreen( __DRIscreenPrivate *sPriv )
if (!screen)
return;
if (sPriv->dri2.enabled) {
if (screen->kernel_mm) {
radeon_tracker_print(&screen->bom->tracker, stderr);
radeon_bo_manager_gem_dtor(screen->bom);
} else {

3
src/mesa/drivers/dri/radeon/radeon_screen.h
View file

@ -107,7 +107,8 @@ typedef struct radeon_screen {
const __DRIextension *extensions[16];
int num_gb_pipes;
drm_radeon_sarea_t *sarea; /* Private SAREA data */
int kernel_mm;
drm_radeon_sarea_t *sarea; /* Private SAREA data */
struct radeon_bo_manager *bom;
} radeonScreenRec, *radeonScreenPtr;