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ir3: reformat after previous commit
Signed-off-by: Job Noorman <jnoorman@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33701>
This commit is contained in:
Job Noorman
Marge Bot
parent
2fedc82c0c
commit
7210054db8
2 changed files with 34 additions and 33 deletions
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@ -490,7 +490,7 @@ ir3_nir_lower_io_to_temporaries(nir_shader *s)
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s->info.stage != MESA_SHADER_GEOMETRY;
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if (lower_input || lower_output) {
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NIR_PASS(_, s, nir_lower_io_to_temporaries, nir_shader_get_entrypoint(s),
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lower_output, lower_input);
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lower_output, lower_input);
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/* nir_lower_io_to_temporaries() creates global variables and copy
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* instructions which need to be cleaned up.
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@ -756,8 +756,9 @@ ir3_nir_post_finalize(struct ir3_shader *shader)
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MESA_TRACE_FUNC();
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NIR_PASS(_, s, nir_lower_io, nir_var_shader_in | nir_var_shader_out,
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ir3_glsl_type_size, nir_lower_io_lower_64bit_to_32 |
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nir_lower_io_use_interpolated_input_intrinsics);
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ir3_glsl_type_size,
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nir_lower_io_lower_64bit_to_32 |
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nir_lower_io_use_interpolated_input_intrinsics);
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if (s->info.stage == MESA_SHADER_FRAGMENT) {
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/* NOTE: lower load_barycentric_at_sample first, since it
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@ -804,10 +805,8 @@ ir3_nir_post_finalize(struct ir3_shader *shader)
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}
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if (mediump_varyings) {
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NIR_PASS(_, s, nir_lower_mediump_io,
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nir_var_shader_in,
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mediump_varyings,
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false);
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NIR_PASS(_, s, nir_lower_mediump_io, nir_var_shader_in,
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mediump_varyings, false);
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}
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/* This should come after input lowering, to opportunistically lower non-mediump outputs. */
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@ -882,8 +881,8 @@ ir3_nir_post_finalize(struct ir3_shader *shader)
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const nir_lower_idiv_options lower_idiv_options = {
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.allow_fp16 = true,
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};
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NIR_PASS(_, s, nir_lower_idiv, &lower_idiv_options); /* idiv generated by cube lowering */
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NIR_PASS(_, s, nir_lower_idiv,
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&lower_idiv_options); /* idiv generated by cube lowering */
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/* The resinfo opcode returns the size in dwords on a4xx */
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if (compiler->gen == 4)
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@ -1010,12 +1009,12 @@ ir3_nir_lower_variant(struct ir3_shader_variant *so,
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switch (so->type) {
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case MESA_SHADER_VERTEX:
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NIR_PASS(_, s, ir3_nir_lower_to_explicit_output, so,
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so->key.tessellation);
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so->key.tessellation);
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progress = true;
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break;
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case MESA_SHADER_TESS_CTRL:
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NIR_PASS(_, s, nir_lower_io_to_scalar,
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nir_var_shader_in | nir_var_shader_out, NULL, NULL);
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nir_var_shader_in | nir_var_shader_out, NULL, NULL);
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NIR_PASS(_, s, ir3_nir_lower_tess_ctrl, so, so->key.tessellation);
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NIR_PASS(_, s, ir3_nir_lower_to_explicit_input, so);
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progress = true;
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@ -1024,7 +1023,7 @@ ir3_nir_lower_variant(struct ir3_shader_variant *so,
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NIR_PASS(_, s, ir3_nir_lower_tess_eval, so, so->key.tessellation);
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if (so->key.has_gs)
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NIR_PASS(_, s, ir3_nir_lower_to_explicit_output, so,
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so->key.tessellation);
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so->key.tessellation);
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progress = true;
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break;
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case MESA_SHADER_GEOMETRY:
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@ -1065,7 +1064,7 @@ ir3_nir_lower_variant(struct ir3_shader_variant *so,
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* could theoretically do better.
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*/
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OPT(s, nir_opt_large_constants, glsl_get_vec4_size_align_bytes,
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32 /* bytes */);
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32 /* bytes */);
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progress |= OPT(s, ir3_nir_lower_load_constant, so);
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/* Lower large temporaries to scratch, which in Qualcomm terms is private
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@ -121,7 +121,8 @@ tu_spirv_to_nir(struct tu_device *dev,
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NIR_PASS(_, nir, nir_split_var_copies);
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NIR_PASS(_, nir, nir_lower_var_copies);
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NIR_PASS(_, nir, nir_lower_mediump_vars, nir_var_function_temp | nir_var_shader_temp | nir_var_mem_shared);
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NIR_PASS(_, nir, nir_lower_mediump_vars,
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nir_var_function_temp | nir_var_shader_temp | nir_var_mem_shared);
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NIR_PASS(_, nir, nir_opt_copy_prop_vars);
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NIR_PASS(_, nir, nir_opt_combine_stores, nir_var_all);
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@ -2519,7 +2520,6 @@ tu_shader_create(struct tu_device *dev,
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};
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NIR_PASS(_, nir, tu_nir_lower_fdm, &fdm_options);
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/* This needs to happen before multiview lowering which rewrites store
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* instructions of the position variable, so that we can just rewrite one
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* store at the end instead of having to rewrite every store specified by
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@ -2539,24 +2539,21 @@ tu_shader_create(struct tu_device *dev,
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}
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NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_push_const,
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nir_address_format_32bit_offset);
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nir_address_format_32bit_offset);
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NIR_PASS(_, nir, nir_lower_explicit_io,
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nir_var_mem_ubo | nir_var_mem_ssbo,
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nir_address_format_vec2_index_32bit_offset);
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NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_ubo | nir_var_mem_ssbo,
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nir_address_format_vec2_index_32bit_offset);
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NIR_PASS(_, nir, nir_lower_explicit_io,
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nir_var_mem_global,
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nir_address_format_64bit_global);
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NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_global,
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nir_address_format_64bit_global);
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if (nir->info.stage == MESA_SHADER_COMPUTE) {
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if (!nir->info.shared_memory_explicit_layout) {
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NIR_PASS(_, nir, nir_lower_vars_to_explicit_types,
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nir_var_mem_shared, shared_type_info);
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nir_var_mem_shared, shared_type_info);
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}
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NIR_PASS(_, nir, nir_lower_explicit_io,
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nir_var_mem_shared,
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nir_address_format_32bit_offset);
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NIR_PASS(_, nir, nir_lower_explicit_io, nir_var_mem_shared,
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nir_address_format_32bit_offset);
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if (nir->info.zero_initialize_shared_memory && nir->info.shared_size > 0) {
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const unsigned chunk_size = 16; /* max single store size */
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@ -2566,13 +2563,15 @@ tu_shader_create(struct tu_device *dev,
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* that accesses are limited to those bounds.
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*/
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const unsigned shared_size = ALIGN(nir->info.shared_size, chunk_size);
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NIR_PASS(_, nir, nir_zero_initialize_shared_memory, shared_size, chunk_size);
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NIR_PASS(_, nir, nir_zero_initialize_shared_memory, shared_size,
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chunk_size);
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}
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const struct nir_lower_compute_system_values_options compute_sysval_options = {
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.has_base_workgroup_id = true,
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};
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NIR_PASS(_, nir, nir_lower_compute_system_values, &compute_sysval_options);
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NIR_PASS(_, nir, nir_lower_compute_system_values,
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&compute_sysval_options);
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}
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nir_assign_io_var_locations(nir, nir_var_shader_in, &nir->num_inputs, nir->info.stage);
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@ -2611,8 +2610,8 @@ tu_shader_create(struct tu_device *dev,
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struct ir3_const_allocations const_allocs = {};
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NIR_PASS(_, nir, tu_lower_io, dev, shader, layout,
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key->read_only_input_attachments, key->dynamic_renderpass,
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&const_allocs);
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key->read_only_input_attachments, key->dynamic_renderpass,
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&const_allocs);
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nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
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@ -2745,9 +2744,11 @@ tu_link_shaders(nir_shader **shaders, unsigned shaders_count)
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const nir_remove_dead_variables_options out_var_opts = {
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.can_remove_var = nir_vk_is_not_xfb_output,
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};
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NIR_PASS(_, producer, nir_remove_dead_variables, nir_var_shader_out, &out_var_opts);
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NIR_PASS(_, producer, nir_remove_dead_variables, nir_var_shader_out,
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&out_var_opts);
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NIR_PASS(_, consumer, nir_remove_dead_variables, nir_var_shader_in, NULL);
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NIR_PASS(_, consumer, nir_remove_dead_variables, nir_var_shader_in,
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NULL);
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bool progress = nir_remove_unused_varyings(producer, consumer);
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@ -2755,7 +2756,8 @@ tu_link_shaders(nir_shader **shaders, unsigned shaders_count)
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if (progress) {
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if (nir_lower_global_vars_to_local(producer)) {
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/* Remove dead writes, which can remove input loads */
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NIR_PASS(_, producer, nir_remove_dead_variables, nir_var_shader_temp, NULL);
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NIR_PASS(_, producer, nir_remove_dead_variables,
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nir_var_shader_temp, NULL);
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NIR_PASS(_, producer, nir_opt_dce);
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}
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nir_lower_global_vars_to_local(consumer);
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