fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-21 15:50:11 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

tu/a7xx: Fix occlusion query

Browse source 
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23217>
This commit is contained in:
Danylo Piliaiev 2023-06-22 12:30:42 +02:00 • committed by Marge Bot
parent 9eaf8ab8a0
commit 720480943d
3 changed files with 30 additions and 14 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/freedreno/registers/adreno/a6xx.xml
View file

@ -2573,7 +2573,7 @@ to upconvert to 32b float internally?
</reg32> </reg32>
</array> </array>
<!-- 0x891b-0x8926 invalid --> <!-- 0x891b-0x8926 invalid -->
<reg64 offset="0x8927" name="RB_SAMPLE_COUNT_ADDR" type="waddress" align="16" usage="cmd"/> <reg64 offset="0x8927" name="RB_SAMPLE_COUNT_ADDR" type="waddress" align="16" variants="A6XX" usage="cmd"/>
<!-- 0x8929-0x89ff invalid --> <!-- 0x8929-0x89ff invalid -->
<!-- TODO: there are some registers in the 0x8a00-0x8bff range --> <!-- TODO: there are some registers in the 0x8a00-0x8bff range -->

3
src/freedreno/vulkan/tu_autotune.cc
View file

@ -650,7 +650,7 @@ tu_autotune_begin_renderpass(struct tu_cmd_buffer *cmd,
tu_cs_emit_regs(cs, A6XX_RB_SAMPLE_COUNT_CONTROL(.copy = true)); tu_cs_emit_regs(cs, A6XX_RB_SAMPLE_COUNT_CONTROL(.copy = true));
tu_cs_emit_regs(cs, A6XX_RB_SAMPLE_COUNT_ADDR(.qword = result_iova)); tu_cs_emit_regs(cs, A6XX_RB_SAMPLE_COUNT_ADDR(.qword = result_iova));
/* A7XX TODO: Fixup ZPASS_DONE */
tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 1); tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 1);
tu_cs_emit(cs, ZPASS_DONE); tu_cs_emit(cs, ZPASS_DONE);
} }
@ -672,6 +672,7 @@ void tu_autotune_end_renderpass(struct tu_cmd_buffer *cmd,
tu_cs_emit_regs(cs, A6XX_RB_SAMPLE_COUNT_ADDR(.qword = result_iova)); tu_cs_emit_regs(cs, A6XX_RB_SAMPLE_COUNT_ADDR(.qword = result_iova));
/* A7XX TODO: Fixup ZPASS_DONE */
tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 1); tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 1);
tu_cs_emit(cs, ZPASS_DONE); tu_cs_emit(cs, ZPASS_DONE);
} }

39
src/freedreno/vulkan/tu_query.cc
View file

@ -821,6 +821,7 @@ tu_ResetQueryPool(VkDevice device,
} }
} }
template <chip CHIP>
static void static void
emit_begin_occlusion_query(struct tu_cmd_buffer *cmdbuf, emit_begin_occlusion_query(struct tu_cmd_buffer *cmdbuf,
struct tu_query_pool *pool, struct tu_query_pool *pool,
@ -846,11 +847,17 @@ emit_begin_occlusion_query(struct tu_cmd_buffer *cmdbuf,
tu_cs_emit_regs(cs, tu_cs_emit_regs(cs,
A6XX_RB_SAMPLE_COUNT_CONTROL(.copy = true)); A6XX_RB_SAMPLE_COUNT_CONTROL(.copy = true));
tu_cs_emit_regs(cs, if (CHIP == A6XX) {
A6XX_RB_SAMPLE_COUNT_ADDR(.qword = begin_iova)); tu_cs_emit_regs(cs,
A6XX_RB_SAMPLE_COUNT_ADDR(.qword = begin_iova));
tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 1); tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 1);
tu_cs_emit(cs, ZPASS_DONE); tu_cs_emit(cs, ZPASS_DONE);
} else {
tu_cs_emit_pkt7(cs, CP_EVENT_WRITE7, 3);
tu_cs_emit(cs, CP_EVENT_WRITE7_0(.event = ZPASS_DONE,
.write_sample_count = true).value);
tu_cs_emit_qw(cs, begin_iova);
}
} }
template <chip CHIP> template <chip CHIP>
@ -1064,7 +1071,7 @@ tu_CmdBeginQuery(VkCommandBuffer commandBuffer,
* GL_SAMPLES_PASSED and GL_ANY_SAMPLES_PASSED, so we can similarly * GL_SAMPLES_PASSED and GL_ANY_SAMPLES_PASSED, so we can similarly
* ignore the VK_QUERY_CONTROL_PRECISE_BIT flag here. * ignore the VK_QUERY_CONTROL_PRECISE_BIT flag here.
*/ */
emit_begin_occlusion_query(cmdbuf, pool, query); emit_begin_occlusion_query<CHIP>(cmdbuf, pool, query);
break; break;
case VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT: case VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT:
emit_begin_xfb_query<CHIP>(cmdbuf, pool, query, 0); emit_begin_xfb_query<CHIP>(cmdbuf, pool, query, 0);
@ -1111,6 +1118,7 @@ tu_CmdBeginQueryIndexedEXT(VkCommandBuffer commandBuffer,
} }
TU_GENX(tu_CmdBeginQueryIndexedEXT); TU_GENX(tu_CmdBeginQueryIndexedEXT);
template <chip CHIP>
static void static void
emit_end_occlusion_query(struct tu_cmd_buffer *cmdbuf, emit_end_occlusion_query(struct tu_cmd_buffer *cmdbuf,
struct tu_query_pool *pool, struct tu_query_pool *pool,
@ -1146,11 +1154,18 @@ emit_end_occlusion_query(struct tu_cmd_buffer *cmdbuf,
tu_cs_emit_regs(cs, tu_cs_emit_regs(cs,
A6XX_RB_SAMPLE_COUNT_CONTROL(.copy = true)); A6XX_RB_SAMPLE_COUNT_CONTROL(.copy = true));
tu_cs_emit_regs(cs, if (CHIP == A6XX) {
A6XX_RB_SAMPLE_COUNT_ADDR(.qword = end_iova)); tu_cs_emit_regs(cs,
A6XX_RB_SAMPLE_COUNT_ADDR(.qword = end_iova));
tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 1); tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 1);
tu_cs_emit(cs, ZPASS_DONE); tu_cs_emit(cs, ZPASS_DONE);
} else {
/* A7XX TODO: Calculate (end - begin) via ZPASS_DONE. */
tu_cs_emit_pkt7(cs, CP_EVENT_WRITE, 3);
tu_cs_emit(cs, CP_EVENT_WRITE7_0(.event = ZPASS_DONE,
.write_sample_count = true).value);
tu_cs_emit_qw(cs, end_iova);
}
tu_cs_emit_pkt7(cs, CP_WAIT_REG_MEM, 6); tu_cs_emit_pkt7(cs, CP_WAIT_REG_MEM, 6);
tu_cs_emit(cs, CP_WAIT_REG_MEM_0_FUNCTION(WRITE_NE) | tu_cs_emit(cs, CP_WAIT_REG_MEM_0_FUNCTION(WRITE_NE) |
@ -1534,7 +1549,7 @@ tu_CmdEndQuery(VkCommandBuffer commandBuffer,
switch (pool->type) { switch (pool->type) {
case VK_QUERY_TYPE_OCCLUSION: case VK_QUERY_TYPE_OCCLUSION:
emit_end_occlusion_query(cmdbuf, pool, query); emit_end_occlusion_query<CHIP>(cmdbuf, pool, query);
break; break;
case VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT: case VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT:
emit_end_xfb_query<CHIP>(cmdbuf, pool, query, 0); emit_end_xfb_query<CHIP>(cmdbuf, pool, query, 0);