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nir/opt_varyings: don't generate IO with unsupported bit sizes
Backward inter-shader code motion turns ALU results into outputs,
which led to getting IO with unsupported bit sizes. This prevents
that.
There is a new NIR option flag that indicates 16-bit support.
Fixes: c66967b5cb - nir: add nir_opt_varyings, new pass optimizing and compacting varyings
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28431>
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parent
5c543f4a02
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3 changed files with 22 additions and 4 deletions
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@ -3588,6 +3588,8 @@ typedef enum {
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*/
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nir_io_dont_use_pos_for_non_fs_varyings = BITFIELD_BIT(1),
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nir_io_16bit_input_output_support = BITFIELD_BIT(2),
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/* Options affecting the GLSL compiler are below. */
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/**
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@ -3382,6 +3382,23 @@ backward_inter_shader_code_motion(struct linkage_info *linkage,
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if (!num_movable_loads)
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return false;
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/* Inter-shader code motion turns ALU results into outputs, but not all
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* bit sizes are supported by outputs.
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*
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* The 1-bit type is allowed because the pass always promotes 1-bit
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* outputs to 16 or 32 bits, whichever is supported.
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*
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* TODO: We could support replacing 2 32-bit inputs with one 64-bit
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* post-dominator by supporting 64 bits here, but the likelihood of that
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* occuring seems low.
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*/
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unsigned supported_io_types = 32 | 1;
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if (linkage->producer_builder.shader->options->io_options &
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linkage->consumer_builder.shader->options->io_options &
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nir_io_16bit_input_output_support)
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supported_io_types |= 16;
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struct nir_use_dominance_state *postdom_state =
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nir_calc_use_dominance_impl(linkage->consumer_builder.impl, true);
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@ -3403,10 +3420,8 @@ backward_inter_shader_code_motion(struct linkage_info *linkage,
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/* This can only be an ALU instruction. */
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nir_alu_instr *alu = nir_instr_as_alu(iter);
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/* Skip 64-bit defs and keep searching. Replacing 32-bit inputs
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* with one 64-bit input is unlikely to benefit.
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*/
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if (alu->def.bit_size == 64)
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/* Skip unsupported bit sizes and keep searching. */
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if (!(alu->def.bit_size & supported_io_types))
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continue;
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/* Skip comparison opcodes that directly source the first load
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@ -52,6 +52,7 @@ protected:
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memset(&options, 0, sizeof(options));
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options.varying_expression_max_cost = varying_expression_max_cost;
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options.io_options = nir_io_16bit_input_output_support;
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}
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virtual ~nir_opt_varyings_test()
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