fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-20 07:20:10 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

iris: Support I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC modifier

Browse source 
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20327>
This commit is contained in:
Jianxun Zhang 2022-10-18 12:53:08 -07:00 • committed by Marge Bot
parent a45f5500dd
commit 71b7355aae
1 changed files with 11 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

11
src/gallium/drivers/iris/iris_resource.c
View file

@ -66,6 +66,7 @@ enum modifier_priority {
MODIFIER_PRIORITY_4_DG2_RC_CCS, MODIFIER_PRIORITY_4_DG2_RC_CCS,
MODIFIER_PRIORITY_4_DG2_RC_CCS_CC, MODIFIER_PRIORITY_4_DG2_RC_CCS_CC,
MODIFIER_PRIORITY_4_MTL_RC_CCS, MODIFIER_PRIORITY_4_MTL_RC_CCS,
MODIFIER_PRIORITY_4_MTL_RC_CCS_CC,
}; };
static const uint64_t priority_to_modifier[] = { static const uint64_t priority_to_modifier[] = {
@ -80,6 +81,7 @@ static const uint64_t priority_to_modifier[] = {
[MODIFIER_PRIORITY_4_DG2_RC_CCS] = I915_FORMAT_MOD_4_TILED_DG2_RC_CCS, [MODIFIER_PRIORITY_4_DG2_RC_CCS] = I915_FORMAT_MOD_4_TILED_DG2_RC_CCS,
[MODIFIER_PRIORITY_4_DG2_RC_CCS_CC] = I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC, [MODIFIER_PRIORITY_4_DG2_RC_CCS_CC] = I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC,
[MODIFIER_PRIORITY_4_MTL_RC_CCS] = I915_FORMAT_MOD_4_TILED_MTL_RC_CCS, [MODIFIER_PRIORITY_4_MTL_RC_CCS] = I915_FORMAT_MOD_4_TILED_MTL_RC_CCS,
[MODIFIER_PRIORITY_4_MTL_RC_CCS_CC] = I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC,
}; };
static bool static bool
@ -119,6 +121,7 @@ modifier_is_supported(const struct intel_device_info *devinfo,
return false; return false;
break; break;
case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS: case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS:
case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC:
if (!intel_device_info_is_mtl(devinfo)) if (!intel_device_info_is_mtl(devinfo))
return false; return false;
break; break;
@ -148,6 +151,7 @@ modifier_is_supported(const struct intel_device_info *devinfo,
} }
break; break;
case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS: case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS:
case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC:
case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC: case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS: case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC: case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
@ -186,6 +190,9 @@ select_best_modifier(const struct intel_device_info *devinfo,
continue; continue;
switch (modifiers[i]) { switch (modifiers[i]) {
case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC:
prio = MAX2(prio, MODIFIER_PRIORITY_4_MTL_RC_CCS_CC);
break;
case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS: case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS:
prio = MAX2(prio, MODIFIER_PRIORITY_4_MTL_RC_CCS); prio = MAX2(prio, MODIFIER_PRIORITY_4_MTL_RC_CCS);
break; break;
@ -257,6 +264,7 @@ iris_query_dmabuf_modifiers(struct pipe_screen *pscreen,
I915_FORMAT_MOD_4_TILED_DG2_MC_CCS, I915_FORMAT_MOD_4_TILED_DG2_MC_CCS,
I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC, I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC,
I915_FORMAT_MOD_4_TILED_MTL_RC_CCS, I915_FORMAT_MOD_4_TILED_MTL_RC_CCS,
I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC,
I915_FORMAT_MOD_Y_TILED, I915_FORMAT_MOD_Y_TILED,
I915_FORMAT_MOD_Y_TILED_CCS, I915_FORMAT_MOD_Y_TILED_CCS,
I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS, I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
@ -311,6 +319,7 @@ iris_get_dmabuf_modifier_planes(struct pipe_screen *pscreen, uint64_t modifier,
unsigned int planes = util_format_get_num_planes(format); unsigned int planes = util_format_get_num_planes(format);
switch (modifier) { switch (modifier) {
case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC:
case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC: case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
return 3; return 3;
case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS: case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS:
@ -1074,6 +1083,7 @@ iris_resource_finish_aux_import(struct pipe_screen *pscreen,
iris_get_aux_clear_color_state_size(screen, res), iris_get_aux_clear_color_state_size(screen, res),
4096, IRIS_MEMZONE_OTHER, BO_ALLOC_ZEROED); 4096, IRIS_MEMZONE_OTHER, BO_ALLOC_ZEROED);
break; break;
case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC:
case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC: case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
assert(num_main_planes == 1 && num_planes == 3); assert(num_main_planes == 1 && num_planes == 3);
import_aux_info(r[0], r[1]); import_aux_info(r[0], r[1]);
@ -1397,6 +1407,7 @@ mod_plane_is_clear_color(uint64_t modifier, uint32_t plane)
assert(mod_info); assert(mod_info);
switch (modifier) { switch (modifier) {
case I915_FORMAT_MOD_4_TILED_MTL_RC_CCS_CC:
case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC: case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
assert(mod_info->supports_clear_color); assert(mod_info->supports_clear_color);
return plane == 2; return plane == 2;