radeon/llvm: Cleanup makefile

Hopefully, this will fix all the parallel make problems people have
been having.
(cherry picked from commit cebbdd4ac2)
This commit is contained in:
Tom Stellard 2012-08-29 13:01:15 +00:00
parent b2048c5e90
commit 71b5503164
2 changed files with 37 additions and 13 deletions

View file

@ -20,8 +20,6 @@ tablegen = $(TBLGEN) -I $(LLVM_INCLUDEDIR) $1 $2 -o $3
HAVE_LLVM_INTRINSICS = $(shell grep IntrinsicsR600.td $(LLVM_INCLUDEDIR)/llvm/Intrinsics.td)
gen: $(GENERATED_SOURCES)
SIRegisterInfo.td: SIGenRegisterInfo.pl
$(PERL) $^ > $@
@ -38,37 +36,37 @@ endif
R600RegisterInfo.td: R600GenRegisterInfo.pl
$(PERL) $^ > $@
AMDGPUGenRegisterInfo.inc: *.td
AMDGPUGenRegisterInfo.inc: $(TD_FILES)
$(call tablegen, -gen-register-info, AMDGPU.td, $@)
AMDGPUGenInstrInfo.inc: *.td
AMDGPUGenInstrInfo.inc: $(TD_FILES)
$(call tablegen, -gen-instr-info, AMDGPU.td, $@)
AMDGPUGenAsmWriter.inc: *.td
AMDGPUGenAsmWriter.inc: $(TD_FILES)
$(call tablegen, -gen-asm-writer, AMDGPU.td, $@)
AMDGPUGenDAGISel.inc: *.td
AMDGPUGenDAGISel.inc: $(TD_FILES)
$(call tablegen, -gen-dag-isel, AMDGPU.td, $@)
AMDGPUGenCallingConv.inc: *.td
AMDGPUGenCallingConv.inc: $(TD_FILES)
$(call tablegen, -gen-callingconv, AMDGPU.td, $@)
AMDGPUGenSubtargetInfo.inc: *.td
AMDGPUGenSubtargetInfo.inc: $(TD_FILES)
$(call tablegen, -gen-subtarget, AMDGPU.td, $@)
AMDGPUGenEDInfo.inc: *.td
AMDGPUGenEDInfo.inc: $(TD_FILES)
$(call tablegen, -gen-enhanced-disassembly-info, AMDGPU.td, $@)
AMDGPUGenIntrinsics.inc: *.td
AMDGPUGenIntrinsics.inc: $(TD_FILES)
$(call tablegen, -gen-tgt-intrinsic, AMDGPU.td, $@)
AMDGPUGenCodeEmitter.inc: *.td
AMDGPUGenCodeEmitter.inc: $(TD_FILES)
$(call tablegen, -gen-emitter, AMDGPU.td, $@)
AMDGPUGenMCCodeEmitter.inc: *.td
AMDGPUGenMCCodeEmitter.inc: $(TD_FILES)
$(call tablegen, -mc-emitter -gen-emitter, AMDGPU.td, $@)
AMDGPUGenDFAPacketizer.inc: *.td
AMDGPUGenDFAPacketizer.inc: $(TD_FILES)
$(call tablegen, -gen-dfa-packetizer, AMDGPU.td, $@)
LOADER_LIBS=$(shell llvm-config --libs bitreader asmparser)

View file

@ -1,4 +1,30 @@
TD_FILES := \
AMDGPU.td \
AMDGPUInstrInfo.td \
AMDGPUInstructions.td \
AMDGPUIntrinsics.td \
AMDGPURegisterInfo.td \
AMDILBase.td \
AMDILInstrInfo.td \
AMDILIntrinsics.td \
AMDILRegisterInfo.td \
Processors.td \
R600InstrInfo.td \
R600Instructions.td \
R600Intrinsics.td \
R600IntrinsicsNoOpenCL.td \
R600IntrinsicsOpenCL.td \
R600RegisterInfo.td \
R600Schedule.td \
SIInstrFormats.td \
SIInstrInfo.td \
SIInstructions.td \
SIIntrinsics.td \
SIRegisterInfo.td \
SISchedule.td
GENERATED_SOURCES := \
R600Intrinsics.td \
R600RegisterInfo.td \