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radeon/llvm: Cleanup makefile
Hopefully, this will fix all the parallel make problems people have
been having.
(cherry picked from commit cebbdd4ac2)
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parent
b2048c5e90
commit
71b5503164
2 changed files with 37 additions and 13 deletions
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@ -20,8 +20,6 @@ tablegen = $(TBLGEN) -I $(LLVM_INCLUDEDIR) $1 $2 -o $3
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HAVE_LLVM_INTRINSICS = $(shell grep IntrinsicsR600.td $(LLVM_INCLUDEDIR)/llvm/Intrinsics.td)
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gen: $(GENERATED_SOURCES)
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SIRegisterInfo.td: SIGenRegisterInfo.pl
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$(PERL) $^ > $@
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@ -38,37 +36,37 @@ endif
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R600RegisterInfo.td: R600GenRegisterInfo.pl
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$(PERL) $^ > $@
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AMDGPUGenRegisterInfo.inc: *.td
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AMDGPUGenRegisterInfo.inc: $(TD_FILES)
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$(call tablegen, -gen-register-info, AMDGPU.td, $@)
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AMDGPUGenInstrInfo.inc: *.td
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AMDGPUGenInstrInfo.inc: $(TD_FILES)
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$(call tablegen, -gen-instr-info, AMDGPU.td, $@)
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AMDGPUGenAsmWriter.inc: *.td
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AMDGPUGenAsmWriter.inc: $(TD_FILES)
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$(call tablegen, -gen-asm-writer, AMDGPU.td, $@)
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AMDGPUGenDAGISel.inc: *.td
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AMDGPUGenDAGISel.inc: $(TD_FILES)
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$(call tablegen, -gen-dag-isel, AMDGPU.td, $@)
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AMDGPUGenCallingConv.inc: *.td
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AMDGPUGenCallingConv.inc: $(TD_FILES)
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$(call tablegen, -gen-callingconv, AMDGPU.td, $@)
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AMDGPUGenSubtargetInfo.inc: *.td
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AMDGPUGenSubtargetInfo.inc: $(TD_FILES)
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$(call tablegen, -gen-subtarget, AMDGPU.td, $@)
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AMDGPUGenEDInfo.inc: *.td
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AMDGPUGenEDInfo.inc: $(TD_FILES)
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$(call tablegen, -gen-enhanced-disassembly-info, AMDGPU.td, $@)
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AMDGPUGenIntrinsics.inc: *.td
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AMDGPUGenIntrinsics.inc: $(TD_FILES)
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$(call tablegen, -gen-tgt-intrinsic, AMDGPU.td, $@)
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AMDGPUGenCodeEmitter.inc: *.td
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AMDGPUGenCodeEmitter.inc: $(TD_FILES)
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$(call tablegen, -gen-emitter, AMDGPU.td, $@)
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AMDGPUGenMCCodeEmitter.inc: *.td
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AMDGPUGenMCCodeEmitter.inc: $(TD_FILES)
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$(call tablegen, -mc-emitter -gen-emitter, AMDGPU.td, $@)
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AMDGPUGenDFAPacketizer.inc: *.td
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AMDGPUGenDFAPacketizer.inc: $(TD_FILES)
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$(call tablegen, -gen-dfa-packetizer, AMDGPU.td, $@)
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LOADER_LIBS=$(shell llvm-config --libs bitreader asmparser)
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@ -1,4 +1,30 @@
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TD_FILES := \
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AMDGPU.td \
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AMDGPUInstrInfo.td \
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AMDGPUInstructions.td \
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AMDGPUIntrinsics.td \
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AMDGPURegisterInfo.td \
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AMDILBase.td \
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AMDILInstrInfo.td \
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AMDILIntrinsics.td \
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AMDILRegisterInfo.td \
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Processors.td \
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R600InstrInfo.td \
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R600Instructions.td \
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R600Intrinsics.td \
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R600IntrinsicsNoOpenCL.td \
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R600IntrinsicsOpenCL.td \
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R600RegisterInfo.td \
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R600Schedule.td \
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SIInstrFormats.td \
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SIInstrInfo.td \
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SIInstructions.td \
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SIIntrinsics.td \
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SIRegisterInfo.td \
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SISchedule.td
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GENERATED_SOURCES := \
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R600Intrinsics.td \
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R600RegisterInfo.td \
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