fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-05 09:38:07 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

asahi: resize key

Browse source 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29179>
This commit is contained in:
Alyssa Rosenzweig 2024-04-07 16:51:36 -04:00 • committed by Marge Bot
parent a38f7c9151
commit 71692a5d0b
3 changed files with 3 additions and 3 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/asahi/lib/agx_linker.h
View file

@ -54,7 +54,7 @@ struct agx_vs_prolog_key {
struct agx_velem_key attribs[AGX_MAX_VBUFS];
/* Bit mask of attribute components to load */
BITSET_DECLARE(component_mask, VERT_ATTRIB_MAX * 4);
BITSET_DECLARE(component_mask, AGX_MAX_ATTRIBS * 4);
/* Whether running as a hardware vertex shader (versus compute) */
bool hw;

2
src/asahi/lib/agx_nir_prolog_epilog.c
View file

@ -148,7 +148,7 @@ agx_nir_vs_prolog(nir_builder *b, const void *key_)
unsigned i = 0;
nir_def *vec = NULL;
unsigned vec_idx = ~0;
BITSET_FOREACH_SET(i, key->component_mask, VERT_ATTRIB_MAX * 4) {
BITSET_FOREACH_SET(i, key->component_mask, AGX_MAX_ATTRIBS * 4) {
unsigned a = i / 4;
unsigned c = i % 4;

2
src/gallium/drivers/asahi/agx_state.h
View file

@ -235,7 +235,7 @@ struct agx_compiled_shader {
/* For a vertex shader, the mask of vertex attributes read. Used to key the
* prolog so the prolog doesn't write components not actually read.
*/
BITSET_DECLARE(attrib_components_read, VERT_ATTRIB_MAX * 4);
BITSET_DECLARE(attrib_components_read, AGX_MAX_ATTRIBS * 4);
struct agx_fs_epilog_link_info epilog_key;