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Get basic texturing and stencil working

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This commit is contained in:
Keith Whitwell 2006-03-01 16:49:11 +00:00
parent 33e55c6a7d
commit 71380a1325
3 changed files with 29 additions and 17 deletions
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21
src/mesa/drivers/dri/i915/i830_metaops.c
View file

@ -304,8 +304,7 @@ static void set_vertex_format( struct intel_context *intel )
i830->meta.Ctx[I830_CTXREG_VF] = (_3DSTATE_VFT0_CMD |
VFT0_TEX_COUNT(1) |
VFT0_DIFFUSE |
VFT0_SPEC |
VFT0_XYZW);
VFT0_XYZ);
i830->meta.Ctx[I830_CTXREG_VF2] = (_3DSTATE_VFT1_CMD |
VFT1_TEX0_FMT(TEXCOORDFMT_2D) |
VFT1_TEX1_FMT(TEXCOORDFMT_2D) |
@ -319,7 +318,23 @@ static void meta_import_pixel_state( struct intel_context *intel )
{
struct i830_context *i830 = i830_context(&intel->ctx);
memcpy(i830->meta.Ctx, i830->state.Ctx, I830_CTX_SETUP_SIZE * 4);
i830->meta.Ctx[I830_CTXREG_STATE1] = i830->state.Ctx[I830_CTXREG_STATE1];
i830->meta.Ctx[I830_CTXREG_STATE2] = i830->state.Ctx[I830_CTXREG_STATE2];
i830->meta.Ctx[I830_CTXREG_STATE3] = i830->state.Ctx[I830_CTXREG_STATE3];
i830->meta.Ctx[I830_CTXREG_STATE4] = i830->state.Ctx[I830_CTXREG_STATE4];
i830->meta.Ctx[I830_CTXREG_STATE5] = i830->state.Ctx[I830_CTXREG_STATE5];
i830->meta.Ctx[I830_CTXREG_IALPHAB] = i830->state.Ctx[I830_CTXREG_IALPHAB];
i830->meta.Ctx[I830_CTXREG_STENCILTST] = i830->state.Ctx[I830_CTXREG_STENCILTST];
i830->meta.Ctx[I830_CTXREG_ENABLES_1] = i830->state.Ctx[I830_CTXREG_ENABLES_1];
i830->meta.Ctx[I830_CTXREG_ENABLES_2] = i830->state.Ctx[I830_CTXREG_ENABLES_2];
i830->meta.Ctx[I830_CTXREG_AA] = i830->state.Ctx[I830_CTXREG_AA];
i830->meta.Ctx[I830_CTXREG_FOGCOLOR] = i830->state.Ctx[I830_CTXREG_FOGCOLOR];
i830->meta.Ctx[I830_CTXREG_BLENDCOLOR0] = i830->state.Ctx[I830_CTXREG_BLENDCOLOR0];
i830->meta.Ctx[I830_CTXREG_BLENDCOLOR1] = i830->state.Ctx[I830_CTXREG_BLENDCOLOR1];
i830->meta.Ctx[I830_CTXREG_MCSB0] = i830->state.Ctx[I830_CTXREG_MCSB0];
i830->meta.Ctx[I830_CTXREG_MCSB1] = i830->state.Ctx[I830_CTXREG_MCSB1];
i830->meta.Ctx[I830_CTXREG_STATE3] &= ~CULLMODE_MASK;
i830->meta.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
i830->meta.emitted &= ~I830_UPLOAD_CTX;

20
src/mesa/drivers/dri/i915/i830_texstate.c
View file

@ -155,14 +155,15 @@ static GLboolean i830_update_tex_unit( struct intel_context *intel,
{
if (tObj->Target == GL_TEXTURE_CUBE_MAP)
state[I830_TEXREG_CUBE] = (CUBE_NEGX_ENABLE |
state[I830_TEXREG_CUBE] = (_3DSTATE_MAP_CUBE | MAP_UNIT(unit) |
CUBE_NEGX_ENABLE |
CUBE_POSX_ENABLE |
CUBE_NEGY_ENABLE |
CUBE_POSY_ENABLE |
CUBE_NEGZ_ENABLE |
CUBE_POSZ_ENABLE);
else
state[I830_TEXREG_CUBE] = 0;
state[I830_TEXREG_CUBE] = (_3DSTATE_MAP_CUBE | MAP_UNIT(unit));
}
@ -245,13 +246,14 @@ static GLboolean i830_update_tex_unit( struct intel_context *intel,
if (tObj->Target == GL_TEXTURE_3D)
return GL_FALSE;
state[I830_TEXREG_MCS] = ss3; /* TEXCOORDS_ARE_NORMAL */
state[I830_TEXREG_MCS] |= (TEXCOORD_ADDR_V_MODE(translate_wrap_mode(ws)) |
TEXCOORD_ADDR_V_MODE(translate_wrap_mode(wt)));
state[I830_TEXREG_MCS] |= MAP_UNIT(unit);
state[I830_TEXREG_MCS] = (_3DSTATE_MAP_COORD_SET_CMD |
MAP_UNIT(unit) |
ENABLE_TEXCOORD_PARAMS |
ss3 |
ENABLE_ADDR_V_CNTL |
TEXCOORD_ADDR_V_MODE(translate_wrap_mode(wt)) |
ENABLE_ADDR_U_CNTL |
TEXCOORD_ADDR_U_MODE(translate_wrap_mode(ws)));
}

5
src/mesa/drivers/dri/i915/i830_vtbl.c
View file

@ -264,11 +264,6 @@ static void i830_emit_invarient_state( struct intel_context *intel )
BEGIN_BATCH(200, 0);
OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(0));
OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(1));
OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(2));
OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(3));
OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
OUT_BATCH(0);