From 711c4bddb2bd7bc97bed0bcd1d260b8a228bd069 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 24 Jan 2023 06:10:12 -0500 Subject: [PATCH] radeonsi/gfx11: use new packet EVENT_WRITE_ZPASS Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/amd/common/sid.h | 2 ++ src/gallium/drivers/radeonsi/si_query.c | 30 ++++++++++++++++--------- 2 files changed, 22 insertions(+), 10 deletions(-) diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h index 10663284b28..ffc1f0d1f88 100644 --- a/src/amd/common/sid.h +++ b/src/amd/common/sid.h @@ -250,6 +250,8 @@ #define PKT3_WAIT_ON_CE_COUNTER 0x86 #define PKT3_SET_SH_REG_INDEX 0x9B #define PKT3_LOAD_CONTEXT_REG_INDEX 0x9F /* new for VI */ +#define PKT3_EVENT_WRITE_ZPASS 0xB1 /* GFX11+ & PFP version >= 1458 */ +#define EVENT_WRITE_ZPASS_PFP_VERSION 1458 #define PKT3_DISPATCH_TASK_STATE_INIT 0xA9 /* Tells the HW about the task control buffer */ #define PKT3_DISPATCH_MESH_INDIRECT_MULTI 0x4C /* Indirect mesh shader only dispatch [GFX only] */ diff --git a/src/gallium/drivers/radeonsi/si_query.c b/src/gallium/drivers/radeonsi/si_query.c index 7a23627a326..cd7f2501225 100644 --- a/src/gallium/drivers/radeonsi/si_query.c +++ b/src/gallium/drivers/radeonsi/si_query.c @@ -813,11 +813,16 @@ static void si_query_hw_do_emit_start(struct si_context *sctx, struct si_query_h case PIPE_QUERY_OCCLUSION_PREDICATE: case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE: { radeon_begin(cs); - radeon_emit(PKT3(PKT3_EVENT_WRITE, 2, 0)); - if (sctx->gfx_level >= GFX11) - radeon_emit(EVENT_TYPE(V_028A90_PIXEL_PIPE_STAT_DUMP) | EVENT_INDEX(1)); - else - radeon_emit(EVENT_TYPE(V_028A90_ZPASS_DONE) | EVENT_INDEX(1)); + if (sctx->gfx_level >= GFX11 && + sctx->screen->info.pfp_fw_version >= EVENT_WRITE_ZPASS_PFP_VERSION) { + radeon_emit(PKT3(PKT3_EVENT_WRITE_ZPASS, 1, 0)); + } else { + radeon_emit(PKT3(PKT3_EVENT_WRITE, 2, 0)); + if (sctx->gfx_level >= GFX11) + radeon_emit(EVENT_TYPE(V_028A90_PIXEL_PIPE_STAT_DUMP) | EVENT_INDEX(1)); + else + radeon_emit(EVENT_TYPE(V_028A90_ZPASS_DONE) | EVENT_INDEX(1)); + } radeon_emit(va); radeon_emit(va >> 32); radeon_end(); @@ -924,11 +929,16 @@ static void si_query_hw_do_emit_stop(struct si_context *sctx, struct si_query_hw case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE: { va += 8; radeon_begin(cs); - radeon_emit(PKT3(PKT3_EVENT_WRITE, 2, 0)); - if (sctx->gfx_level >= GFX11) - radeon_emit(EVENT_TYPE(V_028A90_PIXEL_PIPE_STAT_DUMP) | EVENT_INDEX(1)); - else - radeon_emit(EVENT_TYPE(V_028A90_ZPASS_DONE) | EVENT_INDEX(1)); + if (sctx->gfx_level >= GFX11 && + sctx->screen->info.pfp_fw_version >= EVENT_WRITE_ZPASS_PFP_VERSION) { + radeon_emit(PKT3(PKT3_EVENT_WRITE_ZPASS, 1, 0)); + } else { + radeon_emit(PKT3(PKT3_EVENT_WRITE, 2, 0)); + if (sctx->gfx_level >= GFX11) + radeon_emit(EVENT_TYPE(V_028A90_PIXEL_PIPE_STAT_DUMP) | EVENT_INDEX(1)); + else + radeon_emit(EVENT_TYPE(V_028A90_ZPASS_DONE) | EVENT_INDEX(1)); + } radeon_emit(va); radeon_emit(va >> 32); radeon_end();