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panfrost/midgard: Emit cubemap coordinates
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
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commit
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2 changed files with 32 additions and 5 deletions
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@ -24,11 +24,16 @@
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/* Some constants and macros not found in the disassembler */
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#define OP_IS_STORE(op) (\
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#define OP_IS_STORE_VARY(op) (\
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op == midgard_op_store_vary_16 || \
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op == midgard_op_store_vary_32 \
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)
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#define OP_IS_STORE(op) (\
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OP_IS_STORE_VARY(op) || \
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op == midgard_op_store_cubemap_coords \
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)
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/* ALU control words are single bit fields with a lot of space */
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#define ALU_ENAB_VEC_MUL (1 << 17)
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@ -284,6 +284,7 @@ M_LOAD(load_uniform_32);
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M_LOAD(load_color_buffer_8);
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//M_STORE(store_vary_16);
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M_STORE(store_vary_32);
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M_STORE(store_cubemap_coords);
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static midgard_instruction
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v_alu_br_compact_cond(midgard_jmp_writeout_op op, unsigned tag, signed offset, unsigned cond)
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@ -1544,10 +1545,31 @@ emit_tex(compiler_context *ctx, nir_tex_instr *instr)
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int index = nir_src_index(ctx, &instr->src[i].src);
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midgard_vector_alu_src alu_src = blank_alu_src;
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alu_src.swizzle = (COMPONENT_Y << 2);
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midgard_instruction ins = v_fmov(index, alu_src, SSA_FIXED_REGISTER(REGISTER_TEXTURE_BASE + in_reg));
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emit_mir_instruction(ctx, ins);
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int reg = SSA_FIXED_REGISTER(REGISTER_TEXTURE_BASE + in_reg);
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if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
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/* For cubemaps, we need to load coords into
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* special r27, and then use a special ld/st op
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* to copy into the texture register */
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alu_src.swizzle = SWIZZLE(COMPONENT_X, COMPONENT_Y, COMPONENT_Z, COMPONENT_X);
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midgard_instruction move = v_fmov(index, alu_src, SSA_FIXED_REGISTER(27));
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emit_mir_instruction(ctx, move);
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midgard_instruction st = m_store_cubemap_coords(reg, 0);
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st.load_store.unknown = 0x24; /* XXX: What is this? */
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st.load_store.mask = 0x3; /* xy? */
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st.load_store.swizzle = alu_src.swizzle;
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emit_mir_instruction(ctx, st);
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} else {
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alu_src.swizzle = SWIZZLE(COMPONENT_X, COMPONENT_Y, COMPONENT_X, COMPONENT_X);
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midgard_instruction ins = v_fmov(index, alu_src, reg);
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emit_mir_instruction(ctx, ins);
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}
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//midgard_pin_output(ctx, index, REGISTER_TEXTURE_BASE + in_reg);
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@ -1927,7 +1949,7 @@ allocate_registers(compiler_context *ctx)
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break;
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case TAG_LOAD_STORE_4: {
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if (OP_IS_STORE(ins->load_store.op)) {
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if (OP_IS_STORE_VARY(ins->load_store.op)) {
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/* TODO: use ssa_args for store_vary */
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ins->load_store.reg = 0;
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} else {
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