From 702982d3992d7ca44d88d08d072182f0bc0dc3dd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sun, 29 Sep 2024 22:40:07 -0400 Subject: [PATCH] radeonsi: get the value for load_tcs_primitive_mode_amd from shader info MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is possible thanks to the commit: "st/mesa: copy some TES shader info fields to TCS". Reviewed-by: Timur Kristóf Part-of: --- src/gallium/drivers/radeonsi/si_nir_lower_abi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/radeonsi/si_nir_lower_abi.c b/src/gallium/drivers/radeonsi/si_nir_lower_abi.c index cb0cf01806d..be9e6ccb38d 100644 --- a/src/gallium/drivers/radeonsi/si_nir_lower_abi.c +++ b/src/gallium/drivers/radeonsi/si_nir_lower_abi.c @@ -738,7 +738,10 @@ static bool lower_intrinsic(nir_builder *b, nir_instr *instr, struct lower_abi_s if (shader->is_monolithic) { replacement = nir_imm_int(b, key->ge.opt.tes_prim_mode); } else { - replacement = ac_nir_unpack_arg(b, &args->ac, args->tcs_offchip_layout, 29, 2); + if (b->shader->info.tess._primitive_mode != TESS_PRIMITIVE_UNSPECIFIED) + replacement = nir_imm_int(b, b->shader->info.tess._primitive_mode); + else + replacement = ac_nir_unpack_arg(b, &args->ac, args->tcs_offchip_layout, 29, 2); } break; case nir_intrinsic_load_ring_gsvs_amd: {