isl: enable compression for CPS buffers on xe2+

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264>
This commit is contained in:
Rohan Garg 2023-01-16 17:21:43 +01:00 committed by Marge Bot
parent b9c68883c4
commit 7001134246
2 changed files with 6 additions and 1 deletions

View file

@ -2995,7 +2995,7 @@ _isl_surf_info_supports_ccs(const struct isl_device *dev,
/* TODO: Disable for now, as we're not sure about the meaning of
* 3DSTATE_CPSIZE_CONTROL_BUFFER::CPCBCompressionEnable
*/
if (isl_surf_usage_is_cpb(usage))
if (isl_surf_usage_is_cpb(usage) && dev->info->ver < 20)
return false;
if (INTEL_DEBUG(DEBUG_NO_CCS))

View file

@ -38,6 +38,7 @@ __gen_combine_address(__attribute__((unused)) void *data,
#include "genxml/genX_pack.h"
#include "isl_priv.h"
#include "isl_genX_helpers.h"
#if GFX_VERx10 >= 125
static const uint8_t isl_encode_tiling[] = {
@ -107,6 +108,10 @@ isl_genX(emit_cpb_control_s)(const struct isl_device *dev, void *batch,
* cpb.CPCBCompressionEnable is this CCS compression? Currently disabled
* in isl_surf_supports_ccs() for CPB buffers.
*/
#if GFX_VER >= 20
cpb.CompressionFormat =
isl_get_render_compression_format(info->surf->format);
#endif
} else {
cpb.SurfaceType = SURFTYPE_NULL;
cpb.TiledMode = TILE64;