From 6fa04b176706a343119337ea4e1256d17f29bc9b Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Mon, 28 May 2018 09:42:49 -0700 Subject: [PATCH] intel/fs: Mark LINTERP opcode as writing accumulator on platforms without PLN When we don't have PLN (gen4 and gen11+), we implement LINTERP as either LINE+MAC or a pair of MADs. In both cases, the accumulator is written by the first of the two instructions and read by the second. Even though the accumulator value isn't actually ever used from a logical instruction perspective, it is trashed so we need to make the scheduler aware. Otherwise, the scheduler could end up re-ordering instructions and putting a LINTERP between another an instruction which writes the accumulator and another which tries to use that result. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Matt Turner (cherry picked from commit 566e6abd6d70266aea2f43ad9fefaf7718d76c57) Rebased version provided by Jason --- src/intel/compiler/brw_shader.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index 284c2e8233c..cc377122425 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -986,7 +986,8 @@ backend_instruction::writes_accumulator_implicitly(const struct gen_device_info (devinfo->gen < 6 && ((opcode >= BRW_OPCODE_ADD && opcode < BRW_OPCODE_NOP) || (opcode >= FS_OPCODE_DDX_COARSE && opcode <= FS_OPCODE_LINTERP && - opcode != FS_OPCODE_CINTERP))); + opcode != FS_OPCODE_CINTERP))) || + (opcode == FS_OPCODE_LINTERP && !devinfo->has_pln); } bool