diff --git a/src/gallium/frontends/rusticl/core/kernel.rs b/src/gallium/frontends/rusticl/core/kernel.rs
index cf1b828999e..e3a03e94482 100644
--- a/src/gallium/frontends/rusticl/core/kernel.rs
+++ b/src/gallium/frontends/rusticl/core/kernel.rs
@@ -218,6 +218,11 @@ fn lower_and_optimize_nir_late(
     args: usize,
 ) -> Vec<InternalKernelArg> {
     let mut res = Vec::new();
+    let nir_options = unsafe {
+        &*dev
+            .screen
+            .nir_shader_compiler_options(pipe_shader_type::PIPE_SHADER_COMPUTE)
+    };
     let mut lower_state = rusticl_lower_state::default();
 
     nir.pass2(
@@ -285,6 +290,18 @@ fn lower_and_optimize_nir_late(
 
     // TODO whatever clc is doing here
 
+    if nir_options.lower_to_scalar {
+        nir.pass2(
+            nir_lower_alu_to_scalar,
+            nir_options.lower_to_scalar_filter,
+            ptr::null(),
+        );
+    }
+
+    if nir_options.lower_int64_options.0 != 0 {
+        nir.pass0(nir_lower_int64);
+    }
+
     nir.pass1(nir_lower_convert_alu_types, None);
     nir.pass0(nir_opt_dce);
     dev.screen.finalize_nir(nir);
diff --git a/src/gallium/frontends/rusticl/meson.build b/src/gallium/frontends/rusticl/meson.build
index a4cfe630dac..633672d7f49 100644
--- a/src/gallium/frontends/rusticl/meson.build
+++ b/src/gallium/frontends/rusticl/meson.build
@@ -210,6 +210,7 @@ rusticl_mesa_bindings_rs = rust.bindgen(
     '--whitelist-var', 'PIPE_.*',
     '--bitfield-enum', 'pipe_map_flags',
     '--allowlist-var', 'stderr',
+    '--bitfield-enum', 'nir_lower_int64_options',
   ],
 )