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tu: Replace A6XX_TEX_CONST_DWORDS

Browse source 
Fortunately the descriptor size is the same on gen8.  But use the
generic define anyways.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39141>
This commit is contained in:
Rob Clark 2025-12-31 10:51:44 -08:00 • committed by Marge Bot
parent 34944f85cd
commit 6f6880bcac
8 changed files with 85 additions and 86 deletions
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2
src/freedreno/vulkan/tu_buffer_view.h
View file

@ -14,7 +14,7 @@ struct tu_buffer_view
{
struct vk_buffer_view vk;
uint32_t descriptor[A6XX_TEX_CONST_DWORDS];
uint32_t descriptor[FDL6_TEX_CONST_DWORDS];
struct tu_buffer *buffer;
};

34
src/freedreno/vulkan/tu_clear_blit.cc
View file

@ -1077,13 +1077,13 @@ r3d_src_common(struct tu_cmd_buffer *cmd,
struct tu_cs_memory texture = { };
VkResult result = tu_cs_alloc(&cmd->sub_cs,
2, /* allocate space for a sampler too */
A6XX_TEX_CONST_DWORDS, &texture);
FDL6_TEX_CONST_DWORDS, &texture);
if (result != VK_SUCCESS) {
vk_command_buffer_set_error(&cmd->vk, result);
return;
}
memcpy(texture.map, tex_const, A6XX_TEX_CONST_DWORDS * 4);
memcpy(texture.map, tex_const, FDL6_TEX_CONST_DWORDS * 4);
/* patch addresses for layer offset */
*(uint64_t*) (texture.map + 4) += offset_base;
@ -1091,18 +1091,18 @@ r3d_src_common(struct tu_cmd_buffer *cmd,
texture.map[7] = ubwc_addr;
texture.map[8] = ubwc_addr >> 32;
texture.map[A6XX_TEX_CONST_DWORDS + 0] =
texture.map[FDL6_TEX_CONST_DWORDS + 0] =
A6XX_TEX_SAMP_0_XY_MAG(tu6_tex_filter(filter, false)) |
A6XX_TEX_SAMP_0_XY_MIN(tu6_tex_filter(filter, false)) |
A6XX_TEX_SAMP_0_WRAP_S(A6XX_TEX_CLAMP_TO_EDGE) |
A6XX_TEX_SAMP_0_WRAP_T(A6XX_TEX_CLAMP_TO_EDGE) |
A6XX_TEX_SAMP_0_WRAP_R(A6XX_TEX_CLAMP_TO_EDGE) |
0x60000; /* XXX used by blob, doesn't seem necessary */
texture.map[A6XX_TEX_CONST_DWORDS + 1] =
texture.map[FDL6_TEX_CONST_DWORDS + 1] =
A6XX_TEX_SAMP_1_UNNORM_COORDS |
A6XX_TEX_SAMP_1_MIPFILTER_LINEAR_FAR;
texture.map[A6XX_TEX_CONST_DWORDS + 2] = 0;
texture.map[A6XX_TEX_CONST_DWORDS + 3] = 0;
texture.map[FDL6_TEX_CONST_DWORDS + 2] = 0;
texture.map[FDL6_TEX_CONST_DWORDS + 3] = 0;
tu_cs_emit_pkt7(cs, CP_LOAD_STATE6_FRAG, 3);
tu_cs_emit(cs, CP_LOAD_STATE6_0_DST_OFF(0) |
@ -1110,9 +1110,9 @@ r3d_src_common(struct tu_cmd_buffer *cmd,
CP_LOAD_STATE6_0_STATE_SRC(SS6_INDIRECT) |
CP_LOAD_STATE6_0_STATE_BLOCK(SB6_FS_TEX) |
CP_LOAD_STATE6_0_NUM_UNIT(1));
tu_cs_emit_qw(cs, texture.iova + A6XX_TEX_CONST_DWORDS * 4);
tu_cs_emit_qw(cs, texture.iova + FDL6_TEX_CONST_DWORDS * 4);
tu_cs_emit_regs(cs, A6XX_SP_PS_SAMPLER_BASE(.qword = texture.iova + A6XX_TEX_CONST_DWORDS * 4));
tu_cs_emit_regs(cs, A6XX_SP_PS_SAMPLER_BASE(.qword = texture.iova + FDL6_TEX_CONST_DWORDS * 4));
tu_cs_emit_pkt7(cs, CP_LOAD_STATE6_FRAG, 3);
tu_cs_emit(cs, CP_LOAD_STATE6_0_DST_OFF(0) |
@ -1134,7 +1134,7 @@ r3d_src(struct tu_cmd_buffer *cmd,
VkFilter filter,
enum pipe_format dst_format)
{
uint32_t desc[A6XX_TEX_CONST_DWORDS];
uint32_t desc[FDL6_TEX_CONST_DWORDS];
memcpy(desc, iview->descriptor, sizeof(desc));
enum a6xx_format fmt =
@ -1158,7 +1158,7 @@ r3d_src_buffer(struct tu_cmd_buffer *cmd,
uint32_t width, uint32_t height,
enum pipe_format dst_format)
{
uint32_t desc[A6XX_TEX_CONST_DWORDS];
uint32_t desc[FDL6_TEX_CONST_DWORDS];
struct tu_native_format fmt = blit_format_texture<CHIP>(format, TILE6_LINEAR, false, false);
enum a6xx_format color_format = fmt.fmt;
@ -1179,7 +1179,7 @@ r3d_src_buffer(struct tu_cmd_buffer *cmd,
desc[3] = 0;
desc[4] = va;
desc[5] = va >> 32;
for (uint32_t i = 6; i < A6XX_TEX_CONST_DWORDS; i++)
for (uint32_t i = 6; i < FDL6_TEX_CONST_DWORDS; i++)
desc[i] = 0;
r3d_src_common(cmd, cs, desc, 0, 0, VK_FILTER_NEAREST);
@ -1192,7 +1192,7 @@ r3d_src_depth(struct tu_cmd_buffer *cmd,
uint32_t layer,
VkFilter filter)
{
uint32_t desc[A6XX_TEX_CONST_DWORDS];
uint32_t desc[FDL6_TEX_CONST_DWORDS];
memcpy(desc, iview->view.descriptor, sizeof(desc));
uint64_t va = iview->depth_base_addr;
@ -1228,7 +1228,7 @@ r3d_src_stencil(struct tu_cmd_buffer *cmd,
uint32_t layer,
VkFilter filter)
{
uint32_t desc[A6XX_TEX_CONST_DWORDS];
uint32_t desc[FDL6_TEX_CONST_DWORDS];
memcpy(desc, iview->view.descriptor, sizeof(desc));
uint64_t va = iview->stencil_base_addr;
@ -1248,7 +1248,7 @@ r3d_src_stencil(struct tu_cmd_buffer *cmd,
desc[3] = A6XX_TEX_CONST_3_ARRAY_PITCH(iview->stencil_layer_size);
desc[4] = va;
desc[5] = va >> 32;
for (unsigned i = 6; i < A6XX_TEX_CONST_DWORDS; i++)
for (unsigned i = 6; i < FDL6_TEX_CONST_DWORDS; i++)
desc[i] = 0;
r3d_src_common(cmd, cs, desc, iview->stencil_layer_size * layer, 0,
@ -1262,7 +1262,7 @@ r3d_src_load(struct tu_cmd_buffer *cmd,
uint32_t layer,
bool override_swap)
{
uint32_t desc[A6XX_TEX_CONST_DWORDS];
uint32_t desc[FDL6_TEX_CONST_DWORDS];
memcpy(desc, iview->view.descriptor, sizeof(desc));
@ -1327,7 +1327,7 @@ r3d_src_gmem(struct tu_cmd_buffer *cmd,
uint32_t gmem_offset,
uint32_t cpp)
{
uint32_t desc[A6XX_TEX_CONST_DWORDS];
uint32_t desc[FDL6_TEX_CONST_DWORDS];
memcpy(desc, iview->view.descriptor, sizeof(desc));
enum a6xx_format fmt =
@ -1369,7 +1369,7 @@ r3d_src_gmem(struct tu_cmd_buffer *cmd,
desc[3] = 0;
desc[4] = cmd->device->physical_device->gmem_base + gmem_offset;
desc[5] = A6XX_TEX_CONST_5_DEPTH(1);
for (unsigned i = 6; i < A6XX_TEX_CONST_DWORDS; i++)
for (unsigned i = 6; i < FDL6_TEX_CONST_DWORDS; i++)
desc[i] = 0;
r3d_src_common(cmd, cs, desc, 0, 0, VK_FILTER_NEAREST);

28
src/freedreno/vulkan/tu_cmd_buffer.cc
View file

@ -2621,7 +2621,7 @@ tu_emit_input_attachments(struct tu_cmd_buffer *cmd,
struct tu_cs_memory texture;
VkResult result = tu_cs_alloc(&cmd->sub_cs, subpass->input_count * 2,
A6XX_TEX_CONST_DWORDS, &texture);
FDL6_TEX_CONST_DWORDS, &texture);
if (result != VK_SUCCESS) {
vk_command_buffer_set_error(&cmd->vk, result);
return (struct tu_draw_state) {};
@ -2635,11 +2635,11 @@ tu_emit_input_attachments(struct tu_cmd_buffer *cmd,
const struct tu_image_view *iview = cmd->state.attachments[a];
const struct tu_render_pass_attachment *att =
&cmd->state.pass->attachments[a];
uint32_t dst[A6XX_TEX_CONST_DWORDS];
uint32_t dst[FDL6_TEX_CONST_DWORDS];
uint32_t gmem_offset = tu_attachment_gmem_offset(cmd, att, 0);
uint32_t cpp = att->cpp;
memcpy(dst, iview->view.descriptor, A6XX_TEX_CONST_DWORDS * 4);
memcpy(dst, iview->view.descriptor, FDL6_TEX_CONST_DWORDS * 4);
/* Cube descriptors require a different sampling instruction in shader,
* however we don't know whether image is a cube or not until the start
@ -2699,7 +2699,7 @@ tu_emit_input_attachments(struct tu_cmd_buffer *cmd,
* assertion failures from register packing below.
*/
!tiling->possible) {
memcpy(&texture.map[i * A6XX_TEX_CONST_DWORDS], dst, sizeof(dst));
memcpy(&texture.map[i * FDL6_TEX_CONST_DWORDS], dst, sizeof(dst));
continue;
}
@ -2737,10 +2737,10 @@ tu_emit_input_attachments(struct tu_cmd_buffer *cmd,
}
dst[4] = cmd->device->physical_device->gmem_base + gmem_offset;
dst[5] &= A6XX_TEX_CONST_5_DEPTH__MASK;
for (unsigned i = 6; i < A6XX_TEX_CONST_DWORDS; i++)
for (unsigned i = 6; i < FDL6_TEX_CONST_DWORDS; i++)
dst[i] = 0;
memcpy(&texture.map[i * A6XX_TEX_CONST_DWORDS], dst, sizeof(dst));
memcpy(&texture.map[i * FDL6_TEX_CONST_DWORDS], dst, sizeof(dst));
}
struct tu_cs cs;
@ -4754,8 +4754,8 @@ tu_bind_descriptor_sets(struct tu_cmd_buffer *cmd,
} else {
uint32_t *dst_desc = dst;
for (unsigned i = 0;
i < binding->size / (4 * A6XX_TEX_CONST_DWORDS);
i++, dst_desc += A6XX_TEX_CONST_DWORDS) {
i < binding->size / (4 * FDL6_TEX_CONST_DWORDS);
i++, dst_desc += FDL6_TEX_CONST_DWORDS) {
/* Note: A6XX_TEX_CONST_5_DEPTH is always 0 */
uint64_t va = dst_desc[4] | ((uint64_t)dst_desc[5] << 32);
uint32_t desc_offset = pkt_field_get(
@ -4813,8 +4813,8 @@ tu_bind_descriptor_sets(struct tu_cmd_buffer *cmd,
VkResult result =
tu_cs_alloc(&cmd->sub_cs,
descriptors_state->max_dynamic_offset_size /
(4 * A6XX_TEX_CONST_DWORDS),
A6XX_TEX_CONST_DWORDS, &dynamic_desc_set);
(4 * FDL6_TEX_CONST_DWORDS),
FDL6_TEX_CONST_DWORDS, &dynamic_desc_set);
if (result != VK_SUCCESS) {
vk_command_buffer_set_error(&cmd->vk, result);
return;
@ -4993,8 +4993,8 @@ tu_push_descriptor_set(struct tu_cmd_buffer *cmd,
struct tu_cs_memory set_mem;
VkResult result = tu_cs_alloc(&cmd->sub_cs,
DIV_ROUND_UP(layout->size, A6XX_TEX_CONST_DWORDS * 4),
A6XX_TEX_CONST_DWORDS, &set_mem);
DIV_ROUND_UP(layout->size, FDL6_TEX_CONST_DWORDS * 4),
FDL6_TEX_CONST_DWORDS, &set_mem);
if (result != VK_SUCCESS) {
vk_command_buffer_set_error(&cmd->vk, result);
return;
@ -5056,8 +5056,8 @@ tu_CmdPushDescriptorSetWithTemplate2KHR(
struct tu_cs_memory set_mem;
VkResult result = tu_cs_alloc(&cmd->sub_cs,
DIV_ROUND_UP(layout->size, A6XX_TEX_CONST_DWORDS * 4),
A6XX_TEX_CONST_DWORDS, &set_mem);
DIV_ROUND_UP(layout->size, FDL6_TEX_CONST_DWORDS * 4),
FDL6_TEX_CONST_DWORDS, &set_mem);
if (result != VK_SUCCESS) {
vk_command_buffer_set_error(&cmd->vk, result);
return;

3
src/freedreno/vulkan/tu_common.h
View file

@ -91,7 +91,7 @@
#define MAX_DYNAMIC_STORAGE_BUFFERS 8
#define MAX_DYNAMIC_BUFFERS_SIZE \
(MAX_DYNAMIC_UNIFORM_BUFFERS + 2 * MAX_DYNAMIC_STORAGE_BUFFERS) * \
A6XX_TEX_CONST_DWORDS
FDL6_TEX_CONST_DWORDS
#define TU_MAX_VIS_STREAMS 4
@ -124,7 +124,6 @@
#define MAX_INLINE_UBO_RANGE 256
#define MAX_INLINE_UBOS 4
#define A6XX_TEX_CONST_DWORDS 16
#define A6XX_TEX_SAMP_DWORDS 4
/* We sample the fragment density map on the CPU, so technically the

48
src/freedreno/vulkan/tu_descriptor_set.cc
View file

@ -54,14 +54,14 @@ descriptor_size(struct tu_device *dev,
* descriptors which are less than 16 dwords. However combined images
* and samplers are actually two descriptors, so they have size 2.
*/
return A6XX_TEX_CONST_DWORDS * 4 * 2;
return FDL6_TEX_CONST_DWORDS * 4 * 2;
case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
/* isam.v allows using a single 16-bit descriptor for both 16-bit and
* 32-bit loads. If not available but 16-bit storage is still supported,
* two separate descriptors are required.
*/
return A6XX_TEX_CONST_DWORDS * 4 * (1 +
return FDL6_TEX_CONST_DWORDS * 4 * (1 +
COND(dev->physical_device->info->props.storage_16bit &&
!dev->physical_device->info->props.has_isam_v, 1) +
COND(dev->physical_device->info->props.storage_8bit, 1));
@ -69,7 +69,7 @@ descriptor_size(struct tu_device *dev,
return binding->descriptorCount;
case VK_DESCRIPTOR_TYPE_ACCELERATION_STRUCTURE_KHR:
default:
return A6XX_TEX_CONST_DWORDS * 4;
return FDL6_TEX_CONST_DWORDS * 4;
}
}
@ -253,7 +253,7 @@ tu_CreateDescriptorSetLayout(
}
uint32_t size =
ALIGN_POT(set_layout->binding[b].array_size * set_layout->binding[b].size, 4 * A6XX_TEX_CONST_DWORDS);
ALIGN_POT(set_layout->binding[b].array_size * set_layout->binding[b].size, 4 * FDL6_TEX_CONST_DWORDS);
if (vk_descriptor_type_is_dynamic(binding->descriptorType)) {
dynamic_offset_size += size;
} else {
@ -367,7 +367,7 @@ tu_GetDescriptorSetLayoutSupport(
} else {
descriptor_sz = descriptor_size(device, binding, binding->descriptorType);
}
uint64_t descriptor_alignment = 4 * A6XX_TEX_CONST_DWORDS;
uint64_t descriptor_alignment = 4 * FDL6_TEX_CONST_DWORDS;
if (size && !ALIGN_POT(size, descriptor_alignment)) {
supported = false;
@ -602,7 +602,7 @@ tu_descriptor_set_create(struct tu_device *device,
&layout->binding[layout->binding_count - 1];
if (binding->type == VK_DESCRIPTOR_TYPE_INLINE_UNIFORM_BLOCK) {
layout_size = binding->offset +
align(variable_count, 4 * A6XX_TEX_CONST_DWORDS);
align(variable_count, 4 * FDL6_TEX_CONST_DWORDS);
} else {
uint32_t stride = binding->size;
layout_size = binding->offset + variable_count * stride;
@ -647,7 +647,7 @@ tu_descriptor_set_create(struct tu_device *device,
unsigned offset = layout->binding[i].offset / 4;
if (layout->binding[i].type == VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
offset += A6XX_TEX_CONST_DWORDS;
offset += FDL6_TEX_CONST_DWORDS;
const struct tu_sampler *samplers =
(const struct tu_sampler *)((const char *)layout +
@ -707,11 +707,11 @@ tu_CreateDescriptorPool(VkDevice _device,
if (inline_info) {
/* We have to factor in the padding for each binding. The sizes are 4
* aligned but we have to align to 4 * A6XX_TEX_CONST_DWORDS bytes, and in
* aligned but we have to align to 4 * FDL6_TEX_CONST_DWORDS bytes, and in
* the worst case each inline binding has a size of 4 bytes and we have
* to pad each one out.
*/
bo_size += (4 * A6XX_TEX_CONST_DWORDS - 4) *
bo_size += (4 * FDL6_TEX_CONST_DWORDS - 4) *
inline_info->maxInlineUniformBlockBindings;
}
@ -732,7 +732,7 @@ tu_CreateDescriptorPool(VkDevice _device,
pool_size->descriptorCount;
} else {
/* Allocate the maximum size possible. */
bo_size += 2 * A6XX_TEX_CONST_DWORDS * 4 *
bo_size += 2 * FDL6_TEX_CONST_DWORDS * 4 *
pool_size->descriptorCount;
}
break;
@ -943,7 +943,7 @@ write_texel_buffer_descriptor_addr(uint32_t *dst,
const VkDescriptorAddressInfoEXT *buffer_info)
{
if (!buffer_info || buffer_info->address == 0) {
memset(dst, 0, A6XX_TEX_CONST_DWORDS * sizeof(uint32_t));
memset(dst, 0, FDL6_TEX_CONST_DWORDS * sizeof(uint32_t));
} else {
uint8_t swiz[4] = { PIPE_SWIZZLE_X, PIPE_SWIZZLE_Y, PIPE_SWIZZLE_Z,
PIPE_SWIZZLE_W };
@ -957,7 +957,7 @@ static void
write_texel_buffer_descriptor(uint32_t *dst, const VkBufferView buffer_view)
{
if (buffer_view == VK_NULL_HANDLE) {
memset(dst, 0, A6XX_TEX_CONST_DWORDS * sizeof(uint32_t));
memset(dst, 0, FDL6_TEX_CONST_DWORDS * sizeof(uint32_t));
} else {
VK_FROM_HANDLE(tu_buffer_view, view, buffer_view);
@ -1000,7 +1000,7 @@ write_buffer_descriptor_addr(const struct tu_device *device,
unsigned num_descriptors = 1 +
COND(info->props.storage_16bit && !info->props.has_isam_v, 1) +
COND(info->props.storage_8bit, 1);
memset(dst, 0, num_descriptors * A6XX_TEX_CONST_DWORDS * sizeof(uint32_t));
memset(dst, 0, num_descriptors * FDL6_TEX_CONST_DWORDS * sizeof(uint32_t));
if (!buffer_info || buffer_info->address == 0)
return;
@ -1019,7 +1019,7 @@ write_buffer_descriptor_addr(const struct tu_device *device,
A6XX_TEX_CONST_2_TYPE(A6XX_TEX_BUFFER);
dst[4] = A6XX_TEX_CONST_4_BASE_LO(base_va);
dst[5] = A6XX_TEX_CONST_5_BASE_HI(base_va >> 32);
dst += A6XX_TEX_CONST_DWORDS;
dst += FDL6_TEX_CONST_DWORDS;
}
/* Set up the 32-bit descriptor when 16-bit storage isn't supported or the
@ -1034,7 +1034,7 @@ write_buffer_descriptor_addr(const struct tu_device *device,
A6XX_TEX_CONST_2_TYPE(A6XX_TEX_BUFFER);
dst[4] = A6XX_TEX_CONST_4_BASE_LO(base_va);
dst[5] = A6XX_TEX_CONST_5_BASE_HI(base_va >> 32);
dst += A6XX_TEX_CONST_DWORDS;
dst += FDL6_TEX_CONST_DWORDS;
}
if (info->props.storage_8bit) {
@ -1087,7 +1087,7 @@ write_image_descriptor(uint32_t *dst,
const VkDescriptorImageInfo *image_info)
{
if (!image_info || image_info->imageView == VK_NULL_HANDLE) {
memset(dst, 0, A6XX_TEX_CONST_DWORDS * sizeof(uint32_t));
memset(dst, 0, FDL6_TEX_CONST_DWORDS * sizeof(uint32_t));
return;
}
@ -1111,7 +1111,7 @@ write_combined_image_sampler_descriptor(uint32_t *dst,
if (has_sampler) {
VK_FROM_HANDLE(tu_sampler, sampler, image_info->sampler);
memcpy(dst + A6XX_TEX_CONST_DWORDS, sampler->descriptor, sizeof(sampler->descriptor));
memcpy(dst + FDL6_TEX_CONST_DWORDS, sampler->descriptor, sizeof(sampler->descriptor));
}
}
@ -1141,7 +1141,7 @@ write_accel_struct(uint32_t *dst, uint64_t va)
dst[3] = 0;
dst[4] = A6XX_TEX_CONST_4_BASE_LO(va);
dst[5] = A6XX_TEX_CONST_5_BASE_HI(va >> 32);
for (int j = 6; j < A6XX_TEX_CONST_DWORDS; j++)
for (int j = 6; j < FDL6_TEX_CONST_DWORDS; j++)
dst[j] = 0;
}
@ -1311,7 +1311,7 @@ tu_update_descriptor_sets(const struct tu_device *device,
!binding_layout->immutable_samplers_offset);
if (copy_immutable_samplers)
write_sampler_push(ptr + A6XX_TEX_CONST_DWORDS, &samplers[writeset->dstArrayElement + j]);
write_sampler_push(ptr + FDL6_TEX_CONST_DWORDS, &samplers[writeset->dstArrayElement + j]);
break;
case VK_DESCRIPTOR_TYPE_SAMPLER:
if (!binding_layout->immutable_samplers_offset)
@ -1386,15 +1386,15 @@ tu_update_descriptor_sets(const struct tu_device *device,
if (src_remaining == 0) {
src_binding_layout++;
src_ptr = src_set->mapped_ptr + src_binding_layout->offset / 4;
src = (uint8_t *)(src_ptr + A6XX_TEX_CONST_DWORDS);
src_remaining = src_binding_layout->size - 4 * A6XX_TEX_CONST_DWORDS;
src = (uint8_t *)(src_ptr + FDL6_TEX_CONST_DWORDS);
src_remaining = src_binding_layout->size - 4 * FDL6_TEX_CONST_DWORDS;
}
if (dst_remaining == 0) {
dst_binding_layout++;
dst_ptr = dst_set->mapped_ptr + dst_binding_layout->offset / 4;
dst = (uint8_t *)(dst_ptr + A6XX_TEX_CONST_DWORDS);
dst_remaining = dst_binding_layout->size - 4 * A6XX_TEX_CONST_DWORDS;
dst = (uint8_t *)(dst_ptr + FDL6_TEX_CONST_DWORDS);
dst_remaining = dst_binding_layout->size - 4 * FDL6_TEX_CONST_DWORDS;
}
} while (remaining > 0);
@ -1653,7 +1653,7 @@ tu_update_descriptor_set_with_template(
(const VkDescriptorImageInfo *) src,
templ->entry[i].has_sampler);
if (samplers)
write_sampler_push(ptr + A6XX_TEX_CONST_DWORDS, &samplers[j]);
write_sampler_push(ptr + FDL6_TEX_CONST_DWORDS, &samplers[j]);
break;
case VK_DESCRIPTOR_TYPE_SAMPLER:
if (templ->entry[i].has_sampler)

34
src/freedreno/vulkan/tu_device.cc
View file

@ -865,14 +865,14 @@ tu_get_physical_device_properties_1_1(struct tu_physical_device *pdevice,
/* Our largest descriptors are 2 texture descriptors, or a texture and
* sampler descriptor.
*/
p->maxPerSetDescriptors = MAX_SET_SIZE / (2 * A6XX_TEX_CONST_DWORDS * 4);
p->maxPerSetDescriptors = MAX_SET_SIZE / (2 * FDL6_TEX_CONST_DWORDS * 4);
/* Our buffer size fields allow only this much */
p->maxMemoryAllocationSize = 0xFFFFFFFFull;
}
static const size_t max_descriptor_set_size = MAX_SET_SIZE / (4 * A6XX_TEX_CONST_DWORDS);
static const size_t max_descriptor_set_size = MAX_SET_SIZE / (4 * FDL6_TEX_CONST_DWORDS);
static const VkSampleCountFlags sample_counts =
VK_SAMPLE_COUNT_1_BIT | VK_SAMPLE_COUNT_2_BIT | VK_SAMPLE_COUNT_4_BIT;
static const VkSampleCountFlags sample_location_counts =
@ -1336,7 +1336,7 @@ tu_get_properties(struct tu_physical_device *pdevice,
props->combinedImageSamplerDescriptorSingleArray = true;
props->bufferlessPushDescriptors = true;
props->allowSamplerImageViewPostSubmitCreation = true;
props->descriptorBufferOffsetAlignment = A6XX_TEX_CONST_DWORDS * 4;
props->descriptorBufferOffsetAlignment = FDL6_TEX_CONST_DWORDS * 4;
props->maxDescriptorBufferBindings = pdevice->usable_sets;
props->maxResourceDescriptorBufferBindings = pdevice->usable_sets;
props->maxSamplerDescriptorBufferBindings = pdevice->usable_sets;
@ -1348,29 +1348,29 @@ tu_get_properties(struct tu_physical_device *pdevice,
props->samplerCaptureReplayDescriptorDataSize = 0;
props->accelerationStructureCaptureReplayDescriptorDataSize = 0;
/* Note: these sizes must match descriptor_size() */
props->samplerDescriptorSize = A6XX_TEX_CONST_DWORDS * 4;
props->combinedImageSamplerDescriptorSize = 2 * A6XX_TEX_CONST_DWORDS * 4;
props->sampledImageDescriptorSize = A6XX_TEX_CONST_DWORDS * 4;
props->storageImageDescriptorSize = A6XX_TEX_CONST_DWORDS * 4;
props->uniformTexelBufferDescriptorSize = A6XX_TEX_CONST_DWORDS * 4;
props->robustUniformTexelBufferDescriptorSize = A6XX_TEX_CONST_DWORDS * 4;
props->storageTexelBufferDescriptorSize = A6XX_TEX_CONST_DWORDS * 4;
props->robustStorageTexelBufferDescriptorSize = A6XX_TEX_CONST_DWORDS * 4;
props->uniformBufferDescriptorSize = A6XX_TEX_CONST_DWORDS * 4;
props->robustUniformBufferDescriptorSize = A6XX_TEX_CONST_DWORDS * 4;
props->storageBufferDescriptorSize = A6XX_TEX_CONST_DWORDS * 4 * (1 +
props->samplerDescriptorSize = FDL6_TEX_CONST_DWORDS * 4;
props->combinedImageSamplerDescriptorSize = 2 * FDL6_TEX_CONST_DWORDS * 4;
props->sampledImageDescriptorSize = FDL6_TEX_CONST_DWORDS * 4;
props->storageImageDescriptorSize = FDL6_TEX_CONST_DWORDS * 4;
props->uniformTexelBufferDescriptorSize = FDL6_TEX_CONST_DWORDS * 4;
props->robustUniformTexelBufferDescriptorSize = FDL6_TEX_CONST_DWORDS * 4;
props->storageTexelBufferDescriptorSize = FDL6_TEX_CONST_DWORDS * 4;
props->robustStorageTexelBufferDescriptorSize = FDL6_TEX_CONST_DWORDS * 4;
props->uniformBufferDescriptorSize = FDL6_TEX_CONST_DWORDS * 4;
props->robustUniformBufferDescriptorSize = FDL6_TEX_CONST_DWORDS * 4;
props->storageBufferDescriptorSize = FDL6_TEX_CONST_DWORDS * 4 * (1 +
COND(pdevice->info->props.storage_16bit && !pdevice->info->props.has_isam_v, 1) +
COND(pdevice->info->props.storage_8bit, 1));
props->robustStorageBufferDescriptorSize =
props->storageBufferDescriptorSize;
props->accelerationStructureDescriptorSize = 4 * A6XX_TEX_CONST_DWORDS;
props->inputAttachmentDescriptorSize = A6XX_TEX_CONST_DWORDS * 4;
props->accelerationStructureDescriptorSize = 4 * FDL6_TEX_CONST_DWORDS;
props->inputAttachmentDescriptorSize = FDL6_TEX_CONST_DWORDS * 4;
props->maxSamplerDescriptorBufferRange = ~0ull;
props->maxResourceDescriptorBufferRange = ~0ull;
props->samplerDescriptorBufferAddressSpaceSize = ~0ull;
props->resourceDescriptorBufferAddressSpaceSize = ~0ull;
props->descriptorBufferAddressSpaceSize = ~0ull;
props->combinedImageSamplerDensityMapDescriptorSize = 2 * A6XX_TEX_CONST_DWORDS * 4;
props->combinedImageSamplerDensityMapDescriptorSize = 2 * FDL6_TEX_CONST_DWORDS * 4;
/* VK_EXT_legacy_vertex_attributes */
props->nativeUnalignedPerformance = true;

10
src/freedreno/vulkan/tu_pipeline.cc
View file

@ -178,7 +178,7 @@ tu6_emit_load_state(struct tu_device *device,
case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
case VK_DESCRIPTOR_TYPE_ACCELERATION_STRUCTURE_KHR: {
unsigned mul = binding->size / (A6XX_TEX_CONST_DWORDS * 4);
unsigned mul = binding->size / (FDL6_TEX_CONST_DWORDS * 4);
/* UAV-backed resources only need one packet for all graphics stages */
if (stages & ~VK_SHADER_STAGE_COMPUTE_BIT) {
emit_load_state(&cs, CP_LOAD_STATE6, ST6_SHADER, SB6_UAV,
@ -225,8 +225,8 @@ tu6_emit_load_state(struct tu_device *device,
* struct-of-arrays instead of array-of-structs.
*/
for (unsigned i = 0; i < count; i++) {
unsigned tex_offset = offset + 2 * i * A6XX_TEX_CONST_DWORDS;
unsigned sam_offset = offset + (2 * i + 1) * A6XX_TEX_CONST_DWORDS;
unsigned tex_offset = offset + 2 * i * FDL6_TEX_CONST_DWORDS;
unsigned sam_offset = offset + (2 * i + 1) * FDL6_TEX_CONST_DWORDS;
emit_load_state(&cs, tu6_stage2opcode(stage),
ST6_CONSTANTS, tu6_stage2texsb(stage),
base, tex_offset, 1);
@ -425,7 +425,7 @@ tu6_emit_dynamic_offset(struct tu_cs *cs,
uint32_t offsets[MAX_SETS];
for (unsigned i = 0; i < phys_dev->usable_sets; i++) {
unsigned dynamic_offset_start =
program->dynamic_descriptor_offsets[i] / (A6XX_TEX_CONST_DWORDS * 4);
program->dynamic_descriptor_offsets[i] / (FDL6_TEX_CONST_DWORDS * 4);
offsets[i] = dynamic_offset_start;
}
@ -458,7 +458,7 @@ tu6_emit_dynamic_offset(struct tu_cs *cs,
for (unsigned i = 0; i < phys_dev->usable_sets; i++) {
unsigned dynamic_offset_start =
program->dynamic_descriptor_offsets[i] / (A6XX_TEX_CONST_DWORDS * 4);
program->dynamic_descriptor_offsets[i] / (FDL6_TEX_CONST_DWORDS * 4);
tu_cs_emit(cs, dynamic_offset_start);
}
}

12
src/freedreno/vulkan/tu_shader.cc
View file

@ -347,7 +347,7 @@ lower_vulkan_resource_index(struct tu_device *dev, nir_builder *b,
* with fast linking means after the shader is compiled. We have to
* get it from the const file instead.
*/
base = nir_imm_int(b, binding_layout->dynamic_offset_offset / (4 * A6XX_TEX_CONST_DWORDS));
base = nir_imm_int(b, binding_layout->dynamic_offset_offset / (4 * FDL6_TEX_CONST_DWORDS));
nir_def *dynamic_offset_start;
if (compiler->load_shader_consts_via_preamble) {
dynamic_offset_start =
@ -360,14 +360,14 @@ lower_vulkan_resource_index(struct tu_device *dev, nir_builder *b,
base = nir_iadd(b, base, dynamic_offset_start);
} else {
base = nir_imm_int(b, (offset +
binding_layout->dynamic_offset_offset) / (4 * A6XX_TEX_CONST_DWORDS));
binding_layout->dynamic_offset_offset) / (4 * FDL6_TEX_CONST_DWORDS));
}
assert(dev->physical_device->reserved_set_idx >= 0);
set = dev->physical_device->reserved_set_idx;
} else
base = nir_imm_int(b, binding_layout->offset / (4 * A6XX_TEX_CONST_DWORDS));
base = nir_imm_int(b, binding_layout->offset / (4 * FDL6_TEX_CONST_DWORDS));
unsigned stride = binding_layout->size / (4 * A6XX_TEX_CONST_DWORDS);
unsigned stride = binding_layout->size / (4 * FDL6_TEX_CONST_DWORDS);
assert(util_is_power_of_two_nonzero(stride));
nir_def *shift = nir_imm_int(b, util_logbase2(stride));
@ -573,9 +573,9 @@ build_bindless(struct tu_device *dev, nir_builder *b,
offset = 1;
}
desc_offset =
nir_imm_int(b, (bind_layout->offset / (4 * A6XX_TEX_CONST_DWORDS)) +
nir_imm_int(b, (bind_layout->offset / (4 * FDL6_TEX_CONST_DWORDS)) +
offset);
descriptor_stride = bind_layout->size / (4 * A6XX_TEX_CONST_DWORDS);
descriptor_stride = bind_layout->size / (4 * FDL6_TEX_CONST_DWORDS);
if (deref->deref_type != nir_deref_type_var) {
assert(deref->deref_type == nir_deref_type_array);