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pan/bi: Introduce segments into the IR
Needed to select between global, UBO, TLS, and WLS addressing modes, required to implement loads/stores correctly. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Daniel Stone <daniels@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6749>
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4 changed files with 44 additions and 0 deletions
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@ -27,6 +27,18 @@
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#include "bi_print.h"
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#include "bi_print_common.h"
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static const char *
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bi_segment_name(enum bi_segment seg)
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{
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switch (seg) {
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case BI_SEGMENT_NONE: return "global";
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case BI_SEGMENT_WLS: return "wls";
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case BI_SEGMENT_UBO: return "ubo";
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case BI_SEGMENT_TLS: return "tls";
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default: return "invalid";
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}
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}
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const char *
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bi_class_name(enum bi_class cl)
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{
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@ -275,6 +287,9 @@ bi_print_instruction(bi_instruction *ins, FILE *fp)
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if (ins->vector_channels)
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fprintf(fp, ".v%u", ins->vector_channels);
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if (ins->segment)
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fprintf(fp, ".%s", bi_segment_name(ins->segment));
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if (ins->dest)
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pan_print_alu_type(ins->dest_type, fp);
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@ -230,6 +230,7 @@ bi_emit_ld_uniform(bi_context *ctx, nir_intrinsic_instr *instr)
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{
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bi_instruction ld = bi_load(BI_LOAD_UNIFORM, instr);
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ld.src[1] = BIR_INDEX_ZERO; /* TODO: UBO index */
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ld.segment = BI_SEGMENT_UBO;
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/* TODO: Indirect access, since we need to multiply by the element
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* size. I believe we can get this lowering automatically via
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@ -259,6 +260,7 @@ bi_emit_sysval(bi_context *ctx, nir_instr *instr,
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bi_instruction load = {
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.type = BI_LOAD_UNIFORM,
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.segment = BI_SEGMENT_UBO,
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.vector_channels = nr_components,
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.src = { BIR_INDEX_CONSTANT, BIR_INDEX_ZERO },
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.src_types = { nir_type_uint32, nir_type_uint32 },
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@ -155,6 +155,29 @@ enum bi_cond {
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BI_COND_NE,
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};
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/* Segments, as synced with ISA. Used as an immediate in LOAD/STORE
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* instructions for address calculation, and directly in SEG_ADD/SEG_SUB
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* instructions. */
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enum bi_segment {
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/* No segment (use global addressing, offset from GPU VA 0x0) */
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BI_SEGMENT_NONE = 1,
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/* Within workgroup local memory (shared memory). Relative to
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* wls_base_pointer in the draw's thread storage descriptor */
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BI_SEGMENT_WLS = 2,
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/* Within one of the bound uniform buffers. Low 32-bits are the index
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* within the uniform buffer; high 32-bits are the index of the uniform
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* buffer itself. Relative to the uniform_array_pointer indexed within
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* the draw's uniform remap table indexed by the high 32-bits. */
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BI_SEGMENT_UBO = 4,
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/* Within thread local storage (for spilling). Relative to
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* tls_base_pointer in the draw's thread storage descriptor */
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BI_SEGMENT_TLS = 7
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};
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/* Opcodes within a class */
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enum bi_minmax_op {
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BI_MINMAX_MIN,
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@ -275,6 +298,9 @@ typedef struct {
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/* The comparison op. BI_COND_ALWAYS may not be valid. */
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enum bi_cond cond;
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/* For memory ops, base address */
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enum bi_segment segment;
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/* A class-specific op from which the actual opcode can be derived
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* (along with the above information) */
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@ -46,6 +46,7 @@ bit_test_single(struct panfrost_device *dev,
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bi_instruction ldubo = {
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.type = BI_LOAD_UNIFORM,
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.segment = BI_SEGMENT_UBO,
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.src = {
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BIR_INDEX_CONSTANT,
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BIR_INDEX_ZERO
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