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radeonsi: allocate protected buffer only if required
protected buffer allocations need to be made if the context is secure Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14848>
This commit is contained in:
parent
eaa87b1a46
commit
6f17d8acc9
3 changed files with 43 additions and 21 deletions
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@ -88,8 +88,23 @@ void si_cp_release_mem(struct si_context *ctx, struct radeon_cmdbuf *cs, unsigne
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if (ctx->chip_class == GFX9 && !compute_ib && query_type != PIPE_QUERY_OCCLUSION_COUNTER &&
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query_type != PIPE_QUERY_OCCLUSION_PREDICATE &&
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query_type != PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE) {
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struct si_resource *scratch = unlikely(ctx->ws->cs_is_secure(&ctx->gfx_cs)) ?
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ctx->eop_bug_scratch_tmz : ctx->eop_bug_scratch;
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struct si_screen *sscreen = ctx->screen;
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struct si_resource *scratch;
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if (!ctx->ws->cs_is_secure(&ctx->gfx_cs)) {
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scratch = ctx->eop_bug_scratch;
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} else {
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assert(ctx->screen->info.has_tmz_support);
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if (!ctx->eop_bug_scratch_tmz)
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ctx->eop_bug_scratch_tmz =
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si_aligned_buffer_create(&sscreen->b,
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PIPE_RESOURCE_FLAG_ENCRYPTED |
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SI_RESOURCE_FLAG_DRIVER_INTERNAL,
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PIPE_USAGE_DEFAULT,
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16 * sscreen->info.max_render_backends, 256);
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scratch = ctx->eop_bug_scratch_tmz;
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}
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assert(16 * ctx->screen->info.max_render_backends <= scratch->b.b.width0);
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radeon_emit(PKT3(PKT3_EVENT_WRITE, 2, 0));
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@ -594,6 +594,27 @@ void si_emit_surface_sync(struct si_context *sctx, struct radeon_cmdbuf *cs, uns
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sctx->context_roll = true;
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}
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static struct si_resource* si_get_wait_mem_scratch_bo(struct si_context *ctx, bool is_secure)
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{
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struct si_screen *sscreen = ctx->screen;
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if (likely(!is_secure)) {
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return ctx->wait_mem_scratch;
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} else {
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assert(sscreen->info.has_tmz_support);
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if (!ctx->wait_mem_scratch_tmz)
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ctx->wait_mem_scratch_tmz =
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si_aligned_buffer_create(&sscreen->b,
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SI_RESOURCE_FLAG_UNMAPPABLE |
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SI_RESOURCE_FLAG_DRIVER_INTERNAL |
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PIPE_RESOURCE_FLAG_ENCRYPTED,
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PIPE_USAGE_DEFAULT, 8,
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sscreen->info.tcc_cache_line_size);
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return ctx->wait_mem_scratch_tmz;
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}
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}
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void gfx10_emit_cache_flush(struct si_context *ctx, struct radeon_cmdbuf *cs)
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{
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uint32_t gcr_cntl = 0;
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@ -702,8 +723,8 @@ void gfx10_emit_cache_flush(struct si_context *ctx, struct radeon_cmdbuf *cs)
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radeon_end();
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if (cb_db_event) {
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struct si_resource* wait_mem_scratch = unlikely(ctx->ws->cs_is_secure(cs)) ?
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ctx->wait_mem_scratch_tmz : ctx->wait_mem_scratch;
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struct si_resource* wait_mem_scratch =
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si_get_wait_mem_scratch_bo(ctx, ctx->ws->cs_is_secure(cs));
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/* CB/DB flush and invalidate (or possibly just a wait for a
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* meta flush) via RELEASE_MEM.
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*
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@ -942,8 +963,9 @@ void si_emit_cache_flush(struct si_context *sctx, struct radeon_cmdbuf *cs)
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}
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/* Do the flush (enqueue the event and wait for it). */
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struct si_resource* wait_mem_scratch = unlikely(sctx->ws->cs_is_secure(cs)) ?
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sctx->wait_mem_scratch_tmz : sctx->wait_mem_scratch;
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struct si_resource* wait_mem_scratch =
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si_get_wait_mem_scratch_bo(sctx, sctx->ws->cs_is_secure(cs));
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va = wait_mem_scratch->gpu_address;
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sctx->wait_mem_number++;
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@ -486,10 +486,6 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign
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sctx->eop_bug_scratch = si_aligned_buffer_create(
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&sscreen->b, SI_RESOURCE_FLAG_DRIVER_INTERNAL,
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PIPE_USAGE_DEFAULT, 16 * sscreen->info.max_render_backends, 256);
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if (sctx->screen->info.has_tmz_support)
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sctx->eop_bug_scratch_tmz = si_aligned_buffer_create(
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&sscreen->b, PIPE_RESOURCE_FLAG_ENCRYPTED | SI_RESOURCE_FLAG_DRIVER_INTERNAL,
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PIPE_USAGE_DEFAULT, 16 * sscreen->info.max_render_backends, 256);
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if (!sctx->eop_bug_scratch)
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goto fail;
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}
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@ -658,17 +654,6 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign
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sscreen->info.tcc_cache_line_size);
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if (!sctx->wait_mem_scratch)
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goto fail;
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if (sscreen->info.has_tmz_support) {
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sctx->wait_mem_scratch_tmz =
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si_aligned_buffer_create(screen,
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SI_RESOURCE_FLAG_UNMAPPABLE | SI_RESOURCE_FLAG_DRIVER_INTERNAL |
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PIPE_RESOURCE_FLAG_ENCRYPTED,
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PIPE_USAGE_DEFAULT, 8,
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sscreen->info.tcc_cache_line_size);
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if (!sctx->wait_mem_scratch_tmz)
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goto fail;
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}
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}
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/* GFX7 cannot unbind a constant buffer (S_BUFFER_LOAD doesn't skip loads
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