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https://gitlab.freedesktop.org/mesa/mesa.git
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Merge branch 'pan_blit_with_run_fullscreen' into 'main'
Draft: panfrost: Blit with the RUN_FULLSCREEN instruction See merge request mesa/mesa!40124
This commit is contained in:
commit
6efb3cb766
12 changed files with 336 additions and 24 deletions
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@ -72,13 +72,11 @@ struct blitter_context
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*
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* \param type Semantics of the attributes "attrib".
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* If type is UTIL_BLITTER_ATTRIB_NONE, ignore them.
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* If type is UTIL_BLITTER_ATTRIB_COLOR, the attributes
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* make up a constant RGBA color, and should go
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* to the GENERIC0 varying slot of a fragment shader.
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* If type is UTIL_BLITTER_ATTRIB_TEXCOORD, {a1, a2} and
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* {a3, a4} specify top-left and bottom-right texture
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* coordinates of the rectangle, respectively, and should go
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* to the GENERIC0 varying slot of a fragment shader.
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* If type is UTIL_BLITTER_ATTRIB_TEXCOORD_XY or
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* UTIL_BLITTER_ATTRIB_TEXCOORD_XYZW, attrib stores the
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* 2-component or 4-component texture coordinates of the
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* rectangle, and should go to the GENERIC0 varying slot of a
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* fragment shader.
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*
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* \param attrib See type.
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*
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@ -10,6 +10,97 @@
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#include "pan_trace.h"
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#include "pan_util.h"
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/* XXX Using a custom fragment shader for textured blits would allow to get
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* rid of the texcoords (and varying interp) using fragment position
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* instead.
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* XXX Depth and stencil clears with the same value could reuse a common
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* DrawCallDescriptor.
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*/
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#define TRANSFORM_TXF(coord, scale, translate) \
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((float)(coord) * (scale) + (translate))
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static void
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panfrost_blitter_draw_rectangle(struct blitter_context *blitter,
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void *vertex_elements_cso,
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blitter_get_vs_func get_vs,
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int x1, int y1, int x2, int y2,
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float depth, unsigned num_instances,
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enum blitter_attrib_type type,
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const struct blitter_attrib *attrib)
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{
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assert(num_instances);
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assert(type == UTIL_BLITTER_ATTRIB_NONE ||
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type == UTIL_BLITTER_ATTRIB_TEXCOORD_XY ||
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type == UTIL_BLITTER_ATTRIB_TEXCOORD_XYZW);
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/* Fall back to draw_vbo. */
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if (num_instances > 1)
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util_blitter_draw_rectangle(blitter, vertex_elements_cso, get_vs, x1,
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y1, x2, y2, depth, num_instances, type,
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attrib);
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struct pipe_context *ctx = blitter->pipe;
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struct panfrost_context *pctx = pan_context(ctx);
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struct panfrost_screen *scr = pan_screen(ctx->screen);
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/* Set the viewport so that it maps to the dest rect of the framebuffer.
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* The tiler will then be configured to use it as scissor box in order to
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* clip fullscreen fragments lying outside.
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*
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* Note that: tx = x1 + ((x2 - x1) / 2) = (x2 + x1) / 2
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* ty = y1 + ((y2 - y1) / 2) = (y2 + y1) / 2
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*/
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const struct pipe_viewport_state viewport_state = {
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.scale = { 0.5f * (x2 - x1), 0.5f * (y2 - y1), 1.0f },
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.translate = { 0.5f * (x2 + x1), 0.5f * (y2 + y1), 0.0f },
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.swizzle_x = PIPE_VIEWPORT_SWIZZLE_POSITIVE_X,
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.swizzle_y = PIPE_VIEWPORT_SWIZZLE_POSITIVE_Y,
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.swizzle_z = PIPE_VIEWPORT_SWIZZLE_POSITIVE_Z,
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.swizzle_w = PIPE_VIEWPORT_SWIZZLE_POSITIVE_W
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};
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ctx->set_viewport_states(ctx, 0, 1, &viewport_state);
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/* Map fullscreen texcoords to the framebuffer, then normalize if not using
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* texel fetch. */
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struct blitter_attrib fs_attrib;
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if (attrib != UTIL_BLITTER_ATTRIB_NONE) {
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float w = pctx->pipe_framebuffer.width;
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float h = pctx->pipe_framebuffer.height;
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fs_attrib.texcoord.x1 = TRANSFORM_TXF(0.0f, w, -x1);
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fs_attrib.texcoord.y1 = TRANSFORM_TXF(0.0f, h, -y1);
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fs_attrib.texcoord.x2 = TRANSFORM_TXF(1.0f, w, -x1);
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fs_attrib.texcoord.y2 = TRANSFORM_TXF(1.0f, h, -y1);
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fs_attrib.texcoord.z = attrib->texcoord.z;
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fs_attrib.texcoord.w = attrib->texcoord.w;
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if (attrib->texcoord.x2 <= 1.0f && attrib->texcoord.y2 <= 1.0f) {
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float inv_w = 1.0f / w;
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float inv_h = 1.0f / h;
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fs_attrib.texcoord.x1 *= inv_w;
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fs_attrib.texcoord.y1 *= inv_h;
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fs_attrib.texcoord.x2 *= inv_w;
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fs_attrib.texcoord.y2 *= inv_h;
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}
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};
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/* Run tiling of a fullscreen fragment job using RUN_FULLSCREEN. */
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scr->vtbl.draw_fullscreen(pan_context(ctx), get_vs(blitter), type,
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&fs_attrib);
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}
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struct blitter_context *
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panfrost_blitter_create(struct pipe_context *pipe)
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{
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struct blitter_context *blitter;
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blitter = util_blitter_create(pipe);
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if (pan_screen(pipe->screen)->dev.arch == 10)
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blitter->draw_rectangle = panfrost_blitter_draw_rectangle;
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return blitter;
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}
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void
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panfrost_blitter_save(struct panfrost_context *ctx,
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const enum panfrost_blitter_op blitter_op)
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@ -3332,13 +3332,12 @@ panfrost_increase_vertex_count(struct panfrost_batch *batch, uint32_t increment)
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* because all dirty flags are set there.
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*/
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static void
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panfrost_update_active_prim(struct panfrost_context *ctx,
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const struct pipe_draw_info *info)
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panfrost_update_active_prim(struct panfrost_context *ctx, enum mesa_prim prim)
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{
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const enum mesa_prim prev_prim = u_reduced_prim(ctx->active_prim);
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const enum mesa_prim new_prim = u_reduced_prim(info->mode);
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const enum mesa_prim new_prim = u_reduced_prim(prim);
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ctx->active_prim = info->mode;
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ctx->active_prim = prim;
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if ((ctx->dirty & PAN_DIRTY_RASTERIZER) ||
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(prev_prim != new_prim)) {
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@ -3405,7 +3404,7 @@ panfrost_single_draw_direct(struct panfrost_batch *batch,
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struct panfrost_context *ctx = batch->ctx;
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panfrost_update_active_prim(ctx, info);
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panfrost_update_active_prim(ctx, info->mode);
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/* Take into account a negative bias */
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ctx->vertex_count =
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@ -3480,7 +3479,7 @@ panfrost_compatible_batch_state(struct panfrost_batch *batch,
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}
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static struct panfrost_batch *
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prepare_draw(struct pipe_context *pipe, const struct pipe_draw_info *info)
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prepare_draw(struct pipe_context *pipe, enum mesa_prim prim)
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{
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struct panfrost_context *ctx = pan_context(pipe);
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struct panfrost_device *dev = pan_device(pipe->screen);
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@ -3502,7 +3501,7 @@ prepare_draw(struct pipe_context *pipe, const struct pipe_draw_info *info)
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return NULL;
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}
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enum mesa_prim reduced_prim = u_reduced_prim(info->mode);
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enum mesa_prim reduced_prim = u_reduced_prim(prim);
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if (unlikely(!panfrost_compatible_batch_state(batch, reduced_prim))) {
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batch = panfrost_get_fresh_batch_for_fbo(ctx, "State change");
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@ -3545,7 +3544,7 @@ panfrost_draw_indirect(struct pipe_context *pipe,
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return;
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}
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struct panfrost_batch *batch = prepare_draw(pipe, info);
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struct panfrost_batch *batch = prepare_draw(pipe, info->mode);
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if (!batch) {
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mesa_loge("prepare_draw failed");
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return;
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@ -3556,7 +3555,7 @@ panfrost_draw_indirect(struct pipe_context *pipe,
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panfrost_batch_read_rsrc(batch, pan_resource(indirect->buffer),
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MESA_SHADER_VERTEX);
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panfrost_update_active_prim(ctx, &tmp_info);
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panfrost_update_active_prim(ctx, info->mode);
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ctx->drawid = drawid_offset;
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@ -3594,7 +3593,7 @@ panfrost_multi_draw_direct(struct pipe_context *pipe,
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unsigned num_draws)
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{
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struct panfrost_context *ctx = pan_context(pipe);
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struct panfrost_batch *batch = prepare_draw(pipe, info);
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struct panfrost_batch *batch = prepare_draw(pipe, info->mode);
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if (!batch) {
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mesa_loge("prepare_draw failed");
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return;
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@ -3637,6 +3636,44 @@ panfrost_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
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}
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}
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static void
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panfrost_draw_fullscreen(struct panfrost_context *ctx,
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struct panfrost_uncompiled_shader *vs,
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enum blitter_attrib_type type,
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const struct blitter_attrib *attrib)
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{
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assert(!ctx->cond_query);
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assert(!ctx->active_queries);
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assert(!ctx->streamout.num_targets);
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PAN_TRACE_FUNC(PAN_TRACE_GL_CMDSTREAM);
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ctx->draw_calls++;
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struct panfrost_batch *batch = prepare_draw(&ctx->base, MESA_PRIM_QUADS);
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if (!batch) {
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mesa_loge("prepare_draw failed");
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return;
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}
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/* RUN_FULLSCREEN doesn't configure any position or varying shader but link
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* info is needed. The active primitive update takes care of the fragment
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* shader variant update. */
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ctx->uncompiled[MESA_SHADER_VERTEX] = vs;
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panfrost_update_shader_variant(ctx, MESA_SHADER_VERTEX);
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panfrost_update_active_prim(ctx, MESA_PRIM_QUADS);
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/* Clear the dirty vertex flag to ensure the shader state update doesn't
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* emit any vertex info. */
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ctx->dirty &= ~PAN_DIRTY_VERTEX;
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panfrost_update_state_3d(batch);
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panfrost_update_shader_state(batch, MESA_SHADER_FRAGMENT);
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panfrost_clean_state_3d(ctx);
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JOBX(launch_draw_fullscreen)(batch, type, attrib);
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batch->draw_count++;
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}
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/* Launch grid is the compute equivalent of draw_vbo, so in this routine, we
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* construct the COMPUTE job and some of its payload.
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*/
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@ -4655,6 +4692,7 @@ GENX(panfrost_cmdstream_screen_init)(struct panfrost_screen *screen)
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screen->vtbl.emit_write_timestamp = emit_write_timestamp;
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screen->vtbl.select_tile_size = GENX(pan_select_tile_size);
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screen->vtbl.get_conv_desc = get_conv_desc;
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screen->vtbl.draw_fullscreen = panfrost_draw_fullscreen;
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pan_blend_shader_cache_init(&dev->blend_shaders, panfrost_device_gpu_id(dev),
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dev->kmod.dev->props.gpu_variant,
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@ -1100,7 +1100,7 @@ panfrost_create_context(struct pipe_screen *screen, void *priv, unsigned flags)
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goto failed;
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}
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ctx->blitter = util_blitter_create(gallium);
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ctx->blitter = panfrost_blitter_create(gallium);
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ctx->writers = _mesa_hash_table_create(gallium, _mesa_hash_pointer,
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_mesa_key_pointer_equal);
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@ -1461,6 +1461,163 @@ GENX(csf_launch_draw_indirect)(struct panfrost_batch *batch,
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}
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}
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#if PAN_ARCH == 10
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static struct pan_ptr
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panfrost_emit_fullscreen_vertex_array(struct panfrost_batch *batch,
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enum blitter_attrib_type type,
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const struct blitter_attrib *attrib,
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size_t *packet_stride,
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size_t *attribute_stride)
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{
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struct pan_ptr array = { .cpu = NULL, .gpu = 0 };
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if (type != UTIL_BLITTER_ATTRIB_TEXCOORD_XY &&
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type != UTIL_BLITTER_ATTRIB_TEXCOORD_XYZW)
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return array;
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/* In RUN_IDVS malloc mode, the tiler is configured to allocate memory
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* itself for the vertex shader. RUN_FULLSCREEN can also interpolate
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* varyings but from a preallocated vertex array. Allocate a packet of 64
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* vertices (like the tiler to respect cache-line alignment) and store the
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* texcoords into varying slot 0. */
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const size_t position_sz = 4 * sizeof(float);
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struct varying { struct { float s, t, r, q; } slot0; };
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const size_t packet_sz = position_sz + sizeof(struct varying);
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array = pan_pool_alloc_aligned(&batch->pool.base, 64 * packet_sz, 64);
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struct varying *varyings = (struct varying *)
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((uint8_t *)array.cpu + 64 * position_sz);
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varyings[0].slot0.s = attrib->texcoord.x1;
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varyings[0].slot0.t = attrib->texcoord.y1;
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varyings[0].slot0.r = attrib->texcoord.z;
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varyings[0].slot0.q = attrib->texcoord.w;
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varyings[1].slot0.s = attrib->texcoord.x2;
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varyings[1].slot0.t = attrib->texcoord.y1;
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varyings[1].slot0.r = attrib->texcoord.z;
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varyings[1].slot0.q = attrib->texcoord.w;
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varyings[2].slot0.s = attrib->texcoord.x1;
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varyings[2].slot0.t = attrib->texcoord.y2;
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varyings[2].slot0.r = attrib->texcoord.z;
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varyings[2].slot0.q = attrib->texcoord.w;
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*packet_stride = packet_sz;
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*attribute_stride = sizeof(struct varying);
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return array;
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}
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static struct pan_ptr
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panfrost_emit_fullscreen_dcd(struct panfrost_batch *batch,
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struct pan_ptr vertex_array,
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size_t packet_stride, size_t attribute_stride,
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uint64_t resources)
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{
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struct panfrost_context *ctx = batch->ctx;
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struct panfrost_compiled_shader *fs = ctx->prog[MESA_SHADER_FRAGMENT];
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struct pan_ptr dcd = pan_pool_alloc_desc(&batch->pool.base, DRAW);
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struct pan_earlyzs_state earlyzs = pan_earlyzs_get(
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fs->earlyzs, ctx->depth_stencil->writes_zs,
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ctx->blend->base.alpha_to_coverage,
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ctx->depth_stencil->zs_always_passes,
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PAN_EARLYZS_ZS_TILEBUF_NOT_READ);
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pan_cast_and_pack(dcd.cpu, DRAW, cfg) {
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/* Flag 0 */
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cfg.flags_0.multisample_enable = ctx->rasterizer->base.multisample;
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cfg.flags_0.evaluate_per_sample = ctx->rasterizer->base.multisample &&
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((ctx->min_samples > 1) || fs->info.fs.sample_shading ||
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ctx->valhall_has_blend_shader);
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cfg.flags_0.pixel_kill_operation = (enum mali_pixel_kill)earlyzs.kill;
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cfg.flags_0.zs_update_operation = (enum mali_pixel_kill)earlyzs.update;
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cfg.flags_0.allow_forward_pixel_to_kill =
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pan_allow_forward_pixel_to_kill(ctx, fs);
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cfg.flags_0.allow_forward_pixel_to_be_killed = !fs->info.writes_global;
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cfg.flags_0.overdraw_alpha0 = panfrost_overdraw_alpha(ctx, 0);
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cfg.flags_0.overdraw_alpha1 = panfrost_overdraw_alpha(ctx, 1);
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cfg.flags_0.shader_modifies_coverage = fs->info.fs.writes_coverage ||
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fs->info.fs.can_discard || ctx->blend->base.alpha_to_coverage;
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cfg.flags_0.alpha_to_coverage = ctx->blend->base.alpha_to_coverage;
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/* Flag 1 */
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cfg.flags_1.sample_mask = ctx->rasterizer->base.multisample ?
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ctx->sample_mask : 0xFFFF;
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cfg.flags_1.render_target_mask =
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(fs->info.outputs_written >> FRAG_RESULT_DATA0) & ctx->fb_rt_mask;
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/* Vertex descriptor */
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if (vertex_array.cpu) {
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cfg.vertex_array.packet = true;
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cfg.vertex_array.pointer = vertex_array.gpu;
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cfg.vertex_array.vertex_packet_stride = packet_stride;
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cfg.vertex_array.vertex_attribute_stride = attribute_stride;
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}
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/* Depth/stencil and blend descriptor */
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cfg.minimum_z = batch->minimum_z;
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cfg.maximum_z = batch->maximum_z;
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cfg.depth_stencil = batch->depth_stencil;
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cfg.blend_count = MAX2(batch->key.nr_cbufs, 1);
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cfg.blend = batch->blend;
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/* Shader environment */
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cfg.shader.attribute_offset = 0;
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cfg.shader.fau_count = DIV_ROUND_UP(
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batch->nr_push_uniforms[MESA_SHADER_FRAGMENT], 2);
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cfg.shader.resources = resources;
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cfg.shader.shader = batch->rsd[MESA_SHADER_FRAGMENT];
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cfg.shader.thread_storage = batch->tls.gpu;
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cfg.shader.fau = batch->push_uniforms[MESA_SHADER_FRAGMENT];
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}
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return dcd;
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}
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#endif
|
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void
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GENX(csf_launch_draw_fullscreen)(struct panfrost_batch *batch,
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enum blitter_attrib_type type,
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const struct blitter_attrib *attrib)
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||||
{
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#if PAN_ARCH == 10
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PAN_TRACE_FUNC(PAN_TRACE_GL_CSF);
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struct cs_builder *b = batch->csf.cs.builder;
|
||||
|
||||
if (batch->draw_count == 0) {
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emit_tiler_oom_context(b, batch);
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cs_vt_start(batch->csf.cs.builder, cs_now());
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||||
}
|
||||
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||||
/* Build draw call. */
|
||||
size_t packet_stride, attribute_stride;
|
||||
struct pan_ptr vertex_array = panfrost_emit_fullscreen_vertex_array(
|
||||
batch, type, attrib, &packet_stride, &attribute_stride);
|
||||
uint64_t resources = panfrost_emit_resources(batch, MESA_SHADER_FRAGMENT);
|
||||
struct pan_ptr dcd = panfrost_emit_fullscreen_dcd(
|
||||
batch, vertex_array, packet_stride, attribute_stride, resources);
|
||||
|
||||
struct mali_primitive_flags_packed primitive_flags;
|
||||
pan_pack(&primitive_flags, PRIMITIVE_FLAGS, cfg) {
|
||||
cfg.scissor_array_enable = false;
|
||||
cfg.view_mask = 0;
|
||||
}
|
||||
|
||||
/* Set input staging registers. */
|
||||
uint64_t *sbd = (uint64_t *)batch->scissor;
|
||||
cs_move64_to(b, cs_sr_reg64(b, FULLSCREEN, TILER_CTX),
|
||||
csf_get_tiler_desc(batch));
|
||||
cs_move64_to(b, cs_sr_reg64(b, FULLSCREEN, SCISSOR_BOX), *sbd);
|
||||
cs_move32_to(b, cs_sr_reg32(b, FULLSCREEN, TILER_FLAGS),
|
||||
primitive_flags.opaque[0]);
|
||||
|
||||
/* Emit RUN_FULLSCREEN. */
|
||||
struct cs_index dcd_pointer = cs_reg64(b, 64);
|
||||
cs_move64_to(b, dcd_pointer, dcd.gpu);
|
||||
cs_run_fullscreen(b, 0, dcd_pointer);
|
||||
#else
|
||||
UNREACHABLE("Unsupported architecture!");
|
||||
#endif
|
||||
}
|
||||
|
||||
#define POSITION_FIFO_SIZE (64 * 1024)
|
||||
|
||||
static enum drm_panthor_group_priority
|
||||
|
|
|
|||
|
|
@ -83,6 +83,7 @@ struct panfrost_csf_context {
|
|||
#if defined(PAN_ARCH) && PAN_ARCH >= 10
|
||||
|
||||
#include "genxml/gen_macros.h"
|
||||
#include "util/u_blitter.h"
|
||||
|
||||
struct panfrost_batch;
|
||||
struct panfrost_context;
|
||||
|
|
@ -120,6 +121,9 @@ void GENX(csf_launch_draw_indirect)(struct panfrost_batch *batch,
|
|||
const struct pipe_draw_info *info,
|
||||
unsigned drawid_offset,
|
||||
const struct pipe_draw_indirect_info *indirect);
|
||||
void GENX(csf_launch_draw_fullscreen)(struct panfrost_batch *batch,
|
||||
enum blitter_attrib_type type,
|
||||
const struct blitter_attrib *attrib);
|
||||
|
||||
void GENX(csf_emit_write_timestamp)(struct panfrost_batch *batch,
|
||||
struct panfrost_resource *dst,
|
||||
|
|
|
|||
|
|
@ -1020,6 +1020,14 @@ GENX(jm_launch_draw_indirect)(struct panfrost_batch *batch,
|
|||
UNREACHABLE("draw indirect not implemented for jm");
|
||||
}
|
||||
|
||||
void
|
||||
GENX(jm_launch_draw_fullscreen)(struct panfrost_batch *batch,
|
||||
enum blitter_attrib_type type,
|
||||
const struct blitter_attrib *attrib)
|
||||
{
|
||||
UNREACHABLE("draw fullscreen not implemented for jm");
|
||||
}
|
||||
|
||||
void
|
||||
GENX(jm_emit_write_timestamp)(struct panfrost_batch *batch,
|
||||
struct panfrost_resource *dst, unsigned offset)
|
||||
|
|
|
|||
|
|
@ -26,6 +26,7 @@ struct panfrost_jm_batch {
|
|||
#if defined(PAN_ARCH) && PAN_ARCH < 10
|
||||
|
||||
#include "genxml/gen_macros.h"
|
||||
#include "util/u_blitter.h"
|
||||
|
||||
struct panfrost_batch;
|
||||
struct panfrost_context;
|
||||
|
|
@ -75,6 +76,9 @@ void GENX(jm_launch_draw_indirect)(struct panfrost_batch *batch,
|
|||
const struct pipe_draw_info *info,
|
||||
unsigned drawid_offset,
|
||||
const struct pipe_draw_indirect_info *indirect);
|
||||
void GENX(jm_launch_draw_fullscreen)(struct panfrost_batch *batch,
|
||||
enum blitter_attrib_type type,
|
||||
const struct blitter_attrib *attrib);
|
||||
|
||||
void GENX(jm_emit_write_timestamp)(struct panfrost_batch *batch,
|
||||
struct panfrost_resource *dst,
|
||||
|
|
|
|||
|
|
@ -167,6 +167,8 @@ enum {
|
|||
PAN_RENDER_CLEAR = PAN_SAVE_FRAGMENT_STATE | PAN_SAVE_FRAGMENT_CONSTANT,
|
||||
};
|
||||
|
||||
struct blitter_context *panfrost_blitter_create(struct pipe_context *pipe);
|
||||
|
||||
/* Callers should ensure that all AFBC/AFRC resources that will be used in the
|
||||
* blit operation are legalized before calling blitter operations, otherwise
|
||||
* we may trigger a recursive blit */
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@
|
|||
#include "util/disk_cache.h"
|
||||
#include "util/log.h"
|
||||
#include "util/set.h"
|
||||
#include "util/u_blitter.h"
|
||||
#include "util/u_dynarray.h"
|
||||
|
||||
#include "pan_device.h"
|
||||
|
|
@ -30,6 +31,7 @@ struct panfrost_batch;
|
|||
struct panfrost_context;
|
||||
struct panfrost_resource;
|
||||
struct panfrost_compiled_shader;
|
||||
struct panfrost_uncompiled_shader;
|
||||
struct pan_fb_info;
|
||||
struct pan_blend_state;
|
||||
|
||||
|
|
@ -92,6 +94,12 @@ struct panfrost_vtable {
|
|||
/* construct a render target blend descriptor */
|
||||
uint64_t (*get_conv_desc)(enum pipe_format fmt, unsigned rt,
|
||||
unsigned force_size, bool dithered);
|
||||
|
||||
/* Run a fullscreen draw call (for blits) */
|
||||
void (*draw_fullscreen)(struct panfrost_context *ctx,
|
||||
struct panfrost_uncompiled_shader *vs,
|
||||
enum blitter_attrib_type type,
|
||||
const struct blitter_attrib *attrib);
|
||||
};
|
||||
|
||||
struct panfrost_screen {
|
||||
|
|
|
|||
|
|
@ -920,6 +920,12 @@
|
|||
<value name="PRIMITIVE_SIZE" value="60"/>
|
||||
</enum>
|
||||
|
||||
<enum name="FULLSCREEN SR">
|
||||
<value name="TILER_CTX" value="40"/>
|
||||
<value name="SCISSOR_BOX" value="42"/>
|
||||
<value name="TILER_FLAGS" value="56"/>
|
||||
</enum>
|
||||
|
||||
<enum name="FRAGMENT SR">
|
||||
<value name="FBD_POINTER" value="40"/>
|
||||
<value name="BBOX_MIN" value="42"/>
|
||||
|
|
@ -2096,10 +2102,8 @@
|
|||
<struct name="Vertex Array" size="3">
|
||||
<field name="Packet" size="1" start="0:0" type="bool"/>
|
||||
|
||||
<!-- Written by hardware in packet mode -->
|
||||
<!-- Written by hardware in RUN_IDVS malloc mode -->
|
||||
<field name="Pointer" size="58" start="0:6" type="address" modifier="shr(6)"/>
|
||||
|
||||
<!-- Written by hardware, leave zero -->
|
||||
<field name="Vertex packet stride" size="16" start="2:0" type="uint"/>
|
||||
<field name="Vertex attribute stride" size="16" start="2:16" type="uint"/>
|
||||
</struct>
|
||||
|
|
|
|||
|
|
@ -1557,10 +1557,8 @@
|
|||
<struct name="Vertex Array" size="3">
|
||||
<field name="Packet" size="1" start="0:0" type="bool"/>
|
||||
|
||||
<!-- Written by hardware in packet mode -->
|
||||
<!-- Written by hardware in RUN_IDVS malloc mode -->
|
||||
<field name="Pointer" size="58" start="0:6" type="address" modifier="shr(6)"/>
|
||||
|
||||
<!-- Written by hardware, leave zero -->
|
||||
<field name="Vertex packet stride" size="16" start="2:0" type="uint"/>
|
||||
<field name="Vertex attribute stride" size="16" start="2:16" type="uint"/>
|
||||
</struct>
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue