diff --git a/src/intel/compiler/brw_eu_emit.c b/src/intel/compiler/brw_eu_emit.c
index 9d312a6400f..ee139990aae 100644
--- a/src/intel/compiler/brw_eu_emit.c
+++ b/src/intel/compiler/brw_eu_emit.c
@@ -638,7 +638,7 @@ brw_inst_set_state(const struct brw_isa_info *isa,
          brw_inst_set_flag_reg_nr(devinfo, insn, state->flag_subreg / 2);
    }
 
-   if (devinfo->ver >= 6)
+   if (devinfo->ver >= 6 && devinfo->ver < 20)
       brw_inst_set_acc_wr_control(devinfo, insn, state->acc_wr_control);
 }
 
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index c6a315a4486..a3467d94c53 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -1762,7 +1762,14 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
       brw_set_default_flag_reg(p, flag_subreg / 2, flag_subreg % 2);
       brw_set_default_saturate(p, inst->saturate);
       brw_set_default_mask_control(p, inst->force_writemask_all);
-      brw_set_default_acc_write_control(p, inst->writes_accumulator);
+      if (devinfo->ver >= 20 && inst->writes_accumulator) {
+         assert(inst->dst.is_accumulator() ||
+                inst->opcode == BRW_OPCODE_ADDC ||
+                inst->opcode == BRW_OPCODE_MACH ||
+                inst->opcode == BRW_OPCODE_SUBB);
+      } else {
+         brw_set_default_acc_write_control(p, inst->writes_accumulator);
+      }
       brw_set_default_swsb(p, swsb);
 
       unsigned exec_size = inst->exec_size;
diff --git a/src/intel/compiler/brw_inst.h b/src/intel/compiler/brw_inst.h
index 6695e668f1e..c3a324257cb 100644
--- a/src/intel/compiler/brw_inst.h
+++ b/src/intel/compiler/brw_inst.h
@@ -389,7 +389,7 @@ F(saturate,            /* 4+ */ 31,  31,  /* 12+ */ 34, 34)
 F(debug_control,       /* 4+ */ 30,  30,  /* 12+ */ 30, 30)
 F(cmpt_control,        /* 4+ */ 29,  29,  /* 12+ */ 29, 29)
 FC(branch_control,     /* 4+ */ 28,  28,  /* 12+ */ 33, 33, devinfo->ver >= 8)
-FC(acc_wr_control,     /* 4+ */ 28,  28,  /* 12+ */ 33, 33, devinfo->ver >= 6)
+FC(acc_wr_control,     /* 4+ */ 28,  28,  /* 12+ */ 33, 33, devinfo->ver >= 6 && devinfo->ver < 20)
 FC(mask_control_ex,    /* 4+ */ 28,  28,  /* 12+ */ -1, -1, devinfo->verx10 == 45 ||
                                                             devinfo->ver == 5)
 F(cond_modifier,       /* 4+ */ 27,  24,  /* 12+ */ 95, 92)
@@ -454,7 +454,7 @@ FF(3src_a16_dst_reg_file,
 F(3src_saturate,            /* 4+ */ 31, 31,   /* 12+ */ 34, 34)
 F(3src_debug_control,       /* 4+ */ 30, 30,   /* 12+ */ 30, 30)
 F(3src_cmpt_control,        /* 4+ */ 29, 29,   /* 12+ */ 29, 29)
-F(3src_acc_wr_control,      /* 4+ */ 28, 28,   /* 12+ */ 33, 33)
+FC(3src_acc_wr_control,     /* 4+ */ 28, 28,   /* 12+ */ 33, 33, devinfo->ver < 20)
 F(3src_cond_modifier,       /* 4+ */ 27, 24,   /* 12+ */ 95, 92)
 F(3src_exec_size,           /* 4+ */ 23, 21,   /* 12+ */ 18, 16)
 F(3src_pred_inv,            /* 4+ */ 20, 20,   /* 12+ */ 28, 28)