From 6e3598177b8ed02f06ebbeeaca865b7cfcbbe87b Mon Sep 17 00:00:00 2001 From: Rob Clark Date: Thu, 20 Nov 2025 08:19:30 -0800 Subject: [PATCH] freedreno/common: Add A840 and X2-85 Add support for A840 and X2-85. Despite slice count, differences in memory bus and clks, they are architecturally similar from the PoV of the UMD. Signed-off-by: Rob Clark Part-of: --- src/freedreno/common/freedreno_devices.py | 91 ++++++++++++++++++++++- 1 file changed, 90 insertions(+), 1 deletion(-) diff --git a/src/freedreno/common/freedreno_devices.py b/src/freedreno/common/freedreno_devices.py index 844b802f688..1a5a0fec5dd 100644 --- a/src/freedreno/common/freedreno_devices.py +++ b/src/freedreno/common/freedreno_devices.py @@ -1431,8 +1431,28 @@ add_gpus([ a8xx_base = GPUProps( has_dp2acc = False, + reg_size_vec4 = 96, ) +a8xx_gen2 = GPUProps( + reg_size_vec4 = 128, + sysmem_vpc_attr_buf_size = 131072, + sysmem_vpc_pos_buf_size = 65536, + sysmem_vpc_bv_pos_buf_size = 32768, + sysmem_ccu_color_cache_fraction = CCUColorCacheFraction.FULL.value, + sysmem_per_ccu_color_cache_size = 128 * 1024, + sysmem_ccu_depth_cache_fraction = CCUColorCacheFraction.THREE_QUARTER.value, + sysmem_per_ccu_depth_cache_size = 192 * 1024, + gmem_vpc_attr_buf_size = 49152, + gmem_vpc_pos_buf_size = 24576, + gmem_vpc_bv_pos_buf_size = 32768, + gmem_ccu_color_cache_fraction = CCUColorCacheFraction.EIGHTH.value, + gmem_per_ccu_color_cache_size = 16 * 1024, + gmem_ccu_depth_cache_fraction = CCUColorCacheFraction.FULL.value, + gmem_per_ccu_depth_cache_size = 256 * 1024, + has_fs_tex_prefetch = False, +) + # Totally fake, just to get cffdump to work: add_gpus([ GPUId(chip_id=0x44050000, name="FD830"), @@ -1448,13 +1468,82 @@ add_gpus([ cs_shared_mem_size = 32 * 1024, wave_granularity = 2, fibers_per_sp = 128 * 2 * 16, - highest_bank_bit = 16, magic_regs = dict( ), raw_magic_regs = [ ], )) +# For a8xx, the chicken bit and most other non-ctx reg +# programming moves into the kernel, and what remains +# should be easier to share between devices +a8xx_gen2_raw_magic_regs = [ + [A6XXRegs.REG_A8XX_GRAS_UNKNOWN_8228, 0x00000000], + [A6XXRegs.REG_A8XX_GRAS_UNKNOWN_8229, 0x00000000], + [A6XXRegs.REG_A8XX_GRAS_UNKNOWN_822A, 0x00000000], + [A6XXRegs.REG_A8XX_GRAS_UNKNOWN_822B, 0x00000000], + [A6XXRegs.REG_A8XX_GRAS_UNKNOWN_822C, 0x00000000], + [A6XXRegs.REG_A8XX_GRAS_UNKNOWN_822D, 0x00000000], + + [A6XXRegs.REG_A6XX_RB_UNKNOWN_8818, 0x00000000], + [A6XXRegs.REG_A6XX_RB_UNKNOWN_8819, 0x00000000], + [A6XXRegs.REG_A6XX_RB_UNKNOWN_881A, 0x00000000], + [A6XXRegs.REG_A6XX_RB_UNKNOWN_881B, 0x00000000], + [A6XXRegs.REG_A6XX_RB_UNKNOWN_881C, 0x00000000], + [A6XXRegs.REG_A6XX_RB_UNKNOWN_881D, 0x00000000], + [A6XXRegs.REG_A6XX_RB_UNKNOWN_881E, 0x00000000], + [A6XXRegs.REG_A7XX_RB_LRZ_CNTL2, 0x00000000], + [A6XXRegs.REG_A8XX_RB_RESOLVE_CNTL_5, 0x00000001], + + [A6XXRegs.REG_A7XX_SP_UNKNOWN_AB01, 0x00000001], + [A6XXRegs.REG_A7XX_SP_HLSQ_MODE_CNTL, 0x00000000], + [A6XXRegs.REG_A8XX_SP_UNKNOWN_AB23, 0x00000000], + + [A6XXRegs.REG_A6XX_TPL1_PS_ROTATION_CNTL, 0x00000004], + [A6XXRegs.REG_A6XX_TPL1_PS_SWIZZLE_CNTL, 0x00000000], + + [A6XXRegs.REG_A8XX_VPC_UNKNOWN_9313, 0x00000000], + + [A6XXRegs.REG_A8XX_PC_UNKNOWN_980B, 0x00800280], + [A6XXRegs.REG_A8XX_PC_MODE_CNTL, 0x00003f00], + ] + +add_gpus([ + GPUId(chip_id=0xffff44050A31, name="Adreno (TM) 840"), + ], A6xxGPUInfo( + CHIP.A8XX, + [a7xx_base, a7xx_gen3, a8xx_base, a8xx_gen2], + num_ccu = 6, + tile_align_w = 96, + tile_align_h = 32, + tile_max_w = 16416, + tile_max_h = 16384, + num_vsc_pipes = 32, + cs_shared_mem_size = 32 * 1024, + wave_granularity = 2, + fibers_per_sp = 128 * 2 * 16, + magic_regs = dict(), + raw_magic_regs = a8xx_gen2_raw_magic_regs, + )) + +add_gpus([ + GPUId(chip_id=0xffff44070041, name="Adreno (TM) X2-85"), + ], A6xxGPUInfo( + CHIP.A8XX, + [a7xx_base, a7xx_gen3, a8xx_base, a8xx_gen2], + num_ccu = 8, + tile_align_w = 64, + tile_align_h = 64, + tile_max_w = 16384, + tile_max_h = 16384, + num_vsc_pipes = 32, + cs_shared_mem_size = 32 * 1024, + wave_granularity = 2, + fibers_per_sp = 128 * 2 * 16, + magic_regs = dict(), + raw_magic_regs = a8xx_gen2_raw_magic_regs, + )) + template = """\ /* Copyright © 2021 Google, Inc. *