radv,ac: make rembrandt and vangogh cache compatible

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41340>
This commit is contained in:
Rhys Perry 2026-04-17 16:15:47 +01:00 committed by Marge Bot
parent ec59b59b97
commit 6e06012825
10 changed files with 32 additions and 11 deletions

View file

@ -1558,6 +1558,9 @@ RADV driver environment variables
Enable tracking of VA ranges for radv_build_is_valid_va.
``vm``
add a gap between all VA allocations to check for page faults
``nocachecompat``
disable changes to code generation which increases shader cache compatiblity
between devices
.. envvar:: RADV_QUEUE_DISABLE

View file

@ -234,7 +234,8 @@ static bool handle_env_var_force_family(struct radeon_info *info)
}
void
ac_fill_compiler_info(struct radeon_info *info, const struct drm_amdgpu_info_device *device_info)
ac_fill_compiler_info(struct radeon_info *info, const struct drm_amdgpu_info_device *device_info,
bool compat_mode)
{
/* We use ac_compiler_info for shader cache keys, so make sure there is no padding. */
STATIC_ASSERT(sizeof(enum amd_gfx_level) == 4);
@ -420,6 +421,11 @@ ac_fill_compiler_info(struct radeon_info *info, const struct drm_amdgpu_info_dev
* Only GFX9 works as expected.
*/
out->has_smem_with_null_prt_bug = info->gfx_level <= GFX12 && info->gfx_level != GFX9;
if (compat_mode && info->family == CHIP_REMBRANDT) {
out->has_ngg_passthru_no_msg = false;
out->has_vrs_frag_pos_z_bug = true;
}
}
void
@ -1390,7 +1396,7 @@ void ac_fill_tess_info(struct radeon_info *info)
enum ac_query_gpu_info_result
ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
bool require_pci_bus_info)
bool require_pci_bus_info, bool compiler_compat_mode)
{
struct amdgpu_gpu_info amdinfo;
struct drm_amdgpu_info_device device_info = {0};
@ -1563,7 +1569,7 @@ ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
ac_fill_tess_info(info);
ac_fill_compiler_info(info, &device_info);
ac_fill_compiler_info(info, &device_info, compiler_compat_mode);
/* BIG_PAGE is supported since gfx10.3 and requires VRAM. VRAM is only guaranteed
* with AMDGPU_GEM_CREATE_DISCARDABLE.

View file

@ -490,9 +490,18 @@ enum ac_query_gpu_info_result {
AC_QUERY_GPU_INFO_UNIMPLEMENTED_HW,
};
/* If compiler_compat_mode is true, then ac_compiler_info must be identical between:
* - CHIP_VANGOGH and CHIP_REMBRANDT
* - CHIP_NAVI33, CHIP_PHOENIX and CHIP_PHOENIX2
* This is done by disabling features and enabling workarounds.
*
* conformant_trunc_coord is an exception, and might differ.
*/
enum ac_query_gpu_info_result ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
bool require_pci_bus_info);
void ac_fill_compiler_info(struct radeon_info *info, const struct drm_amdgpu_info_device *device_info);
bool require_pci_bus_info,
bool compiler_compat_mode);
void ac_fill_compiler_info(struct radeon_info *info,
const struct drm_amdgpu_info_device *device_info, bool compat_mode);
void ac_fill_tiling_info(struct radeon_info *info, const struct amdgpu_gpu_info *amdinfo);
void ac_fill_memory_info(struct radeon_info *info, const struct drm_amdgpu_info_device *device_info,
const struct drm_amdgpu_memory_info *meminfo);

View file

@ -94,7 +94,7 @@ static void get_radeon_info(struct radeon_info *info, const struct ac_surface_fa
ac_fill_feature_info(info, &dev->dev);
ac_fill_bug_info(info);
ac_fill_tess_info(info);
ac_fill_compiler_info(info, &dev->dev);
ac_fill_compiler_info(info, &dev->dev, false);
switch(info->gfx_level) {
case GFX9:

View file

@ -97,7 +97,7 @@ create_program(enum amd_gfx_level gfx_level, Stage stage, unsigned wave_size,
program.reset(new Program);
rad_info.gfx_level = gfx_level;
rad_info.family = family;
ac_fill_compiler_info(&rad_info, NULL);
ac_fill_compiler_info(&rad_info, NULL, false);
struct aco_compiler_options options = {
.compiler_info = &rad_info.compiler_info,
.family = family,
@ -174,7 +174,7 @@ setup_nir_cs(enum amd_gfx_level gfx_level, mesa_shader_stage stage, enum radeon_
memset(&rad_info, 0, sizeof(rad_info));
rad_info.gfx_level = gfx_level;
rad_info.family = family;
ac_fill_compiler_info(&rad_info, NULL);
ac_fill_compiler_info(&rad_info, NULL, false);
memset(&nir_options, 0, sizeof(nir_options));
ac_nir_set_options(&rad_info.compiler_info, false, &nir_options);

View file

@ -15,6 +15,7 @@
enum {
RADV_DEBUG_NO_FAST_CLEARS = 1ull << 0,
RADV_DEBUG_NO_DCC = 1ull << 1,
RADV_DEBUG_NO_CACHE_COMPAT = 1ull << 2,
RADV_DEBUG_NO_CACHE = 1ull << 3,
RADV_DEBUG_DUMP_SHADER_STATS = 1ull << 4,
RADV_DEBUG_NO_HIZ = 1ull << 5,

View file

@ -30,6 +30,7 @@ static const struct debug_control radv_debug_options[] = {
{"nofastclears", RADV_DEBUG_NO_FAST_CLEARS},
{"nodcc", RADV_DEBUG_NO_DCC},
{"shaders", RADV_DEBUG_DUMP_SHADERS},
{"nocachecompat", RADV_DEBUG_NO_CACHE_COMPAT},
{"nocache", RADV_DEBUG_NO_CACHE},
{"shaderstats", RADV_DEBUG_DUMP_SHADER_STATS},
{"nohiz", RADV_DEBUG_NO_HIZ},

View file

@ -299,7 +299,8 @@ radv_amdgpu_winsys_create(int fd, uint64_t debug_flags, uint64_t perftest_flags,
ws->info.drm_minor = drm_minor;
ws->info.is_virtio = is_virtio;
enum ac_query_gpu_info_result info_result = ac_query_gpu_info(fd, ws->dev, &ws->info, true);
enum ac_query_gpu_info_result info_result =
ac_query_gpu_info(fd, ws->dev, &ws->info, true, !(debug_flags & RADV_DEBUG_NO_CACHE_COMPAT));
if (info_result != AC_QUERY_GPU_INFO_SUCCESS) {
result = info_result == AC_QUERY_GPU_INFO_FAIL ? VK_ERROR_INITIALIZATION_FAILED : VK_ERROR_INCOMPATIBLE_DRIVER;
goto winsys_fail;

View file

@ -44,7 +44,7 @@ static bool do_winsys_init(struct amdgpu_winsys *aws,
const struct pipe_screen_config *config,
int fd)
{
if (ac_query_gpu_info(fd, aws->dev, &aws->info, false) != AC_QUERY_GPU_INFO_SUCCESS) {
if (ac_query_gpu_info(fd, aws->dev, &aws->info, false, false) != AC_QUERY_GPU_INFO_SUCCESS) {
mesa_loge("amdgpu: ac_query_gpu_info failed.\n");
goto fail;
}

View file

@ -641,7 +641,7 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws)
ws->info.tcp_cache_size = 16 * 1024;
#ifdef HAVE_GALLIUM_RADEONSI
ac_fill_compiler_info(&ws->info, NULL);
ac_fill_compiler_info(&ws->info, NULL, false);
#endif
for (unsigned se = 0; se < ws->info.max_se; se++) {