diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c
index 0f62a2e0112..ed632950f5f 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -1588,10 +1588,12 @@ bind_graphics_shaders(struct anv_cmd_buffer *cmd_buffer,
             set_dirty_for_bind_map(cmd_buffer, s, &shader->bind_map);
 
          for (uint32_t i = 0; i < MAX_SETS; i++) {
-            assert(dynamic_descriptors[i] == 0 ||
-                   dynamic_descriptors[i] ==
-                   shader->bind_map.dynamic_descriptors[i]);
-            dynamic_descriptors[i] = shader->bind_map.dynamic_descriptors[i];
+            if (shader->bind_map.binding_mask & ANV_PIPELINE_BIND_MASK_SET(i)) {
+               assert(dynamic_descriptors[i] == 0 ||
+                      dynamic_descriptors[i] ==
+                      shader->bind_map.dynamic_descriptors[i]);
+               dynamic_descriptors[i] = shader->bind_map.dynamic_descriptors[i];
+            }
          }
       }
 
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index d7d13b78158..ea4b2a3ed2b 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1158,9 +1158,19 @@ struct anv_push_range {
 };
 
 enum anv_pipeline_bind_mask {
-   ANV_PIPELINE_BIND_MASK_USES_NUM_WORKGROUP = BITFIELD_BIT(0),
+   ANV_PIPELINE_BIND_MASK_SET0               = BITFIELD_BIT(0),
+   ANV_PIPELINE_BIND_MASK_SET1               = BITFIELD_BIT(1),
+   ANV_PIPELINE_BIND_MASK_SET2               = BITFIELD_BIT(2),
+   ANV_PIPELINE_BIND_MASK_SET3               = BITFIELD_BIT(3),
+   ANV_PIPELINE_BIND_MASK_SET4               = BITFIELD_BIT(4),
+   ANV_PIPELINE_BIND_MASK_SET5               = BITFIELD_BIT(5),
+   ANV_PIPELINE_BIND_MASK_SET6               = BITFIELD_BIT(6),
+   ANV_PIPELINE_BIND_MASK_SET7               = BITFIELD_BIT(7),
+   ANV_PIPELINE_BIND_MASK_USES_NUM_WORKGROUP = BITFIELD_BIT(8),
 };
 
+#define ANV_PIPELINE_BIND_MASK_SET(i) (ANV_PIPELINE_BIND_MASK_SET0 << i)
+
 struct anv_pipeline_bind_map {
    unsigned char                                surface_sha1[20];
    unsigned char                                sampler_sha1[20];
diff --git a/src/intel/vulkan/anv_shader_compile.c b/src/intel/vulkan/anv_shader_compile.c
index 5c4b3b2e417..eaa4460fff7 100644
--- a/src/intel/vulkan/anv_shader_compile.c
+++ b/src/intel/vulkan/anv_shader_compile.c
@@ -1455,8 +1455,13 @@ anv_shader_lower_nir(struct anv_device *device,
    uint32_t dynamic_descriptors_offsets[MAX_SETS] = {};
    for (uint32_t i = 0; i < set_layout_count; i++) {
       dynamic_descriptors_offsets[i] = dynamic_descriptors_offset;
-      dynamic_descriptors_offset += set_layouts[i] != NULL ?
-         set_layouts[i]->vk.dynamic_descriptor_count : 0;
+      if (set_layouts[i] != NULL) {
+         shader_data->bind_map.binding_mask |= ANV_PIPELINE_BIND_MASK_SET(i);
+         const uint32_t dyn_desc_count =
+            set_layouts[i]->vk.dynamic_descriptor_count;
+         shader_data->bind_map.dynamic_descriptors[i] = dyn_desc_count;
+         dynamic_descriptors_offset += dyn_desc_count;
+      }
    }
 
    /* Apply the actual pipeline layout to UBOs, SSBOs, and textures */