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radv: pass the lib flags for generating the pipeline key

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No functional change.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21068>
This commit is contained in:
Samuel Pitoiset 2023-02-02 10:56:10 +01:00 • committed by Marge Bot
parent 04fefec70f
commit 6ddf1fd9ad
1 changed files with 17 additions and 15 deletions
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32
src/amd/vulkan/radv_pipeline.c
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@ -2279,7 +2279,8 @@ radv_pipeline_generate_ps_epilog_key(const struct radv_graphics_pipeline *pipeli
static struct radv_pipeline_key
radv_generate_graphics_pipeline_key(const struct radv_graphics_pipeline *pipeline,
const VkGraphicsPipelineCreateInfo *pCreateInfo,
const struct vk_graphics_pipeline_state *state)
const struct vk_graphics_pipeline_state *state,
VkGraphicsPipelineLibraryFlagBitsEXT lib_flags)
{
struct radv_device *device = pipeline->base.device;
const struct radv_physical_device *pdevice = device->physical_device;
@ -2291,6 +2292,12 @@ radv_generate_graphics_pipeline_key(const struct radv_graphics_pipeline *pipelin
key.vs.has_prolog = true;
}
/* Compile the pre-rasterization stages only when the vertex input interface is missing. */
if ((lib_flags & VK_GRAPHICS_PIPELINE_LIBRARY_PRE_RASTERIZATION_SHADERS_BIT_EXT) &&
!(lib_flags & VK_GRAPHICS_PIPELINE_LIBRARY_VERTEX_INPUT_INTERFACE_BIT_EXT)) {
key.vs.has_prolog = true;
}
/* Vertex input state */
if (state->vi) {
u_foreach_bit(i, state->vi->attributes_valid) {
@ -2392,6 +2399,12 @@ radv_generate_graphics_pipeline_key(const struct radv_graphics_pipeline *pipelin
(!!(pipeline->active_stages & VK_SHADER_STAGE_FRAGMENT_BIT) && !!pipeline->ps_epilog) ||
key.ps.dynamic_ps_epilog;
/* Compile the main FS only when the fragment shader output interface is missing. */
if ((lib_flags & VK_GRAPHICS_PIPELINE_LIBRARY_FRAGMENT_SHADER_BIT_EXT) &&
!(lib_flags & VK_GRAPHICS_PIPELINE_LIBRARY_FRAGMENT_OUTPUT_INTERFACE_BIT_EXT)) {
key.ps.has_epilog = true;
}
key.dynamic_patch_control_points =
!!(pipeline->dynamic_states & RADV_DYNAMIC_PATCH_CONTROL_POINTS);
@ -4965,7 +4978,8 @@ radv_graphics_pipeline_init(struct radv_graphics_pipeline *pipeline, struct radv
if (!fast_linking_enabled)
radv_pipeline_layout_hash(&pipeline_layout);
struct radv_pipeline_key key = radv_generate_graphics_pipeline_key(pipeline, pCreateInfo, &state);
struct radv_pipeline_key key = radv_generate_graphics_pipeline_key(
pipeline, pCreateInfo, &state, (~imported_flags) & ALL_GRAPHICS_LIB_FLAGS);
result = radv_graphics_pipeline_compile(pipeline, pCreateInfo, &pipeline_layout, device, cache,
&key, (~imported_flags) & ALL_GRAPHICS_LIB_FLAGS,
@ -5170,19 +5184,7 @@ radv_graphics_lib_pipeline_init(struct radv_graphics_lib_pipeline *pipeline,
if (pipeline->base.active_stages != 0 ||
(imported_flags & VK_GRAPHICS_PIPELINE_LIBRARY_FRAGMENT_SHADER_BIT_EXT)) {
struct radv_pipeline_key key =
radv_generate_graphics_pipeline_key(&pipeline->base, pCreateInfo, state);
/* Compile the main FS only when the fragment shader output interface is missing. */
if ((imported_flags & VK_GRAPHICS_PIPELINE_LIBRARY_FRAGMENT_SHADER_BIT_EXT) &&
!(imported_flags & VK_GRAPHICS_PIPELINE_LIBRARY_FRAGMENT_OUTPUT_INTERFACE_BIT_EXT)) {
key.ps.has_epilog = true;
}
/* Compile the pre-rasterization stages only when the vertex input interface is missing. */
if ((imported_flags & VK_GRAPHICS_PIPELINE_LIBRARY_PRE_RASTERIZATION_SHADERS_BIT_EXT) &&
!(imported_flags & VK_GRAPHICS_PIPELINE_LIBRARY_VERTEX_INPUT_INTERFACE_BIT_EXT)) {
key.vs.has_prolog = true;
}
radv_generate_graphics_pipeline_key(&pipeline->base, pCreateInfo, state, imported_flags);
result = radv_graphics_pipeline_compile(&pipeline->base, pCreateInfo, pipeline_layout, device,
cache, &key, imported_flags, false,