From 6dc56f18bcf6014b9af1bf8660f4f2df978feee3 Mon Sep 17 00:00:00 2001
From: Connor Abbott <cwabbott0@gmail.com>
Date: Wed, 29 Sep 2021 16:19:10 +0200
Subject: [PATCH] ir3/legalize: handle WAR for special regs

In particular many cat5/cat6 instructions read a1.x, and we need to add
a (ss) before any mova1 instruction afterwards, as the blob does.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13142>
---
 src/freedreno/ir3/ir3_legalize.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/freedreno/ir3/ir3_legalize.c b/src/freedreno/ir3/ir3_legalize.c
index 8d56efccfc6..42145b2a114 100644
--- a/src/freedreno/ir3/ir3_legalize.c
+++ b/src/freedreno/ir3/ir3_legalize.c
@@ -293,8 +293,7 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
        */
       if (is_tex(n) || is_sfu(n) || is_mem(n)) {
          foreach_src (reg, n) {
-            if (reg_gpr(reg))
-               regmask_set(&state->needs_ss_war, reg);
+            regmask_set(&state->needs_ss_war, reg);
          }
       }