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i965: Advertise larger line widths.

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We've artificially been limiting this to 5 for no particular reason.

On Gen4-5, the limit is [0, 7.5] with a granularity of 0.5 (U3.1).
On Gen6+, the limit is [0, 7.9921875].  Since it's a U3.7, the
granularity should be 0.125 (1/8).

This patch conservatively advertises one granularity smaller than the
hardware's maximum value, just in case there's a problem using the
largest possible value.  On Gen4-5, this is 7.5 - 0.5 = 7.0.  On Gen6+,
this is 8.0 - 0.125 = 7.875.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
This commit is contained in:
Kenneth Graunke 2014-11-03 17:01:53 -08:00
parent 61838fd9ad
commit 6dab04d7e3
1 changed files with 9 additions and 3 deletions
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12
src/mesa/drivers/dri/i965/brw_context.c
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@ -421,9 +421,15 @@ brw_initialize_context_constants(struct brw_context *brw)
ctx->Const.MinLineWidth = 1.0;
ctx->Const.MinLineWidthAA = 1.0;
ctx->Const.MaxLineWidth = 5.0;
ctx->Const.MaxLineWidthAA = 5.0;
ctx->Const.LineWidthGranularity = 0.5;
if (brw->gen >= 6) {
ctx->Const.MaxLineWidth = 7.875;
ctx->Const.MaxLineWidthAA = 7.875;
ctx->Const.LineWidthGranularity = 0.125;
} else {
ctx->Const.MaxLineWidth = 7.0;
ctx->Const.MaxLineWidthAA = 7.0;
ctx->Const.LineWidthGranularity = 0.5;
}
ctx->Const.MinPointSize = 1.0;
ctx->Const.MinPointSizeAA = 1.0;