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ac/nir: fix writemask for dual source blending on GFX11+

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This should definitely be an OR operation if MRT0 and MRT1 don't write
the same channels. This also requires to set the writemask manually
because when it's 0 (in case a dual-source output is missing), the
intrinsic computes the mask itself with the number of components.

No fossils-db changes on NAVI33.

Fixes: 45d8cd037a ("ac/nir: rewrite ac_nir_lower_ps epilog to fix dual src blending with mono PS")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14878
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
(cherry picked from commit 2eb9420061)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40092>
This commit is contained in:
Samuel Pitoiset 2026-02-18 18:50:35 +01:00 • committed by Eric Engestrom
parent 6edfd32388
commit 6d7f2e3fbd
2 changed files with 10 additions and 6 deletions
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2
.pick_status.json
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@ -384,7 +384,7 @@
"description": "ac/nir: fix writemask for dual source blending on GFX11+",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "45d8cd037a83ae99f99a551be1b565f14cd598ec",
"notes": null

14
src/amd/common/nir/ac_nir_lower_ps_late.c
View file

@ -443,10 +443,14 @@ emit_ps_color_export(nir_builder *b, lower_ps_state *s, unsigned output_index, u
}
}
s->exp[s->exp_num++] = nir_export_amd(b, nir_vec(b, outputs, 4),
.base = target,
.write_mask = write_mask,
.flags = flags);
nir_intrinsic_instr *exp = nir_export_amd(b, nir_vec(b, outputs, 4),
.base = target,
.flags = flags);
/* Set the writemask explicitly because write_mask=0 means full write mask. */
nir_intrinsic_set_write_mask(exp, write_mask);
s->exp[s->exp_num++] = exp;
return true;
}
@ -483,7 +487,7 @@ emit_ps_dual_src_blend_swizzle(nir_builder *b, lower_ps_state *s, unsigned first
uint32_t mrt0_write_mask = nir_intrinsic_write_mask(mrt0_exp);
uint32_t mrt1_write_mask = nir_intrinsic_write_mask(mrt1_exp);
uint32_t write_mask = mrt0_write_mask & mrt1_write_mask;
uint32_t write_mask = mrt0_write_mask | mrt1_write_mask;
nir_def *mrt0_arg = mrt0_exp->src[0].ssa;
nir_def *mrt1_arg = mrt1_exp->src[0].ssa;