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radeon/llvm: Match vector logical operations on SI.

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Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
This commit is contained in:
Michel Dänzer 2012-09-06 18:16:03 +02:00 • committed by Michel Dänzer
parent 7b6b447fa3
commit 6d3a1a5361
1 changed files with 9 additions and 3 deletions
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12
src/gallium/drivers/radeon/SIInstructions.td
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@ -733,9 +733,15 @@ defm V_ASHR_I32 : VOP2_32 <0x00000017, "V_ASHR_I32", []>;
defm V_ASHRREV_I32 : VOP2_32 <0x00000018, "V_ASHRREV_I32", []>;
defm V_LSHL_B32 : VOP2_32 <0x00000019, "V_LSHL_B32", []>;
defm V_LSHLREV_B32 : VOP2_32 <0x0000001a, "V_LSHLREV_B32", []>;
defm V_AND_B32 : VOP2_32 <0x0000001b, "V_AND_B32", []>;
defm V_OR_B32 : VOP2_32 <0x0000001c, "V_OR_B32", []>;
defm V_XOR_B32 : VOP2_32 <0x0000001d, "V_XOR_B32", []>;
defm V_AND_B32 : VOP2_32 <0x0000001b, "V_AND_B32",
[(set VReg_32:$dst, (and AllReg_32:$src0, VReg_32:$src1))]
>;
defm V_OR_B32 : VOP2_32 <0x0000001c, "V_OR_B32",
[(set VReg_32:$dst, (or AllReg_32:$src0, VReg_32:$src1))]
>;
defm V_XOR_B32 : VOP2_32 <0x0000001d, "V_XOR_B32",
[(set VReg_32:$dst, (xor AllReg_32:$src0, VReg_32:$src1))]
>;
defm V_BFM_B32 : VOP2_32 <0x0000001e, "V_BFM_B32", []>;
defm V_MAC_F32 : VOP2_32 <0x0000001f, "V_MAC_F32", []>;
defm V_MADMK_F32 : VOP2_32 <0x00000020, "V_MADMK_F32", []>;