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virgl: add shader offset alignment to to v2 caps struct
This is the SSBO analogue to fe0647. User supplied data must be a multiple of GL_SHADER_STORAGE_BUFFER_OFFSET_ALIGNMENT. This fixes 44 GLES31 tests on airlied@'s GLES31 sketch branches with Nvidia hardware, but this patch standalone can applied to master. The alignment restriction on Nvidia is 32, hence the default value. Example tests: dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.0 dEQP-GLES31.functional.ssbo.layout.multi_basic_types.single_buffer.std430 v2: Move to a better place in case statement v3: Rebase Reviewed-by: Dave Airlie <airlied@redhat.com>
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1c9053d076
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3 changed files with 4 additions and 1 deletions
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@ -292,6 +292,7 @@ struct virgl_caps_v2 {
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int32_t max_texture_gather_offset;
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uint32_t texture_buffer_offset_alignment;
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uint32_t uniform_buffer_offset_alignment;
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uint32_t shader_buffer_offset_alignment;
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};
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union virgl_caps {
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@ -211,6 +211,8 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
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return vscreen->caps.caps.v1.bset.polygon_offset_clamp;
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case PIPE_CAP_QUERY_SO_OVERFLOW:
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return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
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case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
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return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
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case PIPE_CAP_TEXTURE_GATHER_SM5:
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case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
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case PIPE_CAP_FAKE_SW_MSAA:
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@ -236,7 +238,6 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
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case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
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case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
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case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
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case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
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case PIPE_CAP_INVALIDATE_BUFFER:
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case PIPE_CAP_GENERATE_MIPMAP:
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case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
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@ -134,5 +134,6 @@ static inline void virgl_ws_fill_new_caps_defaults(struct virgl_drm_caps *caps)
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caps->caps.v2.max_texture_gather_offset = 7;
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caps->caps.v2.texture_buffer_offset_alignment = 0;
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caps->caps.v2.uniform_buffer_offset_alignment = 256;
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caps->caps.v2.shader_buffer_offset_alignment = 32;
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}
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#endif
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