From 6cbb6e63977462a2f9206e08440641e683f4d8d7 Mon Sep 17 00:00:00 2001 From: Qiang Yu Date: Mon, 26 Sep 2022 14:36:55 +0800 Subject: [PATCH] radeonsi: implement nir_intrinsic_load_provoking_vtx_in_prim_amd MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Acked-by: Pierre-Eric Pelloux-Prayer Reviewed-by: Marek Olšák Signed-off-by: Qiang Yu Part-of: --- src/gallium/drivers/radeonsi/si_shader_llvm.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm.c b/src/gallium/drivers/radeonsi/si_shader_llvm.c index 075f8d13dbf..681a6af904d 100644 --- a/src/gallium/drivers/radeonsi/si_shader_llvm.c +++ b/src/gallium/drivers/radeonsi/si_shader_llvm.c @@ -900,6 +900,9 @@ static LLVMValueRef si_llvm_load_intrinsic(struct ac_shader_abi *abi, nir_intrin else return ctx->ac.i1true; + case nir_intrinsic_load_provoking_vtx_in_prim_amd: + return GET_FIELD(ctx, GS_STATE_PROVOKING_VTX_INDEX); + case nir_intrinsic_load_pipeline_stat_query_enabled_amd: { LLVMValueRef enabled = GET_FIELD(ctx, GS_STATE_PIPELINE_STATS_EMU); return LLVMBuildTrunc(ctx->ac.builder, enabled, ctx->ac.i1, "");