diff --git a/src/gallium/auxiliary/cso_cache/cso_context.c b/src/gallium/auxiliary/cso_cache/cso_context.c
index 6c46aa4684b..0d486c73c5e 100644
--- a/src/gallium/auxiliary/cso_cache/cso_context.c
+++ b/src/gallium/auxiliary/cso_cache/cso_context.c
@@ -315,7 +315,7 @@ cso_create_context(struct pipe_context *pipe, unsigned flags)
    if (pipe->screen->shader_caps[PIPE_SHADER_GEOMETRY].max_instructions > 0) {
       ctx->has_geometry_shader = true;
    }
-   if (pipe->screen->shader_caps[PIPE_SHADER_TESS_CTRL].max_instructions > 0) {
+   if (pipe->screen->shader_caps[MESA_SHADER_TESS_CTRL].max_instructions > 0) {
       ctx->has_tessellation = true;
    }
    if (pipe->screen->shader_caps[PIPE_SHADER_COMPUTE].max_instructions > 0) {
@@ -370,7 +370,7 @@ cso_unbind_context(struct cso_context *cso)
                if (!ctx->has_geometry_shader)
                   continue;
                break;
-            case PIPE_SHADER_TESS_CTRL:
+            case MESA_SHADER_TESS_CTRL:
             case PIPE_SHADER_TESS_EVAL:
                if (!ctx->has_tessellation)
                   continue;
diff --git a/src/gallium/auxiliary/draw/draw_context.c b/src/gallium/auxiliary/draw/draw_context.c
index 152be77c33a..478d66ced10 100644
--- a/src/gallium/auxiliary/draw/draw_context.c
+++ b/src/gallium/auxiliary/draw/draw_context.c
@@ -461,7 +461,7 @@ draw_set_mapped_constant_buffer(struct draw_context *draw,
 {
    assert(shader_type == MESA_SHADER_VERTEX ||
                 shader_type == PIPE_SHADER_GEOMETRY ||
-                shader_type == PIPE_SHADER_TESS_CTRL ||
+                shader_type == MESA_SHADER_TESS_CTRL ||
                 shader_type == PIPE_SHADER_TESS_EVAL);
    assert(slot < PIPE_MAX_CONSTANT_BUFFERS);
 
@@ -480,7 +480,7 @@ draw_set_mapped_shader_buffer(struct draw_context *draw,
 {
    assert(shader_type == MESA_SHADER_VERTEX ||
                 shader_type == PIPE_SHADER_GEOMETRY ||
-                shader_type == PIPE_SHADER_TESS_CTRL ||
+                shader_type == MESA_SHADER_TESS_CTRL ||
                 shader_type == PIPE_SHADER_TESS_EVAL);
    assert(slot < PIPE_MAX_SHADER_BUFFERS);
 
diff --git a/src/gallium/auxiliary/draw/draw_llvm.c b/src/gallium/auxiliary/draw/draw_llvm.c
index 1457e88558a..0aeb066ae5e 100644
--- a/src/gallium/auxiliary/draw/draw_llvm.c
+++ b/src/gallium/auxiliary/draw/draw_llvm.c
@@ -3295,11 +3295,11 @@ draw_tcs_llvm_make_variant_key(struct draw_llvm *llvm, char *store)
 
    for (i = 0 ; i < key->nr_samplers; i++) {
       lp_sampler_static_sampler_state(&draw_sampler[i].sampler_state,
-                                      llvm->draw->samplers[PIPE_SHADER_TESS_CTRL][i]);
+                                      llvm->draw->samplers[MESA_SHADER_TESS_CTRL][i]);
    }
    for (i = 0 ; i < key->nr_sampler_views; i++) {
       lp_sampler_static_texture_state(&draw_sampler[i].texture_state,
-                                      llvm->draw->sampler_views[PIPE_SHADER_TESS_CTRL][i]);
+                                      llvm->draw->sampler_views[MESA_SHADER_TESS_CTRL][i]);
    }
 
    draw_image = draw_tcs_llvm_variant_key_images(key);
@@ -3307,7 +3307,7 @@ draw_tcs_llvm_make_variant_key(struct draw_llvm *llvm, char *store)
           key->nr_images * sizeof *draw_image);
    for (i = 0; i < key->nr_images; i++) {
       lp_sampler_static_texture_state_image(&draw_image[i].image_state,
-                                            llvm->draw->images[PIPE_SHADER_TESS_CTRL][i]);
+                                            llvm->draw->images[MESA_SHADER_TESS_CTRL][i]);
    }
    return key;
 }
diff --git a/src/gallium/auxiliary/draw/draw_tess.c b/src/gallium/auxiliary/draw/draw_tess.c
index 8a03059ee0e..060b56c0882 100644
--- a/src/gallium/auxiliary/draw/draw_tess.c
+++ b/src/gallium/auxiliary/draw/draw_tess.c
@@ -467,7 +467,7 @@ draw_create_tess_ctrl_shader(struct draw_context *draw,
       tcs->tcs_output = align_malloc(sizeof(struct draw_tcs_outputs), 16);
       memset(tcs->tcs_output, 0, sizeof(struct draw_tcs_outputs));
 
-      tcs->jit_resources = &draw->llvm->jit_resources[PIPE_SHADER_TESS_CTRL];
+      tcs->jit_resources = &draw->llvm->jit_resources[MESA_SHADER_TESS_CTRL];
       llvm_tcs->variant_key_size =
          draw_tcs_llvm_variant_key_size(
                                         tcs->info.file_max[TGSI_FILE_SAMPLER]+1,
diff --git a/src/gallium/auxiliary/driver_ddebug/dd_draw.c b/src/gallium/auxiliary/driver_ddebug/dd_draw.c
index 0b98f6462fb..a670d3a6509 100644
--- a/src/gallium/auxiliary/driver_ddebug/dd_draw.c
+++ b/src/gallium/auxiliary/driver_ddebug/dd_draw.c
@@ -265,14 +265,14 @@ dd_dump_shader(struct dd_draw_state *dstate, enum pipe_shader_type sh, FILE *f)
    const char *shader_str[PIPE_SHADER_TYPES];
 
    shader_str[MESA_SHADER_VERTEX] = "VERTEX";
-   shader_str[PIPE_SHADER_TESS_CTRL] = "TESS_CTRL";
+   shader_str[MESA_SHADER_TESS_CTRL] = "TESS_CTRL";
    shader_str[PIPE_SHADER_TESS_EVAL] = "TESS_EVAL";
    shader_str[PIPE_SHADER_GEOMETRY] = "GEOMETRY";
    shader_str[PIPE_SHADER_FRAGMENT] = "FRAGMENT";
    shader_str[PIPE_SHADER_COMPUTE] = "COMPUTE";
 
-   if (sh == PIPE_SHADER_TESS_CTRL &&
-       !dstate->shaders[PIPE_SHADER_TESS_CTRL] &&
+   if (sh == MESA_SHADER_TESS_CTRL &&
+       !dstate->shaders[MESA_SHADER_TESS_CTRL] &&
        dstate->shaders[PIPE_SHADER_TESS_EVAL])
       fprintf(f, "tess_state: {default_outer_level = {%f, %f, %f, %f}, "
               "default_inner_level = {%f, %f}}\n",
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
index 42d8e588d1d..6322549166f 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
@@ -1524,7 +1524,7 @@ emit_fetch_system_value(
       break;
 
    case TGSI_SEMANTIC_INVOCATIONID:
-      if (info->processor == PIPE_SHADER_TESS_CTRL)
+      if (info->processor == MESA_SHADER_TESS_CTRL)
          res = bld->system_values.invocation_id;
       else
          res = lp_build_broadcast_scalar(&bld_base->uint_bld, bld->system_values.invocation_id);
diff --git a/src/gallium/auxiliary/tgsi/tgsi_dump.c b/src/gallium/auxiliary/tgsi/tgsi_dump.c
index c1f3e89f192..ced6c7222ae 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_dump.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_dump.c
@@ -315,7 +315,7 @@ iter_declaration(
    if (decl->Declaration.File == TGSI_FILE_INPUT &&
        (iter->processor.Processor == PIPE_SHADER_GEOMETRY ||
         (!patch &&
-         (iter->processor.Processor == PIPE_SHADER_TESS_CTRL ||
+         (iter->processor.Processor == MESA_SHADER_TESS_CTRL ||
           iter->processor.Processor == PIPE_SHADER_TESS_EVAL)))) {
       TXT("[]");
    }
@@ -323,7 +323,7 @@ iter_declaration(
    /* all non-patch tess ctrl shader outputs are two dimensional */
    if (decl->Declaration.File == TGSI_FILE_OUTPUT &&
        !patch &&
-       iter->processor.Processor == PIPE_SHADER_TESS_CTRL) {
+       iter->processor.Processor == MESA_SHADER_TESS_CTRL) {
       TXT("[]");
    }
 
diff --git a/src/gallium/auxiliary/tgsi/tgsi_from_mesa.h b/src/gallium/auxiliary/tgsi/tgsi_from_mesa.h
index 1edd177b0f1..e74cb990bb4 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_from_mesa.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_from_mesa.h
@@ -63,7 +63,7 @@ pipe_shader_type_from_mesa(gl_shader_stage stage)
 {
    STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_VERTEX == MESA_SHADER_VERTEX);
    STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_FRAGMENT == PIPE_SHADER_FRAGMENT);
-   STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_TESS_CTRL == PIPE_SHADER_TESS_CTRL);
+   STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_TESS_CTRL == MESA_SHADER_TESS_CTRL);
    STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_TESS_EVAL == PIPE_SHADER_TESS_EVAL);
    STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_GEOMETRY == PIPE_SHADER_GEOMETRY);
    STATIC_ASSERT((enum pipe_shader_type) MESA_SHADER_COMPUTE == PIPE_SHADER_COMPUTE);
diff --git a/src/gallium/auxiliary/tgsi/tgsi_sanity.c b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
index 472145fcf1e..61995c6cecd 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_sanity.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
@@ -417,7 +417,7 @@ iter_declaration(
          decl->Semantic.Name == TGSI_SEMANTIC_TESSINNER;
       if (file == TGSI_FILE_INPUT && !patch && (
                 processor == PIPE_SHADER_GEOMETRY ||
-                processor == PIPE_SHADER_TESS_CTRL ||
+                processor == MESA_SHADER_TESS_CTRL ||
                 processor == PIPE_SHADER_TESS_EVAL)) {
          unsigned vert;
          for (vert = 0; vert < ctx->implied_array_size; ++vert) {
@@ -426,7 +426,7 @@ iter_declaration(
             check_and_declare(ctx, reg);
          }
       } else if (file == TGSI_FILE_OUTPUT && !patch &&
-                 processor == PIPE_SHADER_TESS_CTRL) {
+                 processor == MESA_SHADER_TESS_CTRL) {
          unsigned vert;
          for (vert = 0; vert < ctx->implied_out_array_size; ++vert) {
             scan_register *reg = MALLOC(sizeof(scan_register));
@@ -491,7 +491,7 @@ iter_property(
        prop->Property.PropertyName == TGSI_PROPERTY_GS_INPUT_PRIM) {
       ctx->implied_array_size = mesa_vertices_per_prim(prop->u[0].Data);
    }
-   if (iter->processor.Processor == PIPE_SHADER_TESS_CTRL &&
+   if (iter->processor.Processor == MESA_SHADER_TESS_CTRL &&
        prop->Property.PropertyName == TGSI_PROPERTY_TCS_VERTICES_OUT)
       ctx->implied_out_array_size = prop->u[0].Data;
    return true;
@@ -501,7 +501,7 @@ static bool
 prolog(struct tgsi_iterate_context *iter)
 {
    struct sanity_check_ctx *ctx = (struct sanity_check_ctx *) iter;
-   if (iter->processor.Processor == PIPE_SHADER_TESS_CTRL ||
+   if (iter->processor.Processor == MESA_SHADER_TESS_CTRL ||
        iter->processor.Processor == PIPE_SHADER_TESS_EVAL)
       ctx->implied_array_size = 32;
    return true;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index a5b7aafed1f..a6896709e3e 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -126,7 +126,7 @@ scan_src_operand(struct tgsi_shader_info *info,
       }
    }
 
-   if (info->processor == PIPE_SHADER_TESS_CTRL &&
+   if (info->processor == MESA_SHADER_TESS_CTRL &&
        src->Register.File == TGSI_FILE_OUTPUT) {
       unsigned input;
 
@@ -613,7 +613,7 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
    assert(procType == PIPE_SHADER_FRAGMENT ||
           procType == MESA_SHADER_VERTEX ||
           procType == PIPE_SHADER_GEOMETRY ||
-          procType == PIPE_SHADER_TESS_CTRL ||
+          procType == MESA_SHADER_TESS_CTRL ||
           procType == PIPE_SHADER_TESS_EVAL ||
           procType == PIPE_SHADER_COMPUTE);
    info->processor = procType;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_text.c b/src/gallium/auxiliary/tgsi/tgsi_text.c
index a4a0807ae4c..59c5c81b1e2 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_text.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_text.c
@@ -339,7 +339,7 @@ static bool parse_header( struct translate_ctx *ctx )
    else if (str_match_nocase_whole( &ctx->cur, "GEOM" ))
       processor = PIPE_SHADER_GEOMETRY;
    else if (str_match_nocase_whole( &ctx->cur, "TESS_CTRL" ))
-      processor = PIPE_SHADER_TESS_CTRL;
+      processor = MESA_SHADER_TESS_CTRL;
    else if (str_match_nocase_whole( &ctx->cur, "TESS_EVAL" ))
       processor = PIPE_SHADER_TESS_EVAL;
    else if (str_match_nocase_whole( &ctx->cur, "COMP" ))
@@ -732,7 +732,7 @@ parse_register_dcl(
       /* tessellation has similar constraints to geometry shader */
       if ((ctx->processor == PIPE_SHADER_GEOMETRY && is_in) ||
           (ctx->processor == PIPE_SHADER_TESS_EVAL && is_in) ||
-          (ctx->processor == PIPE_SHADER_TESS_CTRL && (is_in || is_out))) {
+          (ctx->processor == MESA_SHADER_TESS_CTRL && (is_in || is_out))) {
          brackets[0] = brackets[1];
          *num_brackets = 1;
       } else {
@@ -1810,7 +1810,7 @@ static bool translate( struct translate_ctx *ctx )
    if (!parse_header( ctx ))
       return false;
 
-   if (ctx->processor == PIPE_SHADER_TESS_CTRL ||
+   if (ctx->processor == MESA_SHADER_TESS_CTRL ||
        ctx->processor == PIPE_SHADER_TESS_EVAL)
        ctx->implied_array_size = 32;
 
diff --git a/src/gallium/auxiliary/tgsi/tgsi_ureg.c b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
index f6c2f720af7..5842dcf1eda 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_ureg.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_ureg.c
@@ -2184,7 +2184,7 @@ void *ureg_create_shader( struct ureg_program *ureg,
    switch (ureg->processor) {
    case MESA_SHADER_VERTEX:
       return pipe->create_vs_state(pipe, &state);
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       return pipe->create_tcs_state(pipe, &state);
    case PIPE_SHADER_TESS_EVAL:
       return pipe->create_tes_state(pipe, &state);
diff --git a/src/gallium/auxiliary/util/u_blitter.c b/src/gallium/auxiliary/util/u_blitter.c
index 73c3ca67b53..1f4594ec883 100644
--- a/src/gallium/auxiliary/util/u_blitter.c
+++ b/src/gallium/auxiliary/util/u_blitter.c
@@ -193,7 +193,7 @@ struct blitter_context *util_blitter_create(struct pipe_context *pipe)
       pipe->screen->shader_caps[PIPE_SHADER_GEOMETRY].max_instructions > 0;
 
    ctx->has_tessellation =
-      pipe->screen->shader_caps[PIPE_SHADER_TESS_CTRL].max_instructions > 0;
+      pipe->screen->shader_caps[MESA_SHADER_TESS_CTRL].max_instructions > 0;
 
    ctx->has_stream_out = pipe->screen->caps.max_stream_output_buffers != 0;
 
diff --git a/src/gallium/auxiliary/util/u_simple_shaders.c b/src/gallium/auxiliary/util/u_simple_shaders.c
index d66b5342d21..312c07ad71b 100644
--- a/src/gallium/auxiliary/util/u_simple_shaders.c
+++ b/src/gallium/auxiliary/util/u_simple_shaders.c
@@ -1151,7 +1151,7 @@ util_make_tess_ctrl_passthrough_shader(struct pipe_context *pipe,
    struct ureg_dst dst[PIPE_MAX_SHADER_OUTPUTS];
    struct ureg_src src[PIPE_MAX_SHADER_INPUTS];
 
-   ureg = ureg_create(PIPE_SHADER_TESS_CTRL);
+   ureg = ureg_create(MESA_SHADER_TESS_CTRL);
 
    if (!ureg)
       return NULL;
diff --git a/src/gallium/auxiliary/util/u_threaded_context.c b/src/gallium/auxiliary/util/u_threaded_context.c
index 76de75700af..e9222eaf786 100644
--- a/src/gallium/auxiliary/util/u_threaded_context.c
+++ b/src/gallium/auxiliary/util/u_threaded_context.c
@@ -914,7 +914,7 @@ tc_add_all_gfx_bindings_to_buffer_list(struct threaded_context *tc)
    tc_add_shader_bindings_to_buffer_list(tc, buffer_list, PIPE_SHADER_FRAGMENT);
 
    if (tc->seen_tcs)
-      tc_add_shader_bindings_to_buffer_list(tc, buffer_list, PIPE_SHADER_TESS_CTRL);
+      tc_add_shader_bindings_to_buffer_list(tc, buffer_list, MESA_SHADER_TESS_CTRL);
    if (tc->seen_tes)
       tc_add_shader_bindings_to_buffer_list(tc, buffer_list, PIPE_SHADER_TESS_EVAL);
    if (tc->seen_gs)
@@ -958,7 +958,7 @@ tc_rebind_buffer(struct threaded_context *tc, uint32_t old_id, uint32_t new_id,
    rebound += tc_rebind_shader_bindings(tc, old_id, new_id, PIPE_SHADER_FRAGMENT, rebind_mask);
 
    if (tc->seen_tcs)
-      rebound += tc_rebind_shader_bindings(tc, old_id, new_id, PIPE_SHADER_TESS_CTRL, rebind_mask);
+      rebound += tc_rebind_shader_bindings(tc, old_id, new_id, MESA_SHADER_TESS_CTRL, rebind_mask);
    if (tc->seen_tes)
       rebound += tc_rebind_shader_bindings(tc, old_id, new_id, PIPE_SHADER_TESS_EVAL, rebind_mask);
    if (tc->seen_gs)
@@ -1012,7 +1012,7 @@ tc_is_buffer_bound_for_write(struct threaded_context *tc, uint32_t id)
       return true;
 
    if (tc->seen_tcs &&
-       tc_is_buffer_shader_bound_for_write(tc, id, PIPE_SHADER_TESS_CTRL))
+       tc_is_buffer_shader_bound_for_write(tc, id, MESA_SHADER_TESS_CTRL))
       return true;
 
    if (tc->seen_tes &&
diff --git a/src/gallium/drivers/asahi/agx_blit.c b/src/gallium/drivers/asahi/agx_blit.c
index d386ea9e82e..0ec7a525401 100644
--- a/src/gallium/drivers/asahi/agx_blit.c
+++ b/src/gallium/drivers/asahi/agx_blit.c
@@ -461,7 +461,7 @@ agx_blitter_save(struct agx_context *ctx, struct blitter_context *blitter,
    util_blitter_save_vertex_shader(blitter,
                                    ctx->stage[MESA_SHADER_VERTEX].shader);
    util_blitter_save_tessctrl_shader(blitter,
-                                     ctx->stage[PIPE_SHADER_TESS_CTRL].shader);
+                                     ctx->stage[MESA_SHADER_TESS_CTRL].shader);
    util_blitter_save_tesseval_shader(blitter,
                                      ctx->stage[PIPE_SHADER_TESS_EVAL].shader);
    util_blitter_save_geometry_shader(blitter,
diff --git a/src/gallium/drivers/asahi/agx_state.c b/src/gallium/drivers/asahi/agx_state.c
index 4777df5651c..f937bfa40f2 100644
--- a/src/gallium/drivers/asahi/agx_state.c
+++ b/src/gallium/drivers/asahi/agx_state.c
@@ -1947,7 +1947,7 @@ agx_create_shader_state(struct pipe_context *pctx,
     * shader with a default key. This could be improved but hopefully this is
     * acceptable for now.
     */
-   if ((so->type == PIPE_SHADER_TESS_CTRL) ||
+   if ((so->type == MESA_SHADER_TESS_CTRL) ||
        (so->type == PIPE_SHADER_GEOMETRY) ||
        (so->type == PIPE_SHADER_FRAGMENT && !so->info.uses_fbfetch)) {
       union asahi_shader_key key = {0};
@@ -2214,7 +2214,7 @@ agx_update_tcs(struct agx_context *ctx, const struct pipe_draw_info *info)
    assert(info->mode == MESA_PRIM_PATCHES);
 
    ctx->tcs = _mesa_hash_table_next_entry(
-                 ctx->stage[PIPE_SHADER_TESS_CTRL].shader->variants, NULL)
+                 ctx->stage[MESA_SHADER_TESS_CTRL].shader->variants, NULL)
                  ->data;
    return true;
 }
@@ -2427,7 +2427,7 @@ agx_bind_gs_state(struct pipe_context *pctx, void *cso)
 static void
 agx_bind_tcs_state(struct pipe_context *pctx, void *cso)
 {
-   agx_bind_shader_state(pctx, cso, PIPE_SHADER_TESS_CTRL);
+   agx_bind_shader_state(pctx, cso, MESA_SHADER_TESS_CTRL);
 }
 
 static void
@@ -4596,7 +4596,7 @@ agx_draw_patches(struct agx_context *ctx, const struct pipe_draw_info *info,
    agx_update_vs(batch, info->index_size);
    agx_update_tcs(ctx, info);
    /* XXX */
-   ctx->stage[PIPE_SHADER_TESS_CTRL].dirty = ~0;
+   ctx->stage[MESA_SHADER_TESS_CTRL].dirty = ~0;
    ctx->stage[PIPE_SHADER_TESS_EVAL].dirty = ~0;
    agx_update_descriptors(batch, ctx->vs);
    agx_update_descriptors(batch, ctx->tcs);
@@ -4691,7 +4691,7 @@ agx_draw_patches(struct agx_context *ctx, const struct pipe_draw_info *info,
               MESA_SHADER_VERTEX, 0);
 
    agx_launch(batch, tcs_grid, agx_workgroup(tcs->tess.output_patch_size, 1, 1),
-              ctx->tcs, NULL, PIPE_SHADER_TESS_CTRL, 0);
+              ctx->tcs, NULL, MESA_SHADER_TESS_CTRL, 0);
 
    batch->uniforms.vertex_output_buffer_ptr = 0;
 
diff --git a/src/gallium/drivers/asahi/agx_state.h b/src/gallium/drivers/asahi/agx_state.h
index 722c4cfe11c..a1052bf5755 100644
--- a/src/gallium/drivers/asahi/agx_state.h
+++ b/src/gallium/drivers/asahi/agx_state.h
@@ -90,7 +90,7 @@ enum agx_sysval_table {
 
 static_assert(AGX_SYSVAL_STAGE(MESA_SHADER_VERTEX) == AGX_SYSVAL_TABLE_VS,
               "fixed enum orderings");
-static_assert(AGX_SYSVAL_STAGE(PIPE_SHADER_TESS_CTRL) == AGX_SYSVAL_TABLE_TCS,
+static_assert(AGX_SYSVAL_STAGE(MESA_SHADER_TESS_CTRL) == AGX_SYSVAL_TABLE_TCS,
               "fixed enum orderings");
 static_assert(AGX_SYSVAL_STAGE(PIPE_SHADER_TESS_EVAL) == AGX_SYSVAL_TABLE_TES,
               "fixed enum orderings");
diff --git a/src/gallium/drivers/d3d12/d3d12_blit.cpp b/src/gallium/drivers/d3d12/d3d12_blit.cpp
index 65528403b6e..b1345f97a4b 100644
--- a/src/gallium/drivers/d3d12/d3d12_blit.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_blit.cpp
@@ -273,7 +273,7 @@ util_blit_save_state(struct d3d12_context *ctx)
    util_blitter_save_fragment_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_FRAGMENT]);
    util_blitter_save_vertex_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_VERTEX]);
    util_blitter_save_geometry_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_GEOMETRY]);
-   util_blitter_save_tessctrl_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_TESS_CTRL]);
+   util_blitter_save_tessctrl_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_TESS_CTRL]);
    util_blitter_save_tesseval_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_TESS_EVAL]);
 
    util_blitter_save_framebuffer(ctx->blitter, &ctx->fb);
diff --git a/src/gallium/drivers/d3d12/d3d12_compiler.cpp b/src/gallium/drivers/d3d12/d3d12_compiler.cpp
index 973bd8e8060..dd958cc897f 100644
--- a/src/gallium/drivers/d3d12/d3d12_compiler.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_compiler.cpp
@@ -669,7 +669,7 @@ static void
 validate_tess_ctrl_shader_variant(struct d3d12_selection_context *sel_ctx)
 {
    struct d3d12_context *ctx = sel_ctx->ctx;
-   d3d12_shader_selector *tcs = ctx->gfx_stages[PIPE_SHADER_TESS_CTRL];
+   d3d12_shader_selector *tcs = ctx->gfx_stages[MESA_SHADER_TESS_CTRL];
 
    /* Nothing to do if there is a user tess ctrl shader bound */
    if (tcs != NULL && !tcs->is_variant)
@@ -693,7 +693,7 @@ validate_tess_ctrl_shader_variant(struct d3d12_selection_context *sel_ctx)
 
    /* Find/create the proper variant and bind it */
    tcs = variant_needed ? d3d12_get_tcs_variant(ctx, &key) : NULL;
-   ctx->gfx_stages[PIPE_SHADER_TESS_CTRL] = tcs;
+   ctx->gfx_stages[MESA_SHADER_TESS_CTRL] = tcs;
 }
 
 static bool
@@ -721,7 +721,7 @@ d3d12_compare_shader_keys(struct d3d12_selection_context* sel_ctx, const d3d12_s
       if (expect->gs.all != have->gs.all)
          return false;
       break;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       if (expect->hs.all != have->hs.all)
          return false;
       break;
@@ -814,7 +814,7 @@ d3d12_shader_key_hash(const d3d12_shader_key *key)
    case PIPE_SHADER_COMPUTE:
       hash = _mesa_hash_data_with_seed(&key->cs, sizeof(key->cs), hash);
       break;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       hash += static_cast<uint32_t>(key->hs.all);
       break;
    case PIPE_SHADER_TESS_EVAL:
@@ -852,7 +852,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
    case PIPE_SHADER_GEOMETRY:
       key->gs.all = 0;
       break;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       key->hs.all = 0;
       break;
    case PIPE_SHADER_TESS_EVAL:
@@ -893,7 +893,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
    }
 
    if (next) {
-      if (stage == PIPE_SHADER_TESS_CTRL)
+      if (stage == MESA_SHADER_TESS_CTRL)
          key->hs.next_patch_inputs = next->initial->info.patch_outputs_read;
       key->next_varying_inputs = next->initial->info.inputs_read;
       if (BITSET_TEST(next->initial->info.system_values_read, SYSTEM_VALUE_PRIMITIVE_ID))
@@ -956,7 +956,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
             key->prev_varying_outputs = (key->prev_varying_outputs | VARYING_BIT_VAR(12)) & ~VARYING_BIT_FACE;
          key->prev_varying_outputs |= sel->initial->info.inputs_read & (VARYING_BIT_PNTC | BITFIELD64_RANGE(VARYING_SLOT_TEX0, 8));
       }
-   } else if (stage == PIPE_SHADER_TESS_CTRL) {
+   } else if (stage == MESA_SHADER_TESS_CTRL) {
       if (next && next->initial->info.stage == MESA_SHADER_TESS_EVAL) {
          key->hs.primitive_mode = next->initial->info.tess._primitive_mode;
          key->hs.ccw = next->initial->info.tess.ccw;
@@ -1211,10 +1211,10 @@ get_prev_shader(struct d3d12_context *ctx, pipe_shader_type current)
          return ctx->gfx_stages[PIPE_SHADER_TESS_EVAL];
       FALLTHROUGH;
    case PIPE_SHADER_TESS_EVAL:
-      if (ctx->gfx_stages[PIPE_SHADER_TESS_CTRL])
-         return ctx->gfx_stages[PIPE_SHADER_TESS_CTRL];
+      if (ctx->gfx_stages[MESA_SHADER_TESS_CTRL])
+         return ctx->gfx_stages[MESA_SHADER_TESS_CTRL];
       FALLTHROUGH;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       return ctx->gfx_stages[MESA_SHADER_VERTEX];
    default:
       UNREACHABLE("shader type not supported");
@@ -1226,10 +1226,10 @@ get_next_shader(struct d3d12_context *ctx, pipe_shader_type current)
 {
    switch (current) {
    case MESA_SHADER_VERTEX:
-      if (ctx->gfx_stages[PIPE_SHADER_TESS_CTRL])
-         return ctx->gfx_stages[PIPE_SHADER_TESS_CTRL];
+      if (ctx->gfx_stages[MESA_SHADER_TESS_CTRL])
+         return ctx->gfx_stages[MESA_SHADER_TESS_CTRL];
       FALLTHROUGH;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       if (ctx->gfx_stages[PIPE_SHADER_TESS_EVAL])
          return ctx->gfx_stages[PIPE_SHADER_TESS_EVAL];
       FALLTHROUGH;
@@ -1513,10 +1513,10 @@ d3d12_select_shader_variants(struct d3d12_context *ctx, const struct pipe_draw_i
       next = get_next_shader(ctx, MESA_SHADER_VERTEX);
       select_shader_variant(&sel_ctx, stages[MESA_SHADER_VERTEX], nullptr, next);
    }
-   if (stages[PIPE_SHADER_TESS_CTRL]) {
-      prev = get_prev_shader(ctx, PIPE_SHADER_TESS_CTRL);
-      next = get_next_shader(ctx, PIPE_SHADER_TESS_CTRL);
-      select_shader_variant(&sel_ctx, stages[PIPE_SHADER_TESS_CTRL], prev, next);
+   if (stages[MESA_SHADER_TESS_CTRL]) {
+      prev = get_prev_shader(ctx, MESA_SHADER_TESS_CTRL);
+      next = get_next_shader(ctx, MESA_SHADER_TESS_CTRL);
+      select_shader_variant(&sel_ctx, stages[MESA_SHADER_TESS_CTRL], prev, next);
    }
    if (stages[PIPE_SHADER_TESS_EVAL]) {
       prev = get_prev_shader(ctx, PIPE_SHADER_TESS_EVAL);
diff --git a/src/gallium/drivers/d3d12/d3d12_context_graphics.cpp b/src/gallium/drivers/d3d12/d3d12_context_graphics.cpp
index 2f73af48d38..93d163c0144 100644
--- a/src/gallium/drivers/d3d12/d3d12_context_graphics.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_context_graphics.cpp
@@ -1145,20 +1145,20 @@ static void *
 d3d12_create_tcs_state(struct pipe_context *pctx,
    const struct pipe_shader_state *shader)
 {
-   return d3d12_create_shader(d3d12_context(pctx), PIPE_SHADER_TESS_CTRL, shader);
+   return d3d12_create_shader(d3d12_context(pctx), MESA_SHADER_TESS_CTRL, shader);
 }
 
 static void
 d3d12_bind_tcs_state(struct pipe_context *pctx, void *tcss)
 {
-   bind_stage(d3d12_context(pctx), PIPE_SHADER_TESS_CTRL,
+   bind_stage(d3d12_context(pctx), MESA_SHADER_TESS_CTRL,
       (struct d3d12_shader_selector *)tcss);
 }
 
 static void
 d3d12_delete_tcs_state(struct pipe_context *pctx, void *tcs)
 {
-   delete_shader(d3d12_context(pctx), PIPE_SHADER_TESS_CTRL,
+   delete_shader(d3d12_context(pctx), MESA_SHADER_TESS_CTRL,
       (struct d3d12_shader_selector *)tcs);
 }
 
@@ -1953,7 +1953,7 @@ d3d12_clear_render_target(struct pipe_context *pctx,
       util_blitter_save_fragment_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_FRAGMENT]);
       util_blitter_save_vertex_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_VERTEX]);
       util_blitter_save_geometry_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_GEOMETRY]);
-      util_blitter_save_tessctrl_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_TESS_CTRL]);
+      util_blitter_save_tessctrl_shader(ctx->blitter, ctx->gfx_stages[MESA_SHADER_TESS_CTRL]);
       util_blitter_save_tesseval_shader(ctx->blitter, ctx->gfx_stages[PIPE_SHADER_TESS_EVAL]);
 
       util_blitter_save_framebuffer(ctx->blitter, &ctx->fb);
diff --git a/src/gallium/drivers/d3d12/d3d12_pipeline_state.cpp b/src/gallium/drivers/d3d12/d3d12_pipeline_state.cpp
index c3468837eba..b9484e17cdd 100644
--- a/src/gallium/drivers/d3d12/d3d12_pipeline_state.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_pipeline_state.cpp
@@ -289,8 +289,8 @@ create_gfx_pipeline_state(struct d3d12_context *ctx)
       last_vertex_stage_nir = shader->nir;
    }
 
-   if (state->stages[PIPE_SHADER_TESS_CTRL]) {
-      auto shader = state->stages[PIPE_SHADER_TESS_CTRL];
+   if (state->stages[MESA_SHADER_TESS_CTRL]) {
+      auto shader = state->stages[MESA_SHADER_TESS_CTRL];
       pso_desc.HS = D3D12_SHADER_BYTECODE{ shader->bytecode, shader->bytecode_length };
       last_vertex_stage_nir = shader->nir;
    }
diff --git a/src/gallium/drivers/d3d12/d3d12_root_signature.cpp b/src/gallium/drivers/d3d12/d3d12_root_signature.cpp
index b81c30224a0..5d0cc1e8657 100644
--- a/src/gallium/drivers/d3d12/d3d12_root_signature.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_root_signature.cpp
@@ -47,7 +47,7 @@ get_shader_visibility(enum pipe_shader_type stage)
       return D3D12_SHADER_VISIBILITY_PIXEL;
    case PIPE_SHADER_GEOMETRY:
       return D3D12_SHADER_VISIBILITY_GEOMETRY;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       return D3D12_SHADER_VISIBILITY_HULL;
    case PIPE_SHADER_TESS_EVAL:
       return D3D12_SHADER_VISIBILITY_DOMAIN;
diff --git a/src/gallium/drivers/d3d12/d3d12_screen.cpp b/src/gallium/drivers/d3d12/d3d12_screen.cpp
index 18c6ddcc08a..6891beb454d 100644
--- a/src/gallium/drivers/d3d12/d3d12_screen.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_screen.cpp
@@ -150,7 +150,7 @@ d3d12_init_shader_caps(struct d3d12_screen *screen)
          caps->max_inputs = D3D12_GS_INPUT_REGISTER_COUNT;
          caps->max_outputs = D3D12_GS_OUTPUT_REGISTER_COUNT;
          break;
-      case PIPE_SHADER_TESS_CTRL:
+      case MESA_SHADER_TESS_CTRL:
          caps->max_inputs = D3D12_HS_CONTROL_POINT_PHASE_INPUT_REGISTER_COUNT;
          caps->max_outputs = D3D12_HS_CONTROL_POINT_PHASE_OUTPUT_REGISTER_COUNT;
          break;
diff --git a/src/gallium/drivers/d3d12/d3d12_tcs_variant.cpp b/src/gallium/drivers/d3d12/d3d12_tcs_variant.cpp
index e16a6373d6e..66ee9e4947d 100644
--- a/src/gallium/drivers/d3d12/d3d12_tcs_variant.cpp
+++ b/src/gallium/drivers/d3d12/d3d12_tcs_variant.cpp
@@ -145,7 +145,7 @@ create_tess_ctrl_shader_variant(struct d3d12_context *ctx, struct d3d12_tcs_vari
    templ.ir.nir = nir;
    templ.stream_output.num_outputs = 0;
 
-   d3d12_shader_selector *tcs = d3d12_create_shader(ctx, PIPE_SHADER_TESS_CTRL, &templ);
+   d3d12_shader_selector *tcs = d3d12_create_shader(ctx, MESA_SHADER_TESS_CTRL, &templ);
    if (tcs) {
       tcs->is_variant = true;
       tcs->tcs_key = *key;
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_const.cc b/src/gallium/drivers/freedreno/a6xx/fd6_const.cc
index ee268ab6411..1071f2f417d 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_const.cc
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_const.cc
@@ -351,7 +351,7 @@ fd6_build_user_consts(struct fd6_emit *emit)
 
    if (PIPELINE == HAS_TESS_GS) {
       if (emit->hs) {
-         emit_user_consts<CHIP>(emit->hs, constobj, &ctx->constbuf[PIPE_SHADER_TESS_CTRL]);
+         emit_user_consts<CHIP>(emit->hs, constobj, &ctx->constbuf[MESA_SHADER_TESS_CTRL]);
          emit_user_consts<CHIP>(emit->ds, constobj, &ctx->constbuf[PIPE_SHADER_TESS_EVAL]);
       }
       if (emit->gs) {
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_context.cc b/src/gallium/drivers/freedreno/a6xx/fd6_context.cc
index 70c66b3e696..188cdce4178 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_context.cc
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_context.cc
@@ -179,7 +179,7 @@ setup_state_map(struct fd_context *ctx)
 
    fd_context_add_shader_map(ctx, MESA_SHADER_VERTEX, FD_DIRTY_SHADER_TEX,
                              BIT(FD6_GROUP_VS_TEX));
-   fd_context_add_shader_map(ctx, PIPE_SHADER_TESS_CTRL, FD_DIRTY_SHADER_TEX,
+   fd_context_add_shader_map(ctx, MESA_SHADER_TESS_CTRL, FD_DIRTY_SHADER_TEX,
                              BIT(FD6_GROUP_HS_TEX));
    fd_context_add_shader_map(ctx, PIPE_SHADER_TESS_EVAL, FD_DIRTY_SHADER_TEX,
                              BIT(FD6_GROUP_DS_TEX));
@@ -193,7 +193,7 @@ setup_state_map(struct fd_context *ctx)
    fd_context_add_shader_map(ctx, MESA_SHADER_VERTEX,
                              FD_DIRTY_SHADER_SSBO | FD_DIRTY_SHADER_IMAGE,
                              BIT(FD6_GROUP_VS_BINDLESS));
-   fd_context_add_shader_map(ctx, PIPE_SHADER_TESS_CTRL,
+   fd_context_add_shader_map(ctx, MESA_SHADER_TESS_CTRL,
                              FD_DIRTY_SHADER_SSBO | FD_DIRTY_SHADER_IMAGE,
                              BIT(FD6_GROUP_HS_BINDLESS));
    fd_context_add_shader_map(ctx, PIPE_SHADER_TESS_EVAL,
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc b/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc
index 255dc799e9a..8dbec2d86d9 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.cc
@@ -663,7 +663,7 @@ fd6_emit_3d_state(struct fd_ringbuffer *ring, struct fd6_emit *emit)
          fd6_state_take_group(&emit->state, state, FD6_GROUP_VS_BINDLESS);
          break;
       case FD6_GROUP_HS_BINDLESS:
-         state = fd6_build_bindless_state<CHIP>(ctx, PIPE_SHADER_TESS_CTRL, false);
+         state = fd6_build_bindless_state<CHIP>(ctx, MESA_SHADER_TESS_CTRL, false);
          fd6_state_take_group(&emit->state, state, FD6_GROUP_HS_BINDLESS);
          break;
       case FD6_GROUP_DS_BINDLESS:
@@ -697,7 +697,7 @@ fd6_emit_3d_state(struct fd_ringbuffer *ring, struct fd6_emit *emit)
          fd6_state_take_group(&emit->state, state, FD6_GROUP_VS_TEX);
          break;
       case FD6_GROUP_HS_TEX:
-         state = tex_state(ctx, PIPE_SHADER_TESS_CTRL);
+         state = tex_state(ctx, MESA_SHADER_TESS_CTRL);
          fd6_state_take_group(&emit->state, state, FD6_GROUP_HS_TEX);
          break;
       case FD6_GROUP_DS_TEX:
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_texture.cc b/src/gallium/drivers/freedreno/a6xx/fd6_texture.cc
index 8f26669ed6d..52654814648 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_texture.cc
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_texture.cc
@@ -617,7 +617,7 @@ build_texture_state(struct fd_context *ctx, enum pipe_shader_type type,
       tex_const_reg = REG_A6XX_SP_VS_TEXMEMOBJ_BASE;
       tex_count_reg = REG_A6XX_SP_VS_TSIZE;
       break;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       sb = SB6_HS_TEX;
       opcode = CP_LOAD_STATE6_GEOM;
       tex_samp_reg = REG_A6XX_SP_HS_SAMPLER_BASE;
diff --git a/src/gallium/drivers/freedreno/freedreno_program.c b/src/gallium/drivers/freedreno/freedreno_program.c
index 21c8b98310c..6fc6b42a395 100644
--- a/src/gallium/drivers/freedreno/freedreno_program.c
+++ b/src/gallium/drivers/freedreno/freedreno_program.c
@@ -63,7 +63,7 @@ fd_set_patch_vertices(struct pipe_context *pctx, uint8_t patch_vertices) in_dt
     * stage as TCS could be NULL (passthrough)
     */
    if (ctx->prog.ds || ctx->prog.hs) {
-      fd_context_dirty_shader(ctx, PIPE_SHADER_TESS_CTRL, FD_DIRTY_SHADER_PROG);
+      fd_context_dirty_shader(ctx, MESA_SHADER_TESS_CTRL, FD_DIRTY_SHADER_PROG);
    }
 }
 
@@ -81,8 +81,8 @@ fd_tcs_state_bind(struct pipe_context *pctx, void *hwcso) in_dt
 {
    struct fd_context *ctx = fd_context(pctx);
    ctx->prog.hs = hwcso;
-   fd_context_dirty_shader(ctx, PIPE_SHADER_TESS_CTRL, FD_DIRTY_SHADER_PROG);
-   update_bound_stage(ctx, PIPE_SHADER_TESS_CTRL, !!hwcso);
+   fd_context_dirty_shader(ctx, MESA_SHADER_TESS_CTRL, FD_DIRTY_SHADER_PROG);
+   update_bound_stage(ctx, MESA_SHADER_TESS_CTRL, !!hwcso);
 }
 
 static void
diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
index 2b7f6dd39a5..5deea2462b1 100644
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -208,7 +208,7 @@ fd_init_shader_caps(struct fd_screen *screen)
          (struct pipe_shader_caps *)&screen->base.shader_caps[i];
 
       switch (i) {
-      case PIPE_SHADER_TESS_CTRL:
+      case MESA_SHADER_TESS_CTRL:
       case PIPE_SHADER_TESS_EVAL:
       case PIPE_SHADER_GEOMETRY:
          if (!is_a6xx(screen))
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_descriptor.h b/src/gallium/drivers/freedreno/ir3/ir3_descriptor.h
index 275aa3bc9e9..dd09060e965 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_descriptor.h
+++ b/src/gallium/drivers/freedreno/ir3/ir3_descriptor.h
@@ -36,7 +36,7 @@ ir3_shader_descriptor_set(enum pipe_shader_type shader)
 {
    switch (shader) {
    case MESA_SHADER_VERTEX: return 0;
-   case PIPE_SHADER_TESS_CTRL: return 1;
+   case MESA_SHADER_TESS_CTRL: return 1;
    case PIPE_SHADER_TESS_EVAL: return 2;
    case PIPE_SHADER_GEOMETRY:  return 3;
    case PIPE_SHADER_FRAGMENT:  return 4;
diff --git a/src/gallium/drivers/llvmpipe/lp_draw_arrays.c b/src/gallium/drivers/llvmpipe/lp_draw_arrays.c
index 56d16a9125f..59caf99858c 100644
--- a/src/gallium/drivers/llvmpipe/lp_draw_arrays.c
+++ b/src/gallium/drivers/llvmpipe/lp_draw_arrays.c
@@ -113,8 +113,8 @@ llvmpipe_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
                                       lp->num_sampler_views[PIPE_SHADER_GEOMETRY],
                                       lp->sampler_views[PIPE_SHADER_GEOMETRY]);
    llvmpipe_prepare_tess_ctrl_sampling(lp,
-                                       lp->num_sampler_views[PIPE_SHADER_TESS_CTRL],
-                                       lp->sampler_views[PIPE_SHADER_TESS_CTRL]);
+                                       lp->num_sampler_views[MESA_SHADER_TESS_CTRL],
+                                       lp->sampler_views[MESA_SHADER_TESS_CTRL]);
    llvmpipe_prepare_tess_eval_sampling(lp,
                                        lp->num_sampler_views[PIPE_SHADER_TESS_EVAL],
                                        lp->sampler_views[PIPE_SHADER_TESS_EVAL]);
@@ -126,8 +126,8 @@ llvmpipe_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
                                     lp->num_images[PIPE_SHADER_GEOMETRY],
                                     lp->images[PIPE_SHADER_GEOMETRY]);
    llvmpipe_prepare_tess_ctrl_images(lp,
-                                     lp->num_images[PIPE_SHADER_TESS_CTRL],
-                                     lp->images[PIPE_SHADER_TESS_CTRL]);
+                                     lp->num_images[MESA_SHADER_TESS_CTRL],
+                                     lp->images[MESA_SHADER_TESS_CTRL]);
    llvmpipe_prepare_tess_eval_images(lp,
                                      lp->num_images[PIPE_SHADER_TESS_EVAL],
                                      lp->images[PIPE_SHADER_TESS_EVAL]);
@@ -170,12 +170,12 @@ llvmpipe_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info,
 
    llvmpipe_cleanup_stage_sampling(lp, MESA_SHADER_VERTEX);
    llvmpipe_cleanup_stage_sampling(lp, PIPE_SHADER_GEOMETRY);
-   llvmpipe_cleanup_stage_sampling(lp, PIPE_SHADER_TESS_CTRL);
+   llvmpipe_cleanup_stage_sampling(lp, MESA_SHADER_TESS_CTRL);
    llvmpipe_cleanup_stage_sampling(lp, PIPE_SHADER_TESS_EVAL);
 
    llvmpipe_cleanup_stage_images(lp, MESA_SHADER_VERTEX);
    llvmpipe_cleanup_stage_images(lp, PIPE_SHADER_GEOMETRY);
-   llvmpipe_cleanup_stage_images(lp, PIPE_SHADER_TESS_CTRL);
+   llvmpipe_cleanup_stage_images(lp, MESA_SHADER_TESS_CTRL);
    llvmpipe_cleanup_stage_images(lp, PIPE_SHADER_TESS_EVAL);
 
    /*
diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c b/src/gallium/drivers/llvmpipe/lp_screen.c
index d932dc2c5aa..a2ca35d18d1 100644
--- a/src/gallium/drivers/llvmpipe/lp_screen.c
+++ b/src/gallium/drivers/llvmpipe/lp_screen.c
@@ -133,7 +133,7 @@ llvmpipe_init_shader_caps(struct pipe_screen *screen)
       case PIPE_SHADER_TASK:
          gallivm_init_shader_caps(caps);
          break;
-      case PIPE_SHADER_TESS_CTRL:
+      case MESA_SHADER_TESS_CTRL:
       case PIPE_SHADER_TESS_EVAL:
       case MESA_SHADER_VERTEX:
       case PIPE_SHADER_GEOMETRY:
diff --git a/src/gallium/drivers/llvmpipe/lp_state_fs.c b/src/gallium/drivers/llvmpipe/lp_state_fs.c
index 9bbe0e03d73..b787d129b4f 100644
--- a/src/gallium/drivers/llvmpipe/lp_state_fs.c
+++ b/src/gallium/drivers/llvmpipe/lp_state_fs.c
@@ -4246,7 +4246,7 @@ llvmpipe_set_constant_buffer(struct pipe_context *pipe,
    switch (shader) {
    case MESA_SHADER_VERTEX:
    case PIPE_SHADER_GEOMETRY:
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
    case PIPE_SHADER_TESS_EVAL: {
       const unsigned size = cb ? cb->buffer_size : 0;
 
@@ -4303,7 +4303,7 @@ llvmpipe_set_shader_buffers(struct pipe_context *pipe,
       switch (shader) {
       case MESA_SHADER_VERTEX:
       case PIPE_SHADER_GEOMETRY:
-      case PIPE_SHADER_TESS_CTRL:
+      case MESA_SHADER_TESS_CTRL:
       case PIPE_SHADER_TESS_EVAL: {
          const unsigned size = buffer ? buffer->buffer_size : 0;
          const uint8_t *data = NULL;
@@ -4363,7 +4363,7 @@ llvmpipe_set_shader_images(struct pipe_context *pipe,
    switch (shader) {
    case MESA_SHADER_VERTEX:
    case PIPE_SHADER_GEOMETRY:
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
    case PIPE_SHADER_TESS_EVAL:
       draw_set_images(llvmpipe->draw, shader, llvmpipe->images[shader],
                       start_slot + count);
diff --git a/src/gallium/drivers/llvmpipe/lp_state_sampler.c b/src/gallium/drivers/llvmpipe/lp_state_sampler.c
index 89d67fd914c..ee6812dbbb9 100644
--- a/src/gallium/drivers/llvmpipe/lp_state_sampler.c
+++ b/src/gallium/drivers/llvmpipe/lp_state_sampler.c
@@ -99,7 +99,7 @@ llvmpipe_bind_sampler_states(struct pipe_context *pipe,
    switch (shader) {
    case MESA_SHADER_VERTEX:
    case PIPE_SHADER_GEOMETRY:
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
    case PIPE_SHADER_TESS_EVAL:
       draw_set_samplers(llvmpipe->draw,
                         shader,
@@ -182,7 +182,7 @@ llvmpipe_set_sampler_views(struct pipe_context *pipe,
    switch (shader) {
    case MESA_SHADER_VERTEX:
    case PIPE_SHADER_GEOMETRY:
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
    case PIPE_SHADER_TESS_EVAL:
       draw_set_sampler_views(llvmpipe->draw,
                              shader,
@@ -414,7 +414,7 @@ llvmpipe_prepare_tess_ctrl_sampling(struct llvmpipe_context *lp,
                                     unsigned num,
                                     struct pipe_sampler_view **views)
 {
-   prepare_shader_sampling(lp, num, views, PIPE_SHADER_TESS_CTRL);
+   prepare_shader_sampling(lp, num, views, MESA_SHADER_TESS_CTRL);
 }
 
 
@@ -573,7 +573,7 @@ llvmpipe_prepare_tess_ctrl_images(struct llvmpipe_context *lp,
                                   unsigned num,
                                   struct pipe_image_view *views)
 {
-   prepare_shader_images(lp, num, views, PIPE_SHADER_TESS_CTRL);
+   prepare_shader_images(lp, num, views, MESA_SHADER_TESS_CTRL);
 }
 
 
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
index 1325e17d4b6..10301a94763 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp
@@ -1242,7 +1242,7 @@ nv50_ir_init_prog_info(struct nv50_ir_prog_info *info,
 {
    info_out->target = info->target;
    info_out->type = info->type;
-   if (info->type == PIPE_SHADER_TESS_CTRL || info->type == PIPE_SHADER_TESS_EVAL) {
+   if (info->type == MESA_SHADER_TESS_CTRL || info->type == PIPE_SHADER_TESS_EVAL) {
       info_out->prop.tp.domain = MESA_PRIM_COUNT;
       info_out->prop.tp.outputPrim = MESA_PRIM_COUNT;
    }
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
index 5027bc53fbc..0ffcbb6974c 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
@@ -983,7 +983,7 @@ nv50_ir_prog_info_out_print(struct nv50_ir_prog_info_out *info_out)
          INFO("      \"vp\": {\"usesDrawParameters\":\"%s\"}\n",
                info_out->prop.vp.usesDrawParameters ? "true" : "false");
          break;
-      case PIPE_SHADER_TESS_CTRL:
+      case MESA_SHADER_TESS_CTRL:
       case PIPE_SHADER_TESS_EVAL:
          INFO("      \"tp\":{\n");
          INFO("         \"outputPatchSize\":\"%d\"\n", info_out->prop.tp.outputPatchSize);
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
index 212aed5a157..7f9040b2369 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
@@ -112,7 +112,7 @@ nv50_ir_prog_info_out_serialize(struct blob *blob,
       case MESA_SHADER_VERTEX:
          blob_write_bytes(blob, &info_out->prop.vp, sizeof(info_out->prop.vp));
          break;
-      case PIPE_SHADER_TESS_CTRL:
+      case MESA_SHADER_TESS_CTRL:
       case PIPE_SHADER_TESS_EVAL:
          blob_write_bytes(blob, &info_out->prop.tp, sizeof(info_out->prop.tp));
          break;
@@ -232,7 +232,7 @@ nv50_ir_prog_info_out_deserialize(void *data, size_t size, size_t offset,
       case MESA_SHADER_VERTEX:
          blob_copy_bytes(&reader, &info_out->prop.vp, sizeof(info_out->prop.vp));
          break;
-      case PIPE_SHADER_TESS_CTRL:
+      case MESA_SHADER_TESS_CTRL:
       case PIPE_SHADER_TESS_EVAL:
          blob_copy_bytes(&reader, &info_out->prop.tp, sizeof(info_out->prop.tp));
          break;
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
index 5378ee6eb6c..a6b1a60db5c 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
@@ -108,7 +108,7 @@ nv50_init_shader_caps(struct nv50_screen *screen)
       struct pipe_shader_caps *caps =
          (struct pipe_shader_caps *)&screen->base.base.shader_caps[i];
 
-      if (i == PIPE_SHADER_TESS_CTRL || i == PIPE_SHADER_TESS_EVAL)
+      if (i == MESA_SHADER_TESS_CTRL || i == PIPE_SHADER_TESS_EVAL)
          continue;
 
       caps->max_instructions =
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
index 4596bf15a1d..d572dd2bd6b 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_context.h
@@ -297,7 +297,7 @@ nvc0_shader_stage(unsigned pipe)
 {
    switch (pipe) {
    case MESA_SHADER_VERTEX: return 0;
-   case PIPE_SHADER_TESS_CTRL: return 1;
+   case MESA_SHADER_TESS_CTRL: return 1;
    case PIPE_SHADER_TESS_EVAL: return 2;
    case PIPE_SHADER_GEOMETRY: return 3;
    case PIPE_SHADER_FRAGMENT: return 4;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
index f5a32c57257..796ff8f2712 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_program.c
@@ -693,7 +693,7 @@ nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset,
    case MESA_SHADER_VERTEX:
       ret = nvc0_vp_gen_header(prog, &info_out);
       break;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       ret = nvc0_tcp_gen_header(prog, &info_out);
       break;
    case PIPE_SHADER_TESS_EVAL:
@@ -1005,7 +1005,7 @@ nvc0_program_init_tcp_empty(struct nvc0_context *nvc0)
 {
    const nir_shader_compiler_options *options =
       nv50_ir_nir_shader_compiler_options(nvc0->screen->base.device->chipset,
-                                          PIPE_SHADER_TESS_CTRL);
+                                          MESA_SHADER_TESS_CTRL);
 
    struct nir_builder b =
       nir_builder_init_simple_shader(MESA_SHADER_TESS_CTRL, options,
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
index 285a0aef6b5..7b75156e235 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_state.c
@@ -687,7 +687,7 @@ static void *
 nvc0_tcp_state_create(struct pipe_context *pipe,
                      const struct pipe_shader_state *cso)
 {
-   return nvc0_sp_state_create(pipe, cso, PIPE_SHADER_TESS_CTRL);
+   return nvc0_sp_state_create(pipe, cso, MESA_SHADER_TESS_CTRL);
 }
 
 static void
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 9c19095d275..4698495eb94 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2410,7 +2410,7 @@ static void evergreen_emit_tcs_constant_buffers(struct r600_context *rctx, struc
 {
 	if (!rctx->tes_shader)
 		return;
-	evergreen_emit_constant_buffers(rctx, &rctx->constbuf_state[PIPE_SHADER_TESS_CTRL],
+	evergreen_emit_constant_buffers(rctx, &rctx->constbuf_state[MESA_SHADER_TESS_CTRL],
 					EG_FETCH_CONSTANTS_OFFSET_HS,
 					R_028F80_ALU_CONST_BUFFER_SIZE_HS_0,
 					R_028F00_ALU_CONST_CACHE_HS_0,
@@ -2493,7 +2493,7 @@ static void evergreen_emit_gs_sampler_views(struct r600_context *rctx, struct r6
 
 static void evergreen_emit_tcs_sampler_views(struct r600_context *rctx, struct r600_atom *atom)
 {
-	evergreen_emit_sampler_views(rctx, &rctx->samplers[PIPE_SHADER_TESS_CTRL].views,
+	evergreen_emit_sampler_views(rctx, &rctx->samplers[MESA_SHADER_TESS_CTRL].views,
 	                             EG_FETCH_CONSTANTS_OFFSET_HS + R600_MAX_CONST_BUFFERS, 0);
 }
 
@@ -2862,7 +2862,7 @@ static void evergreen_emit_gs_sampler_states(struct r600_context *rctx, struct r
 
 static void evergreen_emit_tcs_sampler_states(struct r600_context *rctx, struct r600_atom *atom)
 {
-	evergreen_emit_sampler_states(rctx, &rctx->samplers[PIPE_SHADER_TESS_CTRL], 54,
+	evergreen_emit_sampler_states(rctx, &rctx->samplers[MESA_SHADER_TESS_CTRL], 54,
 	                              R_00A43C_TD_HS_SAMPLER0_BORDER_COLOR_INDEX, 0);
 }
 
@@ -4356,7 +4356,7 @@ static void evergreen_set_tess_state(struct pipe_context *ctx,
 
 	memcpy(rctx->tess_state, default_outer_level, sizeof(float) * 4);
 	memcpy(rctx->tess_state+4, default_inner_level, sizeof(float) * 2);
-	rctx->driver_consts[PIPE_SHADER_TESS_CTRL].tcs_default_levels_dirty = true;
+	rctx->driver_consts[MESA_SHADER_TESS_CTRL].tcs_default_levels_dirty = true;
 }
 
 static void evergreen_set_patch_vertices(struct pipe_context *ctx, uint8_t patch_vertices)
@@ -4821,7 +4821,7 @@ void evergreen_init_state_functions(struct r600_context *rctx)
 	r600_init_atom(rctx, &rctx->constbuf_state[MESA_SHADER_VERTEX].atom, id++, evergreen_emit_vs_constant_buffers, 0);
 	r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_GEOMETRY].atom, id++, evergreen_emit_gs_constant_buffers, 0);
 	r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_FRAGMENT].atom, id++, evergreen_emit_ps_constant_buffers, 0);
-	r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_TESS_CTRL].atom, id++, evergreen_emit_tcs_constant_buffers, 0);
+	r600_init_atom(rctx, &rctx->constbuf_state[MESA_SHADER_TESS_CTRL].atom, id++, evergreen_emit_tcs_constant_buffers, 0);
 	r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_TESS_EVAL].atom, id++, evergreen_emit_tes_constant_buffers, 0);
 	r600_init_atom(rctx, &rctx->constbuf_state[PIPE_SHADER_COMPUTE].atom, id++, evergreen_emit_cs_constant_buffers, 0);
 	/* shader program */
@@ -4829,7 +4829,7 @@ void evergreen_init_state_functions(struct r600_context *rctx)
 	/* sampler */
 	r600_init_atom(rctx, &rctx->samplers[MESA_SHADER_VERTEX].states.atom, id++, evergreen_emit_vs_sampler_states, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].states.atom, id++, evergreen_emit_gs_sampler_states, 0);
-	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_TESS_CTRL].states.atom, id++, evergreen_emit_tcs_sampler_states, 0);
+	r600_init_atom(rctx, &rctx->samplers[MESA_SHADER_TESS_CTRL].states.atom, id++, evergreen_emit_tcs_sampler_states, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_TESS_EVAL].states.atom, id++, evergreen_emit_tes_sampler_states, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT].states.atom, id++, evergreen_emit_ps_sampler_states, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_COMPUTE].states.atom, id++, evergreen_emit_cs_sampler_states, 0);
@@ -4838,7 +4838,7 @@ void evergreen_init_state_functions(struct r600_context *rctx)
 	r600_init_atom(rctx, &rctx->cs_vertex_buffer_state.atom, id++, evergreen_cs_emit_vertex_buffers, 0);
 	r600_init_atom(rctx, &rctx->samplers[MESA_SHADER_VERTEX].views.atom, id++, evergreen_emit_vs_sampler_views, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_GEOMETRY].views.atom, id++, evergreen_emit_gs_sampler_views, 0);
-	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_TESS_CTRL].views.atom, id++, evergreen_emit_tcs_sampler_views, 0);
+	r600_init_atom(rctx, &rctx->samplers[MESA_SHADER_TESS_CTRL].views.atom, id++, evergreen_emit_tcs_sampler_views, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_TESS_EVAL].views.atom, id++, evergreen_emit_tes_sampler_views, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_FRAGMENT].views.atom, id++, evergreen_emit_ps_sampler_views, 0);
 	r600_init_atom(rctx, &rctx->samplers[PIPE_SHADER_COMPUTE].views.atom, id++, evergreen_emit_cs_sampler_views, 0);
@@ -4949,7 +4949,7 @@ void evergreen_setup_tess_constants(struct r600_context *rctx,
 						      R600_LDS_INFO_CONST_BUFFER, false,
 						      NULL);
 
-		rctx->b.b.set_constant_buffer(&rctx->b.b, PIPE_SHADER_TESS_CTRL,
+		rctx->b.b.set_constant_buffer(&rctx->b.b, MESA_SHADER_TESS_CTRL,
 					      R600_LDS_INFO_CONST_BUFFER, false, NULL);
 		rctx->b.b.set_constant_buffer(&rctx->b.b, PIPE_SHADER_TESS_EVAL,
 					      R600_LDS_INFO_CONST_BUFFER, false, NULL);
@@ -5011,7 +5011,7 @@ void evergreen_setup_tess_constants(struct r600_context *rctx,
 	rctx->b.b.set_constant_buffer(&rctx->b.b, MESA_SHADER_VERTEX,
 				      R600_LDS_INFO_CONST_BUFFER, false,
 				      &rctx->lds_constbuf_pipe);
-	rctx->b.b.set_constant_buffer(&rctx->b.b, PIPE_SHADER_TESS_CTRL,
+	rctx->b.b.set_constant_buffer(&rctx->b.b, MESA_SHADER_TESS_CTRL,
 				      R600_LDS_INFO_CONST_BUFFER, false,
 				      &rctx->lds_constbuf_pipe);
 	rctx->b.b.set_constant_buffer(&rctx->b.b, PIPE_SHADER_TESS_EVAL,
diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
index 19eeca9a1db..563c5de7de3 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -1833,7 +1833,7 @@ int r600_bytecode_build(struct r600_bytecode *bc)
 			bc->nstack = bc->stack.max_entries;
 		else if (bc->type == MESA_SHADER_VERTEX ||
 			 bc->type == PIPE_SHADER_TESS_EVAL ||
-			 bc->type == PIPE_SHADER_TESS_CTRL)
+			 bc->type == MESA_SHADER_TESS_CTRL)
 			bc->nstack = 1;
 	}
 
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index f1c7c798d3a..825440fcff0 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -278,7 +278,7 @@ static void r600_init_shader_caps(struct r600_screen *rscreen)
 			(struct pipe_shader_caps *)&rscreen->b.b.shader_caps[i];
 
 		switch (i) {
-		case PIPE_SHADER_TESS_CTRL:
+		case MESA_SHADER_TESS_CTRL:
 		case PIPE_SHADER_TESS_EVAL:
 		case PIPE_SHADER_COMPUTE:
 			if (rscreen->b.family < CHIP_CEDAR)
diff --git a/src/gallium/drivers/r600/r600_pipe_common.h b/src/gallium/drivers/r600/r600_pipe_common.h
index 9f1146e03be..acc8a05142e 100644
--- a/src/gallium/drivers/r600/r600_pipe_common.h
+++ b/src/gallium/drivers/r600/r600_pipe_common.h
@@ -51,7 +51,7 @@ struct u_log_context;
 #define DBG_VS			(1 << MESA_SHADER_VERTEX)
 #define DBG_PS			(1 << PIPE_SHADER_FRAGMENT)
 #define DBG_GS			(1 << PIPE_SHADER_GEOMETRY)
-#define DBG_TCS			(1 << PIPE_SHADER_TESS_CTRL)
+#define DBG_TCS			(1 << MESA_SHADER_TESS_CTRL)
 #define DBG_TES			(1 << PIPE_SHADER_TESS_EVAL)
 #define DBG_CS			(1 << PIPE_SHADER_COMPUTE)
 #define DBG_ALL_SHADERS		(DBG_FS - 1)
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 31e02de8a62..0ace65b690c 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -227,7 +227,7 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
 
 	/* Build state. */
 	switch (shader->shader.processor_type) {
-	case PIPE_SHADER_TESS_CTRL:
+	case MESA_SHADER_TESS_CTRL:
 		evergreen_update_hs_state(ctx, shader);
 		break;
 	case PIPE_SHADER_TESS_EVAL:
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index d8387703513..398c847297a 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -761,7 +761,7 @@ static int r600_get_hw_atomic_count(const struct pipe_context *ctx,
 			rctx->vs_shader->info.file_count[TGSI_FILE_HW_ATOMIC] +
 			(rctx->gs_shader ? rctx->gs_shader->info.file_count[TGSI_FILE_HW_ATOMIC] : 0);
 		break;
-	case PIPE_SHADER_TESS_CTRL:
+	case MESA_SHADER_TESS_CTRL:
 		value = rctx->ps_shader->info.file_count[TGSI_FILE_HW_ATOMIC] +
 			rctx->vs_shader->info.file_count[TGSI_FILE_HW_ATOMIC] +
 			(rctx->gs_shader ? rctx->gs_shader->info.file_count[TGSI_FILE_HW_ATOMIC] : 0) +
@@ -836,9 +836,9 @@ static inline void r600_shader_selector_key(const struct pipe_context *ctx,
 		key->tes.as_es = (rctx->gs_shader != NULL);
 		key->tes.first_atomic_counter = r600_get_hw_atomic_count(ctx, PIPE_SHADER_TESS_EVAL);
 		break;
-	case PIPE_SHADER_TESS_CTRL:
+	case MESA_SHADER_TESS_CTRL:
 		key->tcs.prim_mode = rctx->tes_shader->info.properties[TGSI_PROPERTY_TES_PRIM_MODE];
-		key->tcs.first_atomic_counter = r600_get_hw_atomic_count(ctx, PIPE_SHADER_TESS_CTRL);
+		key->tcs.first_atomic_counter = r600_get_hw_atomic_count(ctx, MESA_SHADER_TESS_CTRL);
 		break;
 	case PIPE_SHADER_COMPUTE:
 		break;
@@ -876,7 +876,7 @@ r600_shader_precompile_key(const struct pipe_context *ctx,
 		key->ps.nr_cbufs = sel->info.file_max[TGSI_FILE_OUTPUT] + 1;
 		break;
 
-	case PIPE_SHADER_TESS_CTRL:
+	case MESA_SHADER_TESS_CTRL:
 		/* Prim mode comes from the TES, but we need some valid value. */
 		key->tcs.prim_mode = MESA_PRIM_TRIANGLES;
 		break;
@@ -998,7 +998,7 @@ static void *r600_create_shader_state(struct pipe_context *ctx,
 			sel->info.properties[TGSI_PROPERTY_GS_INVOCATIONS];
 		break;
 	case MESA_SHADER_VERTEX:
-	case PIPE_SHADER_TESS_CTRL:
+	case MESA_SHADER_TESS_CTRL:
 		sel->lds_patch_outputs_written_mask = 0;
 		sel->lds_outputs_written_mask = 0;
 
@@ -1053,7 +1053,7 @@ static void *r600_create_gs_state(struct pipe_context *ctx,
 static void *r600_create_tcs_state(struct pipe_context *ctx,
 					 const struct pipe_shader_state *state)
 {
-	return r600_create_shader_state(ctx, state, PIPE_SHADER_TESS_CTRL);
+	return r600_create_shader_state(ctx, state, MESA_SHADER_TESS_CTRL);
 }
 
 static void *r600_create_tes_state(struct pipe_context *ctx,
@@ -1382,7 +1382,7 @@ void r600_update_driver_const_buffers(struct r600_context *rctx, bool compute_on
 			/*
 			 * We'd only really need this for default tcs shader.
 			 */
-			assert(sh == PIPE_SHADER_TESS_CTRL);
+			assert(sh == MESA_SHADER_TESS_CTRL);
 			if (!size) {
 				ptr = rctx->tess_state;
 				size = R600_TCS_DEFAULT_LEVELS_SIZE;
@@ -1401,7 +1401,7 @@ void r600_update_driver_const_buffers(struct r600_context *rctx, bool compute_on
 				memcpy(ptr, rctx->sample_positions, R600_UCP_SIZE);
 			if (sh == PIPE_SHADER_COMPUTE)
 				memcpy(ptr, rctx->cs_block_grid_sizes, R600_CS_BLOCK_GRID_SIZE);
-			if (sh == PIPE_SHADER_TESS_CTRL)
+			if (sh == MESA_SHADER_TESS_CTRL)
 				memcpy(ptr, rctx->tess_state, R600_TCS_DEFAULT_LEVELS_SIZE);
 		}
 		info->texture_const_dirty = false;
@@ -1639,7 +1639,7 @@ static void r600_generate_fixed_func_tcs(struct r600_context *rctx)
 {
 	struct ureg_src const0, const1;
 	struct ureg_dst tessouter, tessinner;
-	struct ureg_program *ureg = ureg_create(PIPE_SHADER_TESS_CTRL);
+	struct ureg_program *ureg = ureg_create(MESA_SHADER_TESS_CTRL);
 
 	if (!ureg)
 		return; /* if we get here, we're screwed */
@@ -2036,7 +2036,7 @@ static bool r600_update_derived_state(struct r600_context *rctx)
 			need_buf_const = rctx->tcs_shader->current->shader.uses_tex_buffers ||
 					 rctx->tcs_shader->current->shader.has_txq_cube_array_z_comp;
 			if (need_buf_const) {
-				eg_setup_buffer_constants(rctx, PIPE_SHADER_TESS_CTRL);
+				eg_setup_buffer_constants(rctx, MESA_SHADER_TESS_CTRL);
 			}
 		}
 	}
diff --git a/src/gallium/drivers/r600/sfn/sfn_shader_tess.cpp b/src/gallium/drivers/r600/sfn/sfn_shader_tess.cpp
index 053f1c599de..bfe6f0e4d20 100644
--- a/src/gallium/drivers/r600/sfn/sfn_shader_tess.cpp
+++ b/src/gallium/drivers/r600/sfn/sfn_shader_tess.cpp
@@ -102,7 +102,7 @@ TCSShader::store_tess_factor(nir_intrinsic_instr *instr)
 void
 TCSShader::do_get_shader_info(r600_shader *sh_info)
 {
-   sh_info->processor_type = PIPE_SHADER_TESS_CTRL;
+   sh_info->processor_type = MESA_SHADER_TESS_CTRL;
    sh_info->tcs_prim_mode = m_tcs_prim_mode;
 }
 
diff --git a/src/gallium/drivers/radeonsi/si_build_pm4.h b/src/gallium/drivers/radeonsi/si_build_pm4.h
index fc51ad32cd4..327926ee6ac 100644
--- a/src/gallium/drivers/radeonsi/si_build_pm4.h
+++ b/src/gallium/drivers/radeonsi/si_build_pm4.h
@@ -571,7 +571,7 @@ si_get_user_data_base(enum amd_gfx_level gfx_level, enum si_has_tess has_tess,
          return R_00B130_SPI_SHADER_USER_DATA_VS_0;
       }
 
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       if (gfx_level == GFX9) {
          return R_00B430_SPI_SHADER_USER_DATA_LS_0;
       } else {
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 09c59be6298..2659e78a0bf 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -2242,7 +2242,7 @@ static void si_emit_graphics_shader_pointers(struct si_context *sctx, unsigned i
       gfx12_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(FRAGMENT),
                                              sh_base[PIPE_SHADER_FRAGMENT], gfx);
       gfx12_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(TESS_CTRL),
-                                             sh_base[PIPE_SHADER_TESS_CTRL], gfx);
+                                             sh_base[MESA_SHADER_TESS_CTRL], gfx);
       gfx12_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(GEOMETRY),
                                              sh_base[PIPE_SHADER_GEOMETRY], gfx);
 
@@ -2272,7 +2272,7 @@ static void si_emit_graphics_shader_pointers(struct si_context *sctx, unsigned i
       gfx11_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(FRAGMENT),
                                              sh_base[PIPE_SHADER_FRAGMENT], gfx);
       gfx11_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(TESS_CTRL),
-                                             sh_base[PIPE_SHADER_TESS_CTRL], gfx);
+                                             sh_base[MESA_SHADER_TESS_CTRL], gfx);
       gfx11_push_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(GEOMETRY),
                                              sh_base[PIPE_SHADER_GEOMETRY], gfx);
 
@@ -2303,7 +2303,7 @@ static void si_emit_graphics_shader_pointers(struct si_context *sctx, unsigned i
       si_emit_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(FRAGMENT),
                                           sh_base[PIPE_SHADER_FRAGMENT], gfx);
       si_emit_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(TESS_CTRL),
-                                          sh_base[PIPE_SHADER_TESS_CTRL], gfx);
+                                          sh_base[MESA_SHADER_TESS_CTRL], gfx);
       si_emit_consecutive_shader_pointers(sctx, SI_DESCS_SHADER_MASK(GEOMETRY),
                                           sh_base[PIPE_SHADER_GEOMETRY], gfx);
 
@@ -2869,14 +2869,14 @@ void si_init_all_descriptors(struct si_context *sctx)
 
    for (i = first_shader; i < SI_NUM_SHADERS; i++) {
       bool is_2nd =
-         sctx->gfx_level >= GFX9 && (i == PIPE_SHADER_TESS_CTRL || i == PIPE_SHADER_GEOMETRY);
+         sctx->gfx_level >= GFX9 && (i == MESA_SHADER_TESS_CTRL || i == PIPE_SHADER_GEOMETRY);
       unsigned num_sampler_slots = SI_NUM_IMAGE_SLOTS / 2 + SI_NUM_SAMPLERS;
       unsigned num_buffer_slots = SI_NUM_SHADER_BUFFERS + SI_NUM_CONST_BUFFERS;
       int rel_dw_offset;
       struct si_descriptors *desc;
 
       if (is_2nd) {
-         if (i == PIPE_SHADER_TESS_CTRL) {
+         if (i == MESA_SHADER_TESS_CTRL) {
             rel_dw_offset =
                (hs_sgpr0 - R_00B430_SPI_SHADER_USER_DATA_HS_0) / 4;
          } else if (sctx->gfx_level >= GFX10) { /* PIPE_SHADER_GEOMETRY */
@@ -2896,7 +2896,7 @@ void si_init_all_descriptors(struct si_context *sctx)
       desc->slot_index_to_bind_directly = si_get_constbuf_slot(0);
 
       if (is_2nd) {
-         if (i == PIPE_SHADER_TESS_CTRL) {
+         if (i == MESA_SHADER_TESS_CTRL) {
             rel_dw_offset =
                (hs_sgpr0 + 4 - R_00B430_SPI_SHADER_USER_DATA_HS_0) / 4;
          } else if (sctx->gfx_level >= GFX10) { /* PIPE_SHADER_GEOMETRY */
@@ -2961,9 +2961,9 @@ void si_init_all_descriptors(struct si_context *sctx)
    si_set_user_data_base(sctx, MESA_SHADER_VERTEX,
                          si_get_user_data_base(sctx->gfx_level, TESS_OFF, GS_OFF,
                                                sctx->ngg, MESA_SHADER_VERTEX));
-   si_set_user_data_base(sctx, PIPE_SHADER_TESS_CTRL,
+   si_set_user_data_base(sctx, MESA_SHADER_TESS_CTRL,
                          si_get_user_data_base(sctx->gfx_level, TESS_OFF, GS_OFF,
-                                               NGG_OFF, PIPE_SHADER_TESS_CTRL));
+                                               NGG_OFF, MESA_SHADER_TESS_CTRL));
    si_set_user_data_base(sctx, PIPE_SHADER_GEOMETRY,
                          si_get_user_data_base(sctx->gfx_level, TESS_OFF, GS_OFF,
                                                NGG_OFF, PIPE_SHADER_GEOMETRY));
diff --git a/src/gallium/drivers/radeonsi/si_sqtt.c b/src/gallium/drivers/radeonsi/si_sqtt.c
index ff2d5c7f163..b0af36aaa2a 100644
--- a/src/gallium/drivers/radeonsi/si_sqtt.c
+++ b/src/gallium/drivers/radeonsi/si_sqtt.c
@@ -709,7 +709,7 @@ si_sqtt_pipe_to_rgp_shader_stage(union si_shader_key *key, enum pipe_shader_type
             return RGP_HW_STAGE_GS;
          else
             return RGP_HW_STAGE_VS;
-      case PIPE_SHADER_TESS_CTRL:
+      case MESA_SHADER_TESS_CTRL:
          return RGP_HW_STAGE_HS;
       case PIPE_SHADER_TESS_EVAL:
          if (key->ge.as_es)
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.cpp b/src/gallium/drivers/radeonsi/si_state_draw.cpp
index 92a7846c1b8..1a463822391 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.cpp
+++ b/src/gallium/drivers/radeonsi/si_state_draw.cpp
@@ -45,7 +45,7 @@ static bool si_update_shaders(struct si_context *sctx)
    bool is_vs_state_changed =
       (sctx->dirty_shaders_mask & BITFIELD_BIT(MESA_SHADER_VERTEX)) != 0;
    bool is_tess_state_changed =
-      ((sctx->dirty_shaders_mask & (BITFIELD_BIT(PIPE_SHADER_TESS_CTRL) | BITFIELD_BIT(PIPE_SHADER_TESS_EVAL))) != 0);
+      ((sctx->dirty_shaders_mask & (BITFIELD_BIT(MESA_SHADER_TESS_CTRL) | BITFIELD_BIT(PIPE_SHADER_TESS_EVAL))) != 0);
    bool is_gs_state_changed =
       (sctx->dirty_shaders_mask & BITFIELD_BIT(PIPE_SHADER_GEOMETRY)) != 0;
    bool is_ps_state_changed =
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.cpp b/src/gallium/drivers/radeonsi/si_state_shaders.cpp
index cfa25bea5d7..1990f58ebf3 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.cpp
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.cpp
@@ -3851,7 +3851,7 @@ static void si_bind_tcs_shader(struct pipe_context *ctx, void *state)
    si_update_tess_uses_prim_id(sctx);
    si_update_tess_in_out_patch_vertices(sctx);
 
-   si_update_common_shader_state(sctx, sel, PIPE_SHADER_TESS_CTRL);
+   si_update_common_shader_state(sctx, sel, MESA_SHADER_TESS_CTRL);
 
    if (enable_changed)
       sctx->last_tcs = NULL; /* invalidate derived tess state */
@@ -4573,7 +4573,7 @@ static void si_update_tess_in_out_patch_vertices(struct si_context *sctx)
 
       if (sctx->shader.tcs.key.ge.opt.same_patch_vertices != same_patch_vertices) {
          sctx->shader.tcs.key.ge.opt.same_patch_vertices = same_patch_vertices;
-         sctx->dirty_shaders_mask |= BITFIELD_BIT(PIPE_SHADER_TESS_CTRL);
+         sctx->dirty_shaders_mask |= BITFIELD_BIT(MESA_SHADER_TESS_CTRL);
       }
    } else {
       /* These fields are static for fixed function TCS. So no need to set
@@ -4585,7 +4585,7 @@ static void si_update_tess_in_out_patch_vertices(struct si_context *sctx)
       /* User may only change patch vertices, needs to update fixed func TCS. */
       if (sctx->shader.tcs.cso &&
           sctx->shader.tcs.cso->info.base.tess.tcs_vertices_out != sctx->patch_vertices)
-         sctx->dirty_shaders_mask |= BITFIELD_BIT(PIPE_SHADER_TESS_CTRL);
+         sctx->dirty_shaders_mask |= BITFIELD_BIT(MESA_SHADER_TESS_CTRL);
    }
 }
 
@@ -4603,7 +4603,7 @@ static void si_set_patch_vertices(struct pipe_context *ctx, uint8_t patch_vertic
          if (sctx->has_tessellation)
             si_update_tess_io_layout_state(sctx);
          else
-            sctx->dirty_shaders_mask |= BITFIELD_BIT(PIPE_SHADER_TESS_CTRL);
+            sctx->dirty_shaders_mask |= BITFIELD_BIT(MESA_SHADER_TESS_CTRL);
       }
 
       /* Gfx12 programs patch_vertices in VGT_PRIMITIVE_TYPE.NUM_INPUT_CP. Make sure
diff --git a/src/gallium/drivers/svga/svga_pipe_constants.c b/src/gallium/drivers/svga/svga_pipe_constants.c
index 214126ebcca..13170c694d0 100644
--- a/src/gallium/drivers/svga/svga_pipe_constants.c
+++ b/src/gallium/drivers/svga/svga_pipe_constants.c
@@ -72,7 +72,7 @@ svga_set_constant_buffer(struct pipe_context *pipe,
          svga->dirty |= SVGA_NEW_VS_CONSTS;
       else if (shader == PIPE_SHADER_GEOMETRY)
          svga->dirty |= SVGA_NEW_GS_CONSTS;
-      else if (shader == PIPE_SHADER_TESS_CTRL)
+      else if (shader == MESA_SHADER_TESS_CTRL)
          svga->dirty |= SVGA_NEW_TCS_CONSTS;
       else if (shader == PIPE_SHADER_TESS_EVAL)
          svga->dirty |= SVGA_NEW_TES_CONSTS;
@@ -85,7 +85,7 @@ svga_set_constant_buffer(struct pipe_context *pipe,
          svga->dirty |= SVGA_NEW_VS_CONST_BUFFER;
       else if (shader == PIPE_SHADER_GEOMETRY)
          svga->dirty |= SVGA_NEW_GS_CONST_BUFFER;
-      else if (shader == PIPE_SHADER_TESS_CTRL)
+      else if (shader == MESA_SHADER_TESS_CTRL)
          svga->dirty |= SVGA_NEW_TCS_CONST_BUFFER;
       else if (shader == PIPE_SHADER_TESS_EVAL)
          svga->dirty |= SVGA_NEW_TES_CONST_BUFFER;
diff --git a/src/gallium/drivers/svga/svga_pipe_ts.c b/src/gallium/drivers/svga/svga_pipe_ts.c
index b95901ee0c6..e7e2abc330f 100644
--- a/src/gallium/drivers/svga/svga_pipe_ts.c
+++ b/src/gallium/drivers/svga/svga_pipe_ts.c
@@ -48,7 +48,7 @@ svga_create_tcs_state(struct pipe_context *pipe,
    SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_CREATETCS);
 
    tcs = (struct svga_tcs_shader *)
-            svga_create_shader(pipe, templ, PIPE_SHADER_TESS_CTRL,
+            svga_create_shader(pipe, templ, MESA_SHADER_TESS_CTRL,
                                sizeof(struct svga_tcs_shader));
    if (!tcs)
       goto done;
@@ -74,7 +74,7 @@ svga_bind_tcs_state(struct pipe_context *pipe, void *shader)
    svga->dirty |= SVGA_NEW_TCS;
 
    /* Check if the shader uses samplers */
-   svga_set_curr_shader_use_samplers_flag(svga, PIPE_SHADER_TESS_CTRL,
+   svga_set_curr_shader_use_samplers_flag(svga, MESA_SHADER_TESS_CTRL,
                                           svga_shader_use_samplers(&tcs->base));
 }
 
diff --git a/src/gallium/drivers/svga/svga_screen.c b/src/gallium/drivers/svga/svga_screen.c
index 18abfe9bc2b..622c60295e5 100644
--- a/src/gallium/drivers/svga/svga_screen.c
+++ b/src/gallium/drivers/svga/svga_screen.c
@@ -261,7 +261,7 @@ vgpu10_init_shader_caps(struct svga_screen *svgascreen)
           (struct pipe_shader_caps *)&svgascreen->screen.shader_caps[i];
 
        switch (i) {
-       case PIPE_SHADER_TESS_CTRL:
+       case MESA_SHADER_TESS_CTRL:
        case PIPE_SHADER_TESS_EVAL:
           if (!sws->have_sm5)
              continue;
@@ -292,7 +292,7 @@ vgpu10_init_shader_caps(struct svga_screen *svgascreen)
           caps->max_inputs = svgascreen->max_gs_inputs;
           caps->max_outputs = VGPU10_MAX_GS_OUTPUTS;
           break;
-       case PIPE_SHADER_TESS_CTRL:
+       case MESA_SHADER_TESS_CTRL:
           caps->max_inputs = VGPU11_MAX_HS_INPUT_CONTROL_POINTS;
           caps->max_outputs = VGPU11_MAX_HS_OUTPUTS;
           break;
diff --git a/src/gallium/drivers/svga/svga_shader.c b/src/gallium/drivers/svga/svga_shader.c
index 483ea7ba1f5..36002b1b0bb 100644
--- a/src/gallium/drivers/svga/svga_shader.c
+++ b/src/gallium/drivers/svga/svga_shader.c
@@ -788,7 +788,7 @@ svga_new_shader_variant(struct svga_context *svga, enum pipe_shader_type type)
    case PIPE_SHADER_TESS_EVAL:
       variant = CALLOC(1, sizeof(struct svga_tes_variant));
       break;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       variant = CALLOC(1, sizeof(struct svga_tcs_variant));
       break;
    case PIPE_SHADER_COMPUTE:
diff --git a/src/gallium/drivers/svga/svga_shader.h b/src/gallium/drivers/svga/svga_shader.h
index 32f373313de..88cf63ec54a 100644
--- a/src/gallium/drivers/svga/svga_shader.h
+++ b/src/gallium/drivers/svga/svga_shader.h
@@ -538,7 +538,7 @@ svga_shader_type(enum pipe_shader_type shader)
       return SVGA3D_SHADERTYPE_GS;
    case PIPE_SHADER_FRAGMENT:
       return SVGA3D_SHADERTYPE_PS;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       return SVGA3D_SHADERTYPE_HS;
    case PIPE_SHADER_TESS_EVAL:
       return SVGA3D_SHADERTYPE_DS;
diff --git a/src/gallium/drivers/svga/svga_state_constants.c b/src/gallium/drivers/svga/svga_state_constants.c
index 00813feaa48..8fd4a1c9ddd 100644
--- a/src/gallium/drivers/svga/svga_state_constants.c
+++ b/src/gallium/drivers/svga/svga_state_constants.c
@@ -337,7 +337,7 @@ svga_get_extra_tcs_constants(struct svga_context *svga, float *dest)
 
    /* common constants */
    count += svga_get_extra_constants_common(svga, variant,
-                                            PIPE_SHADER_TESS_CTRL,
+                                            MESA_SHADER_TESS_CTRL,
                                             dest);
 
    assert(count <= MAX_EXTRA_CONSTS);
@@ -886,7 +886,7 @@ emit_consts_vgpu10(struct svga_context *svga, enum pipe_shader_type shader)
    assert(shader == MESA_SHADER_VERTEX ||
           shader == PIPE_SHADER_GEOMETRY ||
           shader == PIPE_SHADER_FRAGMENT ||
-          shader == PIPE_SHADER_TESS_CTRL ||
+          shader == MESA_SHADER_TESS_CTRL ||
           shader == PIPE_SHADER_TESS_EVAL ||
           shader == PIPE_SHADER_COMPUTE);
 
@@ -905,7 +905,7 @@ emit_consts_vgpu10(struct svga_context *svga, enum pipe_shader_type shader)
       variant = svga->state.hw_draw.gs;
       extra_count = svga_get_extra_gs_constants(svga, (float *) extras);
       break;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       variant = svga->state.hw_draw.tcs;
       extra_count = svga_get_extra_tcs_constants(svga, (float *) extras);
       break;
@@ -1249,7 +1249,7 @@ emit_tcs_consts(struct svga_context *svga, uint64_t dirty)
 
    /* SVGA_NEW_TCS_CONST_BUFFER */
 
-   ret = emit_consts_vgpu10(svga, PIPE_SHADER_TESS_CTRL);
+   ret = emit_consts_vgpu10(svga, MESA_SHADER_TESS_CTRL);
 
    return ret;
 }
@@ -1269,7 +1269,7 @@ emit_tcs_constbuf(struct svga_context *svga, uint64_t dirty)
    /* SVGA_NEW_TCS_CONSTBUF
     */
    assert(svga_have_vgpu10(svga));
-   ret = emit_constbuf_vgpu10(svga, PIPE_SHADER_TESS_CTRL);
+   ret = emit_constbuf_vgpu10(svga, MESA_SHADER_TESS_CTRL);
 
    return ret;
 }
@@ -1453,7 +1453,7 @@ update_rawbuf(struct svga_context *svga, uint64 dirty)
       SVGA_NEW_VS_RAW_BUFFER,       /* MESA_SHADER_VERTEX */
       SVGA_NEW_FS_RAW_BUFFER,       /* PIPE_SHADER_FRAGMENT */
       SVGA_NEW_GS_RAW_BUFFER,       /* PIPE_SHADER_GEOMETRY */
-      SVGA_NEW_TCS_RAW_BUFFER,      /* PIPE_SHADER_TESS_CTRL */
+      SVGA_NEW_TCS_RAW_BUFFER,      /* MESA_SHADER_TESS_CTRL */
       SVGA_NEW_TES_RAW_BUFFER,      /* PIPE_SHADER_TESS_EVAL */
    };
 
diff --git a/src/gallium/drivers/svga/svga_state_tgsi_transform.c b/src/gallium/drivers/svga/svga_state_tgsi_transform.c
index 325b824d1ca..aa84d432e56 100644
--- a/src/gallium/drivers/svga/svga_state_tgsi_transform.c
+++ b/src/gallium/drivers/svga/svga_state_tgsi_transform.c
@@ -64,7 +64,7 @@ bind_shader(struct svga_context *svga,
    case PIPE_SHADER_GEOMETRY:
       svga->pipe.bind_gs_state(&svga->pipe, shader);
       break;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       svga->pipe.bind_tcs_state(&svga->pipe, shader);
       break;
    case PIPE_SHADER_TESS_EVAL:
@@ -97,7 +97,7 @@ create_shader(struct svga_context *svga,
       return svga_create_fs_state(&svga->pipe, state);
    case PIPE_SHADER_GEOMETRY:
       return svga->pipe.create_gs_state(&svga->pipe, state);
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       return svga->pipe.create_tcs_state(&svga->pipe, state);
    case PIPE_SHADER_TESS_EVAL:
       return svga->pipe.create_tes_state(&svga->pipe, state);
diff --git a/src/gallium/drivers/svga/svga_state_ts.c b/src/gallium/drivers/svga/svga_state_ts.c
index d0aa7ed2644..cd3afdcbbf9 100644
--- a/src/gallium/drivers/svga/svga_state_ts.c
+++ b/src/gallium/drivers/svga/svga_state_ts.c
@@ -25,7 +25,7 @@ make_tcs_key(struct svga_context *svga, struct svga_compile_key *key)
    /*
     * SVGA_NEW_TEXTURE_BINDING | SVGA_NEW_SAMPLER
     */
-   svga_init_shader_key_common(svga, PIPE_SHADER_TESS_CTRL, &tcs->base, key);
+   svga_init_shader_key_common(svga, MESA_SHADER_TESS_CTRL, &tcs->base, key);
 
    /* SVGA_NEW_TCS_PARAM */
    key->tcs.vertices_per_patch = svga->curr.vertices_per_patch;
@@ -211,7 +211,7 @@ get_passthrough_tcs(struct svga_context *svga)
    cb.user_buffer = (void *) svga->curr.default_tesslevels;
    cb.buffer_offset = 0;
    cb.buffer_size = 2 * 4 * sizeof(float);
-   svga->pipe.set_constant_buffer(&svga->pipe, PIPE_SHADER_TESS_CTRL, 0, false, &cb);
+   svga->pipe.set_constant_buffer(&svga->pipe, MESA_SHADER_TESS_CTRL, 0, false, &cb);
 }
 
 
diff --git a/src/gallium/drivers/svga/svga_tgsi.c b/src/gallium/drivers/svga/svga_tgsi.c
index 028ffd836b7..3252ea06154 100644
--- a/src/gallium/drivers/svga/svga_tgsi.c
+++ b/src/gallium/drivers/svga/svga_tgsi.c
@@ -463,7 +463,7 @@ svga_tgsi_scan_shader(struct svga_shader *shader)
       info->gs.out_prim = tgsi_info->properties[TGSI_PROPERTY_GS_OUTPUT_PRIM];
       info->gs.in_prim = tgsi_info->properties[TGSI_PROPERTY_GS_INPUT_PRIM];
       break;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       info->tcs.vertices_out =
          tgsi_info->properties[TGSI_PROPERTY_TCS_VERTICES_OUT];
 
diff --git a/src/gallium/drivers/svga/svga_tgsi_vgpu10.c b/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
index 6a24ea8c647..19b10ed9351 100644
--- a/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
+++ b/src/gallium/drivers/svga/svga_tgsi_vgpu10.c
@@ -665,7 +665,7 @@ check_register_index(struct svga_shader_emitter_v10 *emit,
            index >= emit->max_gs_inputs) ||
           (emit->unit == PIPE_SHADER_FRAGMENT &&
            index >= VGPU10_MAX_PS_INPUTS) ||
-          (emit->unit == PIPE_SHADER_TESS_CTRL &&
+          (emit->unit == MESA_SHADER_TESS_CTRL &&
            index >= VGPU11_MAX_HS_INPUT_CONTROL_POINTS) ||
           (emit->unit == PIPE_SHADER_TESS_EVAL &&
            index >= VGPU11_MAX_DS_INPUT_CONTROL_POINTS)) {
@@ -688,7 +688,7 @@ check_register_index(struct svga_shader_emitter_v10 *emit,
            index >= VGPU10_MAX_GS_OUTPUTS) ||
           (emit->unit == PIPE_SHADER_FRAGMENT &&
            index >= VGPU10_MAX_PS_OUTPUTS) ||
-          (emit->unit == PIPE_SHADER_TESS_CTRL &&
+          (emit->unit == MESA_SHADER_TESS_CTRL &&
            index >= VGPU11_MAX_HS_OUTPUTS + 2) ||
           (emit->unit == PIPE_SHADER_TESS_EVAL &&
            index >= VGPU11_MAX_DS_OUTPUTS)) {
@@ -746,7 +746,7 @@ determine_clipping_mode(struct svga_shader_emitter_v10 *emit)
     * to set the num_written_clipdistance. This is just to determine the
     * clipping mode.
     */
-   if (emit->unit == PIPE_SHADER_TESS_CTRL) {
+   if (emit->unit == MESA_SHADER_TESS_CTRL) {
       unsigned i;
       for (i = 0; i < emit->info.num_outputs; i++) {
          if (emit->info.output_semantic_name[i] == TGSI_SEMANTIC_CLIPDIST) {
@@ -821,7 +821,7 @@ translate_shader_type(unsigned type)
       return VGPU10_GEOMETRY_SHADER;
    case PIPE_SHADER_FRAGMENT:
       return VGPU10_PIXEL_SHADER;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       return VGPU10_HULL_SHADER;
    case PIPE_SHADER_TESS_EVAL:
       return VGPU10_DOMAIN_SHADER;
@@ -1361,7 +1361,7 @@ emit_dst_register(struct svga_shader_emitter_v10 *emit,
             emit->num_output_writes++;
          }
       }
-      else if (emit->unit == PIPE_SHADER_TESS_CTRL) {
+      else if (emit->unit == MESA_SHADER_TESS_CTRL) {
          if (index == emit->tcs.inner.tgsi_index) {
             /* replace OUTPUT[TESSLEVEL] with temp. We are storing it
              * in temporary for now so that will be store into appropriate
@@ -1660,7 +1660,7 @@ emit_src_register(struct svga_shader_emitter_v10 *emit,
          }
       }
    }
-   else if (emit->unit == PIPE_SHADER_TESS_CTRL) {
+   else if (emit->unit == MESA_SHADER_TESS_CTRL) {
 
       if (file == TGSI_FILE_SYSTEM_VALUE) {
          if (index == emit->tcs.vertices_per_patch_index) {
@@ -3455,7 +3455,7 @@ needs_control_point_phase(struct svga_shader_emitter_v10 *emit)
 {
    unsigned i;
 
-   assert(emit->unit == PIPE_SHADER_TESS_CTRL);
+   assert(emit->unit == MESA_SHADER_TESS_CTRL);
 
    /* If output control point count does not match the input count,
     * we need a control point phase to explicitly set the output control
@@ -3678,7 +3678,7 @@ emit_hull_shader_patch_constant_phase(struct svga_shader_emitter_v10 *emit,
        */
       assert(!(emit->reemit_instruction && emit->reemit_rawbuf_instruction));
       if (emit->reemit_instruction) {
-         assert(emit->unit == PIPE_SHADER_TESS_CTRL);
+         assert(emit->unit == MESA_SHADER_TESS_CTRL);
          ret = emit_vgpu10_instruction(emit, inst_number,
                                        &parse->FullToken.FullInstruction);
       } else if (emit->reemit_rawbuf_instruction) {
@@ -4232,7 +4232,7 @@ emit_vertex_output_declaration(struct svga_shader_emitter_v10 *emit,
 
    switch (semantic_name) {
    case TGSI_SEMANTIC_POSITION:
-      if (emit->unit == PIPE_SHADER_TESS_CTRL) {
+      if (emit->unit == MESA_SHADER_TESS_CTRL) {
          /* position will be declared in control point only */
          assert(emit->tcs.control_point_phase);
          type = VGPU10_OPCODE_DCL_OUTPUT;
@@ -4764,7 +4764,7 @@ emit_system_value_declaration(struct svga_shader_emitter_v10 *emit,
        * the index value.
        */
       assert(emit->unit == PIPE_SHADER_GEOMETRY ||
-             emit->unit == PIPE_SHADER_TESS_CTRL);
+             emit->unit == MESA_SHADER_TESS_CTRL);
       assert(emit->version >= 50);
 
       if (emit->unit == PIPE_SHADER_GEOMETRY) {
@@ -4779,7 +4779,7 @@ emit_system_value_declaration(struct svga_shader_emitter_v10 *emit,
                                 0,
                                 VGPU10_INTERPOLATION_UNDEFINED, true,
                                 SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED);
-      } else if (emit->unit == PIPE_SHADER_TESS_CTRL) {
+      } else if (emit->unit == MESA_SHADER_TESS_CTRL) {
          /* The emission of the control point id will be done
           * in the control point phase in emit_hull_shader_control_point_phase().
           */
@@ -4839,7 +4839,7 @@ emit_system_value_declaration(struct svga_shader_emitter_v10 *emit,
       emit->tes.outer.tgsi_index = index;
       break;
    case TGSI_SEMANTIC_VERTICESIN:
-      assert(emit->unit == PIPE_SHADER_TESS_CTRL);
+      assert(emit->unit == MESA_SHADER_TESS_CTRL);
       assert(emit->version >= 50);
 
       /* save the system value index */
@@ -4847,7 +4847,7 @@ emit_system_value_declaration(struct svga_shader_emitter_v10 *emit,
       break;
    case TGSI_SEMANTIC_PRIMID:
       assert(emit->version >= 50);
-      if (emit->unit == PIPE_SHADER_TESS_CTRL) {
+      if (emit->unit == MESA_SHADER_TESS_CTRL) {
          emit->tcs.prim_id_index = index;
       }
       else if (emit->unit == PIPE_SHADER_TESS_EVAL) {
@@ -5503,7 +5503,7 @@ emit_input_declarations(struct svga_shader_emitter_v10 *emit)
    case MESA_SHADER_VERTEX:
       emit_vs_input_declarations(emit);
       break;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       emit_tcs_input_declarations(emit);
       break;
    case PIPE_SHADER_TESS_EVAL:
@@ -5543,7 +5543,7 @@ emit_output_declarations(struct svga_shader_emitter_v10 *emit)
    case MESA_SHADER_VERTEX:
       emit_vs_output_declarations(emit);
       break;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       emit_tcs_output_declarations(emit);
       break;
    case PIPE_SHADER_TESS_EVAL:
@@ -5761,7 +5761,7 @@ emit_temporaries_declaration(struct svga_shader_emitter_v10 *emit)
          total_temps += 1;
       }
    }
-   else if (emit->unit == PIPE_SHADER_TESS_CTRL) {
+   else if (emit->unit == MESA_SHADER_TESS_CTRL) {
       if (emit->tcs.inner.tgsi_index != INVALID_INDEX) {
          if (!emit->tcs.control_point_phase) {
             emit->tcs.inner.temp_index = total_temps;
@@ -10833,7 +10833,7 @@ emit_barrier(struct svga_shader_emitter_v10 *emit,
    token0.value = 0;
    token0.opcodeType = VGPU10_OPCODE_SYNC;
 
-   if (emit->unit == PIPE_SHADER_TESS_CTRL && emit->version == 50) {
+   if (emit->unit == MESA_SHADER_TESS_CTRL && emit->version == 50) {
       /* SM5 device doesn't support BARRIER in tcs . If barrier is used
        * in shader, don't do anything for this opcode and continue rest
        * of shader translation
@@ -11040,7 +11040,7 @@ emit_instruction(struct svga_shader_emitter_v10 *emit,
       /* simple instructions */
       return emit_simple(emit, inst);
    case TGSI_OPCODE_RET:
-      if (emit->unit == PIPE_SHADER_TESS_CTRL &&
+      if (emit->unit == MESA_SHADER_TESS_CTRL &&
           !emit->tcs.control_point_phase) {
 
          /* store the tessellation levels in the patch constant phase only */
@@ -11971,7 +11971,7 @@ emit_vertex_id_nobase_instruction(struct svga_shader_emitter_v10 *emit)
 static void
 emit_tcs_default_control_point_output(struct svga_shader_emitter_v10 *emit)
 {
-   assert(emit->unit == PIPE_SHADER_TESS_CTRL);
+   assert(emit->unit == MESA_SHADER_TESS_CTRL);
    assert(emit->tcs.control_point_phase);
    assert(emit->tcs.control_point_out_index != INVALID_INDEX);
    assert(emit->tcs.invocation_id_sys_index != INVALID_INDEX);
@@ -12136,7 +12136,7 @@ emit_pre_helpers(struct svga_shader_emitter_v10 *emit)
    /* Properties */
    if (emit->unit == PIPE_SHADER_GEOMETRY)
       emit_property_instructions(emit);
-   else if (emit->unit == PIPE_SHADER_TESS_CTRL) {
+   else if (emit->unit == MESA_SHADER_TESS_CTRL) {
       emit_hull_shader_declarations(emit);
 
       /* Save the position of the first instruction token so that we can
@@ -12171,10 +12171,10 @@ emit_pre_helpers(struct svga_shader_emitter_v10 *emit)
    /* Declare temporary registers */
    emit_temporaries_declaration(emit);
 
-   /* For PIPE_SHADER_TESS_CTRL, constants, samplers, resources and immediates
+   /* For MESA_SHADER_TESS_CTRL, constants, samplers, resources and immediates
     * will already be declared in hs_decls (emit_hull_shader_declarations)
     */
-   if (emit->unit != PIPE_SHADER_TESS_CTRL) {
+   if (emit->unit != MESA_SHADER_TESS_CTRL) {
 
       alloc_common_immediates(emit);
 
@@ -12223,9 +12223,9 @@ emit_pre_helpers(struct svga_shader_emitter_v10 *emit)
          alloc_immediate_float4(emit, alpha, alpha, alpha, alpha);
    }
 
-   if (emit->unit != PIPE_SHADER_TESS_CTRL) {
+   if (emit->unit != MESA_SHADER_TESS_CTRL) {
       /**
-       * For PIPE_SHADER_TESS_CTRL, immediates are already declared in
+       * For MESA_SHADER_TESS_CTRL, immediates are already declared in
        * hs_decls
        */
       emit_vgpu10_immediates_block(emit);
@@ -12428,7 +12428,7 @@ emit_post_helpers(struct svga_shader_emitter_v10 *emit)
          emit_broadcast_color_instructions(emit, fs_color_tmp_index);
       }
    }
-   else if (emit->unit == PIPE_SHADER_TESS_CTRL) {
+   else if (emit->unit == MESA_SHADER_TESS_CTRL) {
       if (!emit->tcs.control_point_phase) {
          /* store the tessellation levels in the patch constant phase only */
          store_tesslevels(emit);
@@ -12589,7 +12589,7 @@ emit_vgpu10_instructions(struct svga_shader_emitter_v10 *emit,
           * control phase to store results into temporaries.
           */
          if (emit->reemit_instruction) {
-            assert(emit->unit == PIPE_SHADER_TESS_CTRL);
+            assert(emit->unit == MESA_SHADER_TESS_CTRL);
             ret = emit_vgpu10_instruction(emit, inst_number,
                                           &parse.FullToken.FullInstruction);
          }
@@ -12619,7 +12619,7 @@ emit_vgpu10_instructions(struct svga_shader_emitter_v10 *emit,
       }
    }
 
-   if (emit->unit == PIPE_SHADER_TESS_CTRL) {
+   if (emit->unit == MESA_SHADER_TESS_CTRL) {
       ret = emit_hull_shader_patch_constant_phase(emit, &parse);
    }
 
@@ -12658,7 +12658,7 @@ emit_vgpu10_header(struct svga_shader_emitter_v10 *emit)
    if (emit->version >= 50) {
       VGPU10OpcodeToken0 token;
 
-      if (emit->unit == PIPE_SHADER_TESS_CTRL) {
+      if (emit->unit == MESA_SHADER_TESS_CTRL) {
          /* For hull shader, we need to start the declarations phase first before
           * emitting any declarations including the global flags.
           */
@@ -12835,7 +12835,7 @@ compute_input_mapping(struct svga_context *svga,
    } else if (unit == PIPE_SHADER_TESS_EVAL) {
       assert(svga->curr.tcs);
       prevShader = &svga->curr.tcs->base;
-   } else if (unit == PIPE_SHADER_TESS_CTRL) {
+   } else if (unit == MESA_SHADER_TESS_CTRL) {
       assert(svga->curr.vs);
       prevShader = &svga->curr.vs->base;
    }
@@ -12923,7 +12923,7 @@ svga_tgsi_vgpu10_translate(struct svga_context *svga,
    assert(unit == MESA_SHADER_VERTEX ||
           unit == PIPE_SHADER_GEOMETRY ||
           unit == PIPE_SHADER_FRAGMENT ||
-          unit == PIPE_SHADER_TESS_CTRL ||
+          unit == MESA_SHADER_TESS_CTRL ||
           unit == PIPE_SHADER_TESS_EVAL ||
           unit == PIPE_SHADER_COMPUTE);
 
@@ -13096,7 +13096,7 @@ svga_tgsi_vgpu10_translate(struct svga_context *svga,
    determine_clipping_mode(emit);
 
    if (unit == PIPE_SHADER_GEOMETRY || unit == MESA_SHADER_VERTEX ||
-       unit == PIPE_SHADER_TESS_CTRL || unit == PIPE_SHADER_TESS_EVAL) {
+       unit == MESA_SHADER_TESS_CTRL || unit == PIPE_SHADER_TESS_EVAL) {
       if (shader->stream_output != NULL || emit->clip_mode == CLIP_DISTANCE) {
          /* if there is stream output declarations associated
           * with this shader or the shader writes to ClipDistance
diff --git a/src/gallium/drivers/virgl/virgl_context.c b/src/gallium/drivers/virgl/virgl_context.c
index a0e1f3ba829..0e372b00be7 100644
--- a/src/gallium/drivers/virgl/virgl_context.c
+++ b/src/gallium/drivers/virgl/virgl_context.c
@@ -782,7 +782,7 @@ static void *virgl_create_vs_state(struct pipe_context *ctx,
 static void *virgl_create_tcs_state(struct pipe_context *ctx,
                                    const struct pipe_shader_state *shader)
 {
-   return virgl_shader_encoder(ctx, shader, PIPE_SHADER_TESS_CTRL);
+   return virgl_shader_encoder(ctx, shader, MESA_SHADER_TESS_CTRL);
 }
 
 static void *virgl_create_tes_state(struct pipe_context *ctx,
@@ -868,7 +868,7 @@ static void virgl_bind_tcs_state(struct pipe_context *ctx,
    uint32_t handle = (unsigned long)vss;
    struct virgl_context *vctx = virgl_context(ctx);
 
-   virgl_encode_bind_shader(vctx, handle, PIPE_SHADER_TESS_CTRL);
+   virgl_encode_bind_shader(vctx, handle, MESA_SHADER_TESS_CTRL);
 }
 
 static void virgl_bind_tes_state(struct pipe_context *ctx,
diff --git a/src/gallium/drivers/virgl/virgl_encode.c b/src/gallium/drivers/virgl/virgl_encode.c
index 80eacf97285..c8c95aedf35 100644
--- a/src/gallium/drivers/virgl/virgl_encode.c
+++ b/src/gallium/drivers/virgl/virgl_encode.c
@@ -1481,7 +1481,7 @@ int virgl_encode_link_shader(struct virgl_context *ctx, uint32_t *handles)
    virgl_encoder_write_dword(ctx->cbuf, handles[MESA_SHADER_VERTEX]);
    virgl_encoder_write_dword(ctx->cbuf, handles[PIPE_SHADER_FRAGMENT]);
    virgl_encoder_write_dword(ctx->cbuf, handles[PIPE_SHADER_GEOMETRY]);
-   virgl_encoder_write_dword(ctx->cbuf, handles[PIPE_SHADER_TESS_CTRL]);
+   virgl_encoder_write_dword(ctx->cbuf, handles[MESA_SHADER_TESS_CTRL]);
    virgl_encoder_write_dword(ctx->cbuf, handles[PIPE_SHADER_TESS_EVAL]);
    virgl_encoder_write_dword(ctx->cbuf, handles[PIPE_SHADER_COMPUTE]);
    return 0;
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index d81b90d1758..19be4e8c4ca 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -174,7 +174,7 @@ virgl_init_shader_caps(struct virgl_screen *vscreen)
          (struct pipe_shader_caps *)&vscreen->base.shader_caps[i];
 
       switch (i) {
-      case PIPE_SHADER_TESS_CTRL:
+      case MESA_SHADER_TESS_CTRL:
       case PIPE_SHADER_TESS_EVAL:
          if (!vscreen->caps.caps.v1.bset.has_tessellation_shaders)
             continue;
@@ -206,7 +206,7 @@ virgl_init_shader_caps(struct virgl_screen *vscreen)
       case PIPE_SHADER_FRAGMENT:
          caps->max_outputs = vscreen->caps.caps.v1.max_render_targets;
          break;
-      case PIPE_SHADER_TESS_CTRL:
+      case MESA_SHADER_TESS_CTRL:
          if (vscreen->caps.caps.v2.host_feature_check_version >= 19) {
             caps->max_outputs = vscreen->caps.caps.v2.max_tcs_outputs;
             break;
@@ -1076,7 +1076,7 @@ virgl_create_screen(struct virgl_winsys *vws, const struct pipe_screen_config *c
    screen->compiler_options.lower_ldexp = true;
    screen->compiler_options.lower_image_offset_to_range_base = true;
    screen->compiler_options.lower_atomic_offset_to_range_base = true;
-   screen->compiler_options.support_indirect_outputs = BITFIELD_BIT(PIPE_SHADER_TESS_CTRL);
+   screen->compiler_options.support_indirect_outputs = BITFIELD_BIT(MESA_SHADER_TESS_CTRL);
 
    if (screen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_INPUT_ADDR) {
       screen->compiler_options.support_indirect_inputs |= BITFIELD_BIT(MESA_SHADER_TESS_CTRL) |
diff --git a/src/gallium/drivers/virgl/virgl_screen.h b/src/gallium/drivers/virgl/virgl_screen.h
index a960127f872..528dcaeca57 100644
--- a/src/gallium/drivers/virgl/virgl_screen.h
+++ b/src/gallium/drivers/virgl/virgl_screen.h
@@ -95,7 +95,7 @@ virgl_shader_stage_convert(enum pipe_shader_type type)
    switch (type) {
    case MESA_SHADER_VERTEX:
       return VIRGL_SHADER_VERTEX;
-   case PIPE_SHADER_TESS_CTRL:
+   case MESA_SHADER_TESS_CTRL:
       return VIRGL_SHADER_TESS_CTRL;
    case PIPE_SHADER_TESS_EVAL:
       return VIRGL_SHADER_TESS_EVAL;
diff --git a/src/gallium/tools/trace/dump_state.py b/src/gallium/tools/trace/dump_state.py
index 2303b97b56a..c069a7fc7c8 100755
--- a/src/gallium/tools/trace/dump_state.py
+++ b/src/gallium/tools/trace/dump_state.py
@@ -412,7 +412,7 @@ class Context(Dispatcher):
     def _get_stage_state(self, shader):
         if shader == 'MESA_SHADER_VERTEX':
             return self._state.vs
-        if shader == 'PIPE_SHADER_TESS_CTRL':
+        if shader == 'MESA_SHADER_TESS_CTRL':
             return self._state.tcs
         if shader == 'PIPE_SHADER_TESS_EVAL':
             return self._state.tes
diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c
index 4b5bca04f21..014326fb4ae 100644
--- a/src/intel/compiler/brw_compiler.c
+++ b/src/intel/compiler/brw_compiler.c
@@ -83,7 +83,7 @@ const struct nir_shader_compiler_options brw_scalar_nir_options = {
    .vectorize_tess_levels = true,
    .vertex_id_zero_based = true,
    .scalarize_ddx = true,
-   .support_indirect_inputs = BITFIELD_BIT(PIPE_SHADER_TESS_CTRL) |
+   .support_indirect_inputs = BITFIELD_BIT(MESA_SHADER_TESS_CTRL) |
                               BITFIELD_BIT(PIPE_SHADER_TESS_EVAL) |
                               BITFIELD_BIT(PIPE_SHADER_FRAGMENT),
    .support_indirect_outputs = (uint8_t)BITFIELD_MASK(PIPE_SHADER_TYPES),
diff --git a/src/mesa/state_tracker/st_atom_constbuf.c b/src/mesa/state_tracker/st_atom_constbuf.c
index 10f2f889415..cefba88bff4 100644
--- a/src/mesa/state_tracker/st_atom_constbuf.c
+++ b/src/mesa/state_tracker/st_atom_constbuf.c
@@ -80,7 +80,7 @@ st_upload_constants(struct st_context *st, struct gl_program *prog, gl_shader_st
    assert(shader_type == MESA_SHADER_VERTEX ||
           shader_type == PIPE_SHADER_FRAGMENT ||
           shader_type == PIPE_SHADER_GEOMETRY ||
-          shader_type == PIPE_SHADER_TESS_CTRL ||
+          shader_type == MESA_SHADER_TESS_CTRL ||
           shader_type == PIPE_SHADER_TESS_EVAL ||
           shader_type == PIPE_SHADER_COMPUTE);
 
@@ -341,7 +341,7 @@ st_bind_tcs_ubos(struct st_context *st)
    struct gl_program *prog =
       st->ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL];
 
-   st_bind_ubos(st, prog, PIPE_SHADER_TESS_CTRL);
+   st_bind_ubos(st, prog, MESA_SHADER_TESS_CTRL);
 }
 
 void
diff --git a/src/mesa/state_tracker/st_atom_image.c b/src/mesa/state_tracker/st_atom_image.c
index 65308cdca4c..273668a6c2c 100644
--- a/src/mesa/state_tracker/st_atom_image.c
+++ b/src/mesa/state_tracker/st_atom_image.c
@@ -204,7 +204,7 @@ void st_bind_tcs_images(struct st_context *st)
    struct gl_program *prog =
       st->ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL];
 
-   st_bind_images(st, prog, PIPE_SHADER_TESS_CTRL);
+   st_bind_images(st, prog, MESA_SHADER_TESS_CTRL);
 }
 
 void st_bind_tes_images(struct st_context *st)
diff --git a/src/mesa/state_tracker/st_atom_sampler.c b/src/mesa/state_tracker/st_atom_sampler.c
index 32bb43c3c24..5f110583b39 100644
--- a/src/mesa/state_tracker/st_atom_sampler.c
+++ b/src/mesa/state_tracker/st_atom_sampler.c
@@ -372,7 +372,7 @@ st_update_tessctrl_samplers(struct st_context *st)
 
    if (ctx->TessCtrlProgram._Current) {
       update_shader_samplers(st,
-                             PIPE_SHADER_TESS_CTRL,
+                             MESA_SHADER_TESS_CTRL,
                              ctx->TessCtrlProgram._Current, NULL, NULL);
    }
 }
diff --git a/src/mesa/state_tracker/st_atom_shader.c b/src/mesa/state_tracker/st_atom_shader.c
index cf490bb6c0e..6cce10cf8b5 100644
--- a/src/mesa/state_tracker/st_atom_shader.c
+++ b/src/mesa/state_tracker/st_atom_shader.c
@@ -324,7 +324,7 @@ st_update_tcp(struct st_context *st)
 {
    void *shader = st_update_common_program(st,
                                            st->ctx->TessCtrlProgram._Current,
-                                           PIPE_SHADER_TESS_CTRL, &st->tcp);
+                                           MESA_SHADER_TESS_CTRL, &st->tcp);
    cso_set_tessctrl_shader_handle(st->cso_context, shader);
 }
 
diff --git a/src/mesa/state_tracker/st_atom_storagebuf.c b/src/mesa/state_tracker/st_atom_storagebuf.c
index 38d4b900662..1db69a6a6fb 100644
--- a/src/mesa/state_tracker/st_atom_storagebuf.c
+++ b/src/mesa/state_tracker/st_atom_storagebuf.c
@@ -120,7 +120,7 @@ void st_bind_tcs_ssbos(struct st_context *st)
    struct gl_program *prog =
       st->ctx->_Shader->CurrentProgram[MESA_SHADER_TESS_CTRL];
 
-   st_bind_ssbos(st, prog, PIPE_SHADER_TESS_CTRL);
+   st_bind_ssbos(st, prog, MESA_SHADER_TESS_CTRL);
 }
 
 void st_bind_tes_ssbos(struct st_context *st)
diff --git a/src/mesa/state_tracker/st_atom_texture.c b/src/mesa/state_tracker/st_atom_texture.c
index b0bb7306088..c9ee2bb81e9 100644
--- a/src/mesa/state_tracker/st_atom_texture.c
+++ b/src/mesa/state_tracker/st_atom_texture.c
@@ -377,7 +377,7 @@ st_update_tessctrl_textures(struct st_context *st)
    const struct gl_context *ctx = st->ctx;
 
    if (ctx->TessCtrlProgram._Current) {
-      update_textures(st, PIPE_SHADER_TESS_CTRL,
+      update_textures(st, MESA_SHADER_TESS_CTRL,
                             ctx->TessCtrlProgram._Current);
    }
 }
diff --git a/src/mesa/state_tracker/st_context.c b/src/mesa/state_tracker/st_context.c
index d17efe26487..223835f2948 100644
--- a/src/mesa/state_tracker/st_context.c
+++ b/src/mesa/state_tracker/st_context.c
@@ -294,7 +294,7 @@ free_zombie_shaders(struct st_context *st)
          st->ctx->NewDriverState |= ST_NEW_GS_STATE;
          st->pipe->delete_gs_state(st->pipe, entry->shader);
          break;
-      case PIPE_SHADER_TESS_CTRL:
+      case MESA_SHADER_TESS_CTRL:
          st->ctx->NewDriverState |= ST_NEW_TCS_STATE;
          st->pipe->delete_tcs_state(st->pipe, entry->shader);
          break;
diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c
index eab09b765fe..759201b7646 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -1322,7 +1322,7 @@ void st_init_extensions(struct pipe_screen *screen,
    /* Below are the cases which cannot be moved into tables easily. */
 
    /* The compatibility profile also requires GLSLVersionCompat >= 400. */
-   if (screen->shader_caps[PIPE_SHADER_TESS_CTRL].max_instructions > 0 &&
+   if (screen->shader_caps[MESA_SHADER_TESS_CTRL].max_instructions > 0 &&
        (api != API_OPENGL_COMPAT || consts->GLSLVersionCompat >= 400)) {
       extensions->ARB_tessellation_shader = GL_TRUE;
    }