diff --git a/src/intel/compiler/brw_compile_bs.cpp b/src/intel/compiler/brw_compile_bs.cpp index 0eb41902758..da3f5ee13e0 100644 --- a/src/intel/compiler/brw_compile_bs.cpp +++ b/src/intel/compiler/brw_compile_bs.cpp @@ -87,8 +87,18 @@ compile_single_bs(const struct brw_compiler *compiler, brw_postprocess_nir(shader, compiler, debug_enabled, key->base.robust_flags); - brw_shader s(compiler, ¶ms->base, &key->base, &prog_data->base, shader, - required_width, stats != NULL, debug_enabled); + const brw_shader_params shader_params = { + .compiler = compiler, + .mem_ctx = params->base.mem_ctx, + .nir = shader, + .key = &key->base, + .prog_data = &prog_data->base, + .dispatch_width = required_width, + .needs_register_pressure = stats != NULL, + .log_data = params->base.log_data, + .debug_enabled = debug_enabled, + }; + brw_shader s(&shader_params); const bool allow_spilling = true; if (!run_bs(s, allow_spilling)) { diff --git a/src/intel/compiler/brw_compile_cs.cpp b/src/intel/compiler/brw_compile_cs.cpp index 7131e67b752..03f7e7c30b8 100644 --- a/src/intel/compiler/brw_compile_cs.cpp +++ b/src/intel/compiler/brw_compile_cs.cpp @@ -176,12 +176,18 @@ brw_compile_cs(const struct brw_compiler *compiler, brw_postprocess_nir(shader, compiler, debug_enabled, key->base.robust_flags); - v[simd] = std::make_unique(compiler, ¶ms->base, - &key->base, - &prog_data->base, - shader, dispatch_width, - params->base.stats != NULL, - debug_enabled); + const brw_shader_params shader_params = { + .compiler = compiler, + .mem_ctx = params->base.mem_ctx, + .nir = shader, + .key = &key->base, + .prog_data = &prog_data->base, + .dispatch_width = dispatch_width, + .needs_register_pressure = params->base.stats != NULL, + .log_data = params->base.log_data, + .debug_enabled = debug_enabled, + }; + v[simd] = std::make_unique(&shader_params); const bool allow_spilling = simd == 0 || (!simd_state.compiled[simd - 1] && !brw_simd_should_compile(simd_state, simd - 1)) || diff --git a/src/intel/compiler/brw_compile_fs.cpp b/src/intel/compiler/brw_compile_fs.cpp index 7e1620e49bd..29ce7e13aa8 100644 --- a/src/intel/compiler/brw_compile_fs.cpp +++ b/src/intel/compiler/brw_compile_fs.cpp @@ -1587,11 +1587,23 @@ brw_compile_fs(const struct brw_compiler *compiler, float throughput = 0; bool has_spilled = false; + const brw_shader_params base_shader_params = { + .compiler = compiler, + .mem_ctx = params->base.mem_ctx, + .nir = nir, + .key = &key->base, + .prog_data = &prog_data->base, + .needs_register_pressure = params->base.stats != NULL, + .log_data = params->base.log_data, + .debug_enabled = debug_enabled, + }; + if (devinfo->ver < 20) { - v8 = std::make_unique(compiler, ¶ms->base, key, - prog_data, nir, 8, 1, - params->base.stats != NULL, - debug_enabled); + brw_shader_params shader_params = base_shader_params; + shader_params.dispatch_width = 8; + shader_params.num_polygons = 1; + + v8 = std::make_unique(&shader_params); v8->import_per_primitive_offsets(per_primitive_offsets); if (!run_fs(*v8, allow_spilling, false /* do_rep_send */)) { params->base.error_str = ralloc_strdup(params->base.mem_ctx, @@ -1630,10 +1642,10 @@ brw_compile_fs(const struct brw_compiler *compiler, 4 * prog_data->num_varying_inputs <= MAX_VARYING && INTEL_SIMD(FS, 4X8)) { /* Try a quad-SIMD8 compile */ - vmulti = std::make_unique(compiler, ¶ms->base, key, - prog_data, nir, 32, 4, - params->base.stats != NULL, - debug_enabled); + brw_shader_params shader_params = base_shader_params; + shader_params.dispatch_width = 32; + shader_params.num_polygons = 4; + vmulti = std::make_unique(&shader_params); max_dispatch_width = std::min(max_dispatch_width, vmulti->dispatch_width); if (!run_fs(*vmulti, false, false)) { @@ -1651,10 +1663,11 @@ brw_compile_fs(const struct brw_compiler *compiler, 2 * prog_data->num_varying_inputs <= MAX_VARYING && INTEL_SIMD(FS, 2X16)) { /* Try a dual-SIMD16 compile */ - vmulti = std::make_unique(compiler, ¶ms->base, key, - prog_data, nir, 32, 2, - params->base.stats != NULL, - debug_enabled); + brw_shader_params shader_params = base_shader_params; + shader_params.dispatch_width = 32; + shader_params.num_polygons = 2; + + vmulti = std::make_unique(&shader_params); max_dispatch_width = std::min(max_dispatch_width, vmulti->dispatch_width); if (!run_fs(*vmulti, false, false)) { @@ -1672,10 +1685,11 @@ brw_compile_fs(const struct brw_compiler *compiler, 2 * prog_data->num_varying_inputs <= MAX_VARYING && INTEL_SIMD(FS, 2X8)) { /* Try a dual-SIMD8 compile */ - vmulti = std::make_unique(compiler, ¶ms->base, key, - prog_data, nir, 16, 2, - params->base.stats != NULL, - debug_enabled); + brw_shader_params shader_params = base_shader_params; + shader_params.dispatch_width = 16; + shader_params.num_polygons = 2; + + vmulti = std::make_unique(&shader_params); max_dispatch_width = std::min(max_dispatch_width, vmulti->dispatch_width); if (!run_fs(*vmulti, false, false)) { @@ -1694,10 +1708,11 @@ brw_compile_fs(const struct brw_compiler *compiler, INTEL_SIMD(FS, 32) && !prog_data->base.ray_queries) { /* Try a SIMD32 compile */ - v32 = std::make_unique(compiler, ¶ms->base, key, - prog_data, nir, 32, 1, - params->base.stats != NULL, - debug_enabled); + brw_shader_params shader_params = base_shader_params; + shader_params.dispatch_width = 32; + shader_params.num_polygons = 1; + + v32 = std::make_unique(&shader_params); v32->import_per_primitive_offsets(per_primitive_offsets); if (vbase) v32->import_uniforms(vbase); @@ -1720,10 +1735,10 @@ brw_compile_fs(const struct brw_compiler *compiler, if (!vbase && INTEL_SIMD(FS, 16)) { /* Try a SIMD16 compile */ - v16 = std::make_unique(compiler, ¶ms->base, key, - prog_data, nir, 16, 1, - params->base.stats != NULL, - debug_enabled); + brw_shader_params shader_params = base_shader_params; + shader_params.dispatch_width = 16; + shader_params.num_polygons = 1; + v16 = std::make_unique(&shader_params); v16->import_per_primitive_offsets(per_primitive_offsets); if (!run_fs(*v16, allow_spilling, params->use_rep_send)) { @@ -1745,10 +1760,11 @@ brw_compile_fs(const struct brw_compiler *compiler, INTEL_SIMD(FS, 16)) || reqd_dispatch_width == SUBGROUP_SIZE_REQUIRE_16) { /* Try a SIMD16 compile */ - v16 = std::make_unique(compiler, ¶ms->base, key, - prog_data, nir, 16, 1, - params->base.stats != NULL, - debug_enabled); + brw_shader_params shader_params = base_shader_params; + shader_params.dispatch_width = 16; + shader_params.num_polygons = 1; + + v16 = std::make_unique(&shader_params); v16->import_per_primitive_offsets(per_primitive_offsets); if (v8) v16->import_uniforms(v8.get()); @@ -1780,10 +1796,11 @@ brw_compile_fs(const struct brw_compiler *compiler, reqd_dispatch_width == SUBGROUP_SIZE_VARYING && !simd16_failed && INTEL_SIMD(FS, 32)) { /* Try a SIMD32 compile */ - v32 = std::make_unique(compiler, ¶ms->base, key, - prog_data, nir, 32, 1, - params->base.stats != NULL, - debug_enabled); + brw_shader_params shader_params = base_shader_params; + shader_params.dispatch_width = 32; + shader_params.num_polygons = 1; + + v32 = std::make_unique(&shader_params); v32->import_per_primitive_offsets(per_primitive_offsets); if (v8) v32->import_uniforms(v8.get()); @@ -1824,10 +1841,11 @@ brw_compile_fs(const struct brw_compiler *compiler, 4 * prog_data->num_varying_inputs <= MAX_VARYING && INTEL_SIMD(FS, 4X8)) { /* Try a quad-SIMD8 compile */ - vmulti = std::make_unique(compiler, ¶ms->base, key, - prog_data, nir, 32, 4, - params->base.stats != NULL, - debug_enabled); + brw_shader_params shader_params = base_shader_params; + shader_params.dispatch_width = 32; + shader_params.num_polygons = 4; + vmulti = std::make_unique(&shader_params); + vmulti->import_per_primitive_offsets(per_primitive_offsets); vmulti->import_uniforms(vbase); if (!run_fs(*vmulti, false, params->use_rep_send)) { @@ -1845,10 +1863,11 @@ brw_compile_fs(const struct brw_compiler *compiler, 2 * prog_data->num_varying_inputs <= MAX_VARYING && INTEL_SIMD(FS, 2X16)) { /* Try a dual-SIMD16 compile */ - vmulti = std::make_unique(compiler, ¶ms->base, key, - prog_data, nir, 32, 2, - params->base.stats != NULL, - debug_enabled); + brw_shader_params shader_params = base_shader_params; + shader_params.dispatch_width = 32; + shader_params.num_polygons = 2; + + vmulti = std::make_unique(&shader_params); vmulti->import_per_primitive_offsets(per_primitive_offsets); vmulti->import_uniforms(vbase); if (!run_fs(*vmulti, false, params->use_rep_send)) { @@ -1865,10 +1884,11 @@ brw_compile_fs(const struct brw_compiler *compiler, 2 * prog_data->num_varying_inputs <= MAX_VARYING && INTEL_SIMD(FS, 2X8)) { /* Try a dual-SIMD8 compile */ - vmulti = std::make_unique(compiler, ¶ms->base, key, - prog_data, nir, 16, 2, - params->base.stats != NULL, - debug_enabled); + brw_shader_params shader_params = base_shader_params; + shader_params.dispatch_width = 16; + shader_params.num_polygons = 2; + + vmulti = std::make_unique(&shader_params); vmulti->import_per_primitive_offsets(per_primitive_offsets); vmulti->import_uniforms(vbase); if (!run_fs(*vmulti, allow_spilling, params->use_rep_send)) { diff --git a/src/intel/compiler/brw_compile_gs.cpp b/src/intel/compiler/brw_compile_gs.cpp index 098ba4a8005..6c6d9dbba40 100644 --- a/src/intel/compiler/brw_compile_gs.cpp +++ b/src/intel/compiler/brw_compile_gs.cpp @@ -352,9 +352,18 @@ brw_compile_gs(const struct brw_compiler *compiler, brw_print_vue_map(stderr, &prog_data->base.vue_map, MESA_SHADER_GEOMETRY); } - brw_shader v(compiler, ¶ms->base, &key->base, &prog_data->base.base, - nir, dispatch_width, - params->base.stats != NULL, debug_enabled); + const brw_shader_params shader_params = { + .compiler = compiler, + .mem_ctx = params->base.mem_ctx, + .nir = nir, + .key = &key->base, + .prog_data = &prog_data->base.base, + .dispatch_width = dispatch_width, + .needs_register_pressure = params->base.stats != NULL, + .log_data = params->base.log_data, + .debug_enabled = debug_enabled, + }; + brw_shader v(&shader_params); v.gs.control_data_bits_per_vertex = control_data_bits_per_vertex; v.gs.control_data_header_size_bits = control_data_header_size_bits; if (run_gs(v)) { diff --git a/src/intel/compiler/brw_compile_mesh.cpp b/src/intel/compiler/brw_compile_mesh.cpp index dddd4b85954..67f2ec47ca2 100644 --- a/src/intel/compiler/brw_compile_mesh.cpp +++ b/src/intel/compiler/brw_compile_mesh.cpp @@ -406,12 +406,18 @@ brw_compile_task(const struct brw_compiler *compiler, brw_postprocess_nir(shader, compiler, debug_enabled, key->base.robust_flags); - v[simd] = std::make_unique(compiler, ¶ms->base, - &key->base, - &prog_data->base.base, - shader, dispatch_width, - params->base.stats != NULL, - debug_enabled); + const brw_shader_params shader_params = { + .compiler = compiler, + .mem_ctx = params->base.mem_ctx, + .nir = shader, + .key = &key->base, + .prog_data = &prog_data->base.base, + .dispatch_width = dispatch_width, + .needs_register_pressure = params->base.stats != NULL, + .log_data = params->base.log_data, + .debug_enabled = debug_enabled, + }; + v[simd] = std::make_unique(&shader_params); if (prog_data->base.prog_mask) { unsigned first = ffs(prog_data->base.prog_mask) - 1; @@ -1260,12 +1266,18 @@ brw_compile_mesh(const struct brw_compiler *compiler, brw_postprocess_nir(shader, compiler, debug_enabled, key->base.robust_flags); - v[simd] = std::make_unique(compiler, ¶ms->base, - &key->base, - &prog_data->base.base, - shader, dispatch_width, - params->base.stats != NULL, - debug_enabled); + const brw_shader_params shader_params = { + .compiler = compiler, + .mem_ctx = params->base.mem_ctx, + .nir = shader, + .key = &key->base, + .prog_data = &prog_data->base.base, + .dispatch_width = dispatch_width, + .needs_register_pressure = params->base.stats != NULL, + .log_data = params->base.log_data, + .debug_enabled = debug_enabled, + }; + v[simd] = std::make_unique(&shader_params); if (prog_data->base.prog_mask) { unsigned first = ffs(prog_data->base.prog_mask) - 1; diff --git a/src/intel/compiler/brw_compile_tcs.cpp b/src/intel/compiler/brw_compile_tcs.cpp index 7ef7f55555a..2cd499b47a1 100644 --- a/src/intel/compiler/brw_compile_tcs.cpp +++ b/src/intel/compiler/brw_compile_tcs.cpp @@ -272,9 +272,18 @@ brw_compile_tcs(const struct brw_compiler *compiler, brw_print_vue_map(stderr, &vue_prog_data->vue_map, MESA_SHADER_TESS_CTRL); } - brw_shader v(compiler, ¶ms->base, &key->base, - &prog_data->base.base, nir, dispatch_width, - params->base.stats != NULL, debug_enabled); + const brw_shader_params shader_params = { + .compiler = compiler, + .mem_ctx = params->base.mem_ctx, + .nir = nir, + .key = &key->base, + .prog_data = &prog_data->base.base, + .dispatch_width = dispatch_width, + .needs_register_pressure = params->base.stats != NULL, + .log_data = params->base.log_data, + .debug_enabled = debug_enabled, + }; + brw_shader v(&shader_params); if (!run_tcs(v)) { params->base.error_str = ralloc_strdup(params->base.mem_ctx, v.fail_msg); diff --git a/src/intel/compiler/brw_compile_tes.cpp b/src/intel/compiler/brw_compile_tes.cpp index 1f2b0664b3e..e0e18ccc786 100644 --- a/src/intel/compiler/brw_compile_tes.cpp +++ b/src/intel/compiler/brw_compile_tes.cpp @@ -157,9 +157,18 @@ brw_compile_tes(const struct brw_compiler *compiler, MESA_SHADER_TESS_EVAL); } - brw_shader v(compiler, ¶ms->base, &key->base, - &prog_data->base.base, nir, dispatch_width, - params->base.stats != NULL, debug_enabled); + const brw_shader_params shader_params = { + .compiler = compiler, + .mem_ctx = params->base.mem_ctx, + .nir = nir, + .key = &key->base, + .prog_data = &prog_data->base.base, + .dispatch_width = dispatch_width, + .needs_register_pressure = params->base.stats != NULL, + .log_data = params->base.log_data, + .debug_enabled = debug_enabled, + }; + brw_shader v(&shader_params); if (!run_tes(v)) { params->base.error_str = ralloc_strdup(params->base.mem_ctx, v.fail_msg); diff --git a/src/intel/compiler/brw_compile_vs.cpp b/src/intel/compiler/brw_compile_vs.cpp index 7e177a9f024..89ca70de6af 100644 --- a/src/intel/compiler/brw_compile_vs.cpp +++ b/src/intel/compiler/brw_compile_vs.cpp @@ -339,9 +339,18 @@ brw_compile_vs(const struct brw_compiler *compiler, prog_data->base.dispatch_mode = INTEL_DISPATCH_MODE_SIMD8; - brw_shader v(compiler, ¶ms->base, &key->base, - &prog_data->base.base, nir, dispatch_width, - params->base.stats != NULL, debug_enabled); + const brw_shader_params shader_params = { + .compiler = compiler, + .mem_ctx = params->base.mem_ctx, + .nir = nir, + .key = &key->base, + .prog_data = &prog_data->base.base, + .dispatch_width = dispatch_width, + .needs_register_pressure = params->base.stats != NULL, + .log_data = params->base.log_data, + .debug_enabled = debug_enabled, + }; + brw_shader v(&shader_params); if (!run_vs(v)) { params->base.error_str = ralloc_strdup(params->base.mem_ctx, v.fail_msg); diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index b33fa4a493a..10e7b18bc13 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -394,63 +394,33 @@ brw_shader::emit_cs_terminate() send->eot = true; } -brw_shader::brw_shader(const struct brw_compiler *compiler, - const struct brw_compile_params *params, - const brw_base_prog_key *key, - struct brw_stage_prog_data *prog_data, - const nir_shader *shader, - unsigned dispatch_width, - bool needs_register_pressure, - bool debug_enabled) - : compiler(compiler), log_data(params->log_data), - devinfo(compiler->devinfo), nir(shader), +brw_shader::brw_shader(const brw_shader_params *params) + : compiler(params->compiler), + log_data(params->log_data), + devinfo(params->compiler->devinfo), + nir(params->nir), mem_ctx(params->mem_ctx), - cfg(NULL), stage(shader->info.stage), - debug_enabled(debug_enabled), - key(key), prog_data(prog_data), - live_analysis(this), regpressure_analysis(this), - performance_analysis(this), idom_analysis(this), def_analysis(this), + cfg(NULL), + stage(params->nir->info.stage), + debug_enabled(params->debug_enabled), + key(params->key), + prog_data(params->prog_data), + live_analysis(this), + regpressure_analysis(this), + performance_analysis(this), + idom_analysis(this), + def_analysis(this), ip_ranges_analysis(this), - needs_register_pressure(needs_register_pressure), - dispatch_width(dispatch_width), - max_polygons(0), - api_subgroup_size(brw_nir_api_subgroup_size(shader, dispatch_width)) + needs_register_pressure(params->needs_register_pressure), + dispatch_width(params->dispatch_width), + max_polygons(params->num_polygons), + api_subgroup_size(brw_nir_api_subgroup_size(params->nir, dispatch_width)) { - init(); -} - -brw_shader::brw_shader(const struct brw_compiler *compiler, - const struct brw_compile_params *params, - const brw_wm_prog_key *key, - struct brw_wm_prog_data *prog_data, - const nir_shader *shader, - unsigned dispatch_width, unsigned max_polygons, - bool needs_register_pressure, - bool debug_enabled) - : compiler(compiler), log_data(params->log_data), - devinfo(compiler->devinfo), nir(shader), - mem_ctx(params->mem_ctx), - cfg(NULL), stage(shader->info.stage), - debug_enabled(debug_enabled), - key(&key->base), prog_data(&prog_data->base), - live_analysis(this), regpressure_analysis(this), - performance_analysis(this), idom_analysis(this), def_analysis(this), - ip_ranges_analysis(this), - needs_register_pressure(needs_register_pressure), - dispatch_width(dispatch_width), - max_polygons(max_polygons), - api_subgroup_size(brw_nir_api_subgroup_size(shader, dispatch_width)) -{ - init(); assert(api_subgroup_size == 0 || - api_subgroup_size == 8 || - api_subgroup_size == 16 || - api_subgroup_size == 32); -} + api_subgroup_size == 8 || + api_subgroup_size == 16 || + api_subgroup_size == 32); -void -brw_shader::init() -{ this->max_dispatch_width = 32; this->failed = false; diff --git a/src/intel/compiler/brw_shader.h b/src/intel/compiler/brw_shader.h index a68025a8ad3..f85d1b2cf43 100644 --- a/src/intel/compiler/brw_shader.h +++ b/src/intel/compiler/brw_shader.h @@ -59,27 +59,29 @@ enum brw_shader_phase { BRW_SHADER_PHASE_INVALID, }; +struct brw_shader_params +{ + const struct brw_compiler *compiler; + void *mem_ctx; + + const nir_shader *nir; + const brw_base_prog_key *key; + brw_stage_prog_data *prog_data; + + unsigned dispatch_width; + + /* Fragment shader. */ + unsigned num_polygons; + + bool needs_register_pressure; + void *log_data; + bool debug_enabled; +}; + struct brw_shader { public: - brw_shader(const struct brw_compiler *compiler, - const struct brw_compile_params *params, - const brw_base_prog_key *key, - struct brw_stage_prog_data *prog_data, - const nir_shader *shader, - unsigned dispatch_width, - bool needs_register_pressure, - bool debug_enabled); - brw_shader(const struct brw_compiler *compiler, - const struct brw_compile_params *params, - const brw_wm_prog_key *key, - struct brw_wm_prog_data *prog_data, - const nir_shader *shader, - unsigned dispatch_width, - unsigned num_polygons, - bool needs_register_pressure, - bool debug_enabled); - void init(); + brw_shader(const brw_shader_params *params); ~brw_shader(); void import_uniforms(brw_shader *v); diff --git a/src/intel/compiler/test_helpers.h b/src/intel/compiler/test_helpers.h index 3c7f774ea2f..4fdcbdcd11b 100644 --- a/src/intel/compiler/test_helpers.h +++ b/src/intel/compiler/test_helpers.h @@ -139,11 +139,14 @@ protected: brw_stage_prog_data *pd = (struct brw_stage_prog_data *)rzalloc(mem_ctx, brw_any_prog_data); - brw_compile_params params = {}; - params.mem_ctx = mem_ctx; - - shaders.push_back(std::make_unique(compiler, ¶ms, nullptr, pd, nir, - dispatch_width, false, false)); + const brw_shader_params shader_params = { + .compiler = compiler, + .mem_ctx = mem_ctx, + .nir = nir, + .prog_data = pd, + .dispatch_width = dispatch_width, + }; + shaders.push_back(std::make_unique(&shader_params)); brw_shader *s = shaders.back().get(); s->phase = BRW_SHADER_PHASE_AFTER_OPT_LOOP;