fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-09 04:38:03 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

gallium,mesa: remove uint surffix from pipe_caps

Browse source 
We use explicit type now, no need for these surffix to
indicate the implicit type of the fields.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32955>
This commit is contained in:
Qiang Yu 2025-01-09 10:46:43 +08:00 • committed by Marge Bot
parent e5041ef036
commit 6c95232069
26 changed files with 51 additions and 52 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

6
docs/gallium/screen.rst
View file

@ -195,7 +195,7 @@ Capability about the features and limits of the driver/GPU.
state should be swizzled manually according to the swizzle in the sampler
view it is intended to be used with, or herein undefined results may occur
for permutational swizzles.
* ``pipe_caps.max_texel_buffer_elements_uint``: The maximum accessible number of
* ``pipe_caps.max_texel_buffer_elements``: The maximum accessible number of
elements within a sampler buffer view and image buffer view. This is unsigned
integer with the maximum of 4G - 1.
* ``pipe_caps.max_viewports``: The maximum number of viewports (and scissors
@ -510,7 +510,7 @@ Capability about the features and limits of the driver/GPU.
```set_sample_locations```.
* ``pipe_caps.max_gs_invocations``: Maximum supported value of
TGSI_PROPERTY_GS_INVOCATIONS.
* ``pipe_caps.max_shader_buffer_size_uint``: Maximum supported size for binding
* ``pipe_caps.max_shader_buffer_size``: Maximum supported size for binding
with set_shader_buffers. This is unsigned integer with the maximum of 4GB - 1.
* ``pipe_caps.max_combined_shader_buffers``: Maximum total number of shader
buffers. A value of 0 means the sum of all per-shader stage maximums (see
@ -630,7 +630,7 @@ Capability about the features and limits of the driver/GPU.
* ``pipe_caps.query_sparse_texture_residency``: TRUE if shader sparse texture sample instruction could also return the residency information.
* ``pipe_caps.clamp_sparse_texture_lod``: TRUE if shader sparse texture sample instruction support clamp the minimal lod to prevent read from uncommitted pages.
* ``pipe_caps.allow_draw_out_of_order``: TRUE if the driver allows the "draw out of order" optimization to be enabled. See _mesa_update_allow_draw_out_of_order for more details.
* ``pipe_caps.max_constant_buffer_size_uint``: Maximum bound constant buffer size in bytes. This is unsigned integer with the maximum of 4GB - 1. This applies to all constant buffers used by UBOs, unlike ``PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE``, which is specifically for GLSL uniforms.
* ``pipe_caps.max_constant_buffer_size``: Maximum bound constant buffer size in bytes. This is unsigned integer with the maximum of 4GB - 1. This applies to all constant buffers used by UBOs, unlike ``PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE``, which is specifically for GLSL uniforms.
* ``pipe_caps.hardware_gl_select``: Enable hardware accelerated GL_SELECT for this driver.
* ``pipe_caps.device_protected_context``: Whether the device supports protected / encrypted context which can manipulate protected / encrypted content (some devices might need protected contexts to access protected content, whereas ``pipe_caps.device_protected_surface`` does not require any particular context to do so).
* ``pipe_caps.allow_glthread_buffer_subdata_opt``: Whether to allow glthread to convert glBufferSubData to glCopyBufferSubData. This may improve or worsen performance depending on your driver.

6
src/gallium/auxiliary/util/u_screen.c
View file

@ -78,7 +78,7 @@ u_init_pipe_screen_caps(struct pipe_screen *pscreen, int accel)
caps->texture_transfer_modes = PIPE_TEXTURE_TRANSFER_BLIT;
/* GL_EXT_texture_buffer minimum value. */
caps->max_texel_buffer_elements_uint = 65536;
caps->max_texel_buffer_elements = 65536;
caps->max_viewports = 1;
@ -122,7 +122,7 @@ u_init_pipe_screen_caps(struct pipe_screen *pscreen, int accel)
caps->max_gs_invocations = 32;
caps->max_shader_buffer_size_uint = 1 << 27;
caps->max_shader_buffer_size = 1 << 27;
caps->max_vertex_element_src_offset = 2047;
@ -162,7 +162,7 @@ u_init_pipe_screen_caps(struct pipe_screen *pscreen, int accel)
caps->allow_dynamic_vao_fastpath = true;
caps->max_constant_buffer_size_uint =
caps->max_constant_buffer_size =
pscreen->get_shader_param(pscreen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE);

2
src/gallium/drivers/asahi/agx_pipe.c
View file

@ -2255,7 +2255,7 @@ agx_init_screen_caps(struct pipe_screen *pscreen)
caps->max_gs_invocations = 32;
caps->constant_buffer_offset_alignment = 16;
caps->max_texel_buffer_elements_uint = AGX_TEXTURE_BUFFER_MAX_SIZE;
caps->max_texel_buffer_elements = AGX_TEXTURE_BUFFER_MAX_SIZE;
caps->texture_buffer_offset_alignment = 64;

4
src/gallium/drivers/crocus/crocus_screen.c
View file

@ -427,10 +427,10 @@ crocus_init_screen_caps(struct crocus_screen *screen)
caps->constant_buffer_offset_alignment = 32;
caps->min_map_buffer_alignment = CROCUS_MAP_BUFFER_ALIGNMENT;
caps->shader_buffer_offset_alignment = devinfo->ver >= 7 ? 4 : 0;
caps->max_shader_buffer_size_uint = devinfo->ver >= 7 ? (1 << 27) : 0;
caps->max_shader_buffer_size = devinfo->ver >= 7 ? (1 << 27) : 0;
caps->texture_buffer_offset_alignment = 16; // XXX: u_screen says 256 is the minimum value...
caps->texture_transfer_modes = PIPE_TEXTURE_TRANSFER_BLIT;
caps->max_texel_buffer_elements_uint = CROCUS_MAX_TEXTURE_BUFFER_SIZE;
caps->max_texel_buffer_elements = CROCUS_MAX_TEXTURE_BUFFER_SIZE;
caps->max_viewports = devinfo->ver >= 6 ? 16 : 1;
caps->max_geometry_output_vertices = devinfo->ver >= 6 ? 256 : 0;
caps->max_geometry_total_output_components = devinfo->ver >= 6 ? 1024 : 0;

3
src/gallium/drivers/d3d12/d3d12_screen.cpp
View file

@ -301,8 +301,7 @@ d3d12_init_screen_caps(struct d3d12_screen *screen)
caps->texture_swizzle = true;
caps->max_texel_buffer_elements_uint =
1 << D3D12_REQ_BUFFER_RESOURCE_TEXEL_COUNT_2_TO_EXP;
caps->max_texel_buffer_elements = 1 << D3D12_REQ_BUFFER_RESOURCE_TEXEL_COUNT_2_TO_EXP;
caps->max_texture_2d_size = D3D12_REQ_TEXTURE2D_U_OR_V_DIMENSION;

2
src/gallium/drivers/freedreno/freedreno_screen.c
View file

@ -521,7 +521,7 @@ fd_init_screen_caps(struct fd_screen *screen)
caps->texture_buffer_offset_alignment = is_a3xx(screen) ? 16 :
(is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen) ? 64 : 0);
caps->max_texel_buffer_elements_uint =
caps->max_texel_buffer_elements =
/* We could possibly emulate more by pretending 2d/rect textures and
* splitting high bits of index into 2nd dimension..
*/

2
src/gallium/drivers/i915/i915_screen.c
View file

@ -429,7 +429,7 @@ i915_init_screen_caps(struct i915_screen *is)
caps->max_gs_invocations = 32;
caps->max_shader_buffer_size_uint = 1 << 27;
caps->max_shader_buffer_size = 1 << 27;
caps->max_viewports = 1;

4
src/gallium/drivers/iris/iris_screen.c
View file

@ -482,12 +482,12 @@ iris_init_screen_caps(struct iris_screen *screen)
caps->constant_buffer_offset_alignment = 32;
caps->min_map_buffer_alignment = IRIS_MAP_BUFFER_ALIGNMENT;
caps->shader_buffer_offset_alignment = 4;
caps->max_shader_buffer_size_uint = 1 << 27;
caps->max_shader_buffer_size = 1 << 27;
caps->texture_buffer_offset_alignment = 16; // XXX: u_screen says 256 is the minimum value...
caps->linear_image_pitch_alignment = 1;
caps->linear_image_base_address_alignment = 1;
caps->texture_transfer_modes = PIPE_TEXTURE_TRANSFER_BLIT;
caps->max_texel_buffer_elements_uint = IRIS_MAX_TEXTURE_BUFFER_SIZE;
caps->max_texel_buffer_elements = IRIS_MAX_TEXTURE_BUFFER_SIZE;
caps->max_viewports = 16;
caps->max_geometry_output_vertices = 256;
caps->max_geometry_total_output_components = 1024;

4
src/gallium/drivers/llvmpipe/lp_screen.c
View file

@ -380,7 +380,7 @@ llvmpipe_init_screen_caps(struct pipe_screen *screen)
caps->linear_image_pitch_alignment = 1;
caps->linear_image_base_address_alignment = 1;
/* Adressing that many 64bpp texels fits in an i32 so this is a reasonable value */
caps->max_texel_buffer_elements_uint = LP_MAX_TEXEL_BUFFER_ELEMENTS;
caps->max_texel_buffer_elements = LP_MAX_TEXEL_BUFFER_ELEMENTS;
caps->texture_buffer_offset_alignment = 16;
caps->texture_transfer_modes = 0;
caps->max_viewports = PIPE_MAX_VIEWPORTS;
@ -449,7 +449,7 @@ llvmpipe_init_screen_caps(struct pipe_screen *screen)
*/
caps->shareable_shaders = false;
caps->max_gs_invocations = 32;
caps->max_shader_buffer_size_uint = LP_MAX_TGSI_SHADER_BUFFER_SIZE;
caps->max_shader_buffer_size = LP_MAX_TGSI_SHADER_BUFFER_SIZE;
caps->framebuffer_no_attachment = true;
caps->tgsi_tg4_component_in_swizzle = true;
caps->fs_face_is_integer_sysval = true;

4
src/gallium/drivers/nouveau/nv30/nv30_screen.c
View file

@ -251,7 +251,7 @@ nv30_init_screen_caps(struct nv30_screen *screen)
caps->texture_buffer_offset_alignment = 0;
caps->query_pipeline_statistics = false;
caps->texture_border_color_quirk = false;
caps->max_texel_buffer_elements_uint = 0;
caps->max_texel_buffer_elements = 0;
caps->mixed_framebuffer_sizes = false;
caps->vs_layer_viewport = false;
caps->max_texture_gather_components = 0;
@ -345,7 +345,7 @@ nv30_init_screen_caps(struct nv30_screen *screen)
caps->pci_function = dev->info.pci.func;
caps->max_gs_invocations = 32;
caps->max_shader_buffer_size_uint = 1 << 27;
caps->max_shader_buffer_size = 1 << 27;
caps->vendor_id = 0x10de;
caps->device_id = dev->info.device_id;
caps->video_memory = dev->vram_size >> 20;

4
src/gallium/drivers/nouveau/nv50/nv50_screen.c
View file

@ -246,7 +246,7 @@ nv50_init_screen_caps(struct nv50_screen *screen)
caps->min_texel_offset = -8;
caps->max_texture_gather_offset =
caps->max_texel_offset = 7;
caps->max_texel_buffer_elements_uint = 128 * 1024 * 1024;
caps->max_texel_buffer_elements = 128 * 1024 * 1024;
caps->glsl_feature_level = 330;
caps->glsl_feature_level_compatibility = 330;
caps->essl_feature_level = class_3d >= NVA3_3D_CLASS ? 310 : 300;
@ -262,7 +262,7 @@ nv50_init_screen_caps(struct nv50_screen *screen)
caps->max_geometry_total_output_components = 1024;
caps->max_vertex_streams = 1;
caps->max_gs_invocations = 0;
caps->max_shader_buffer_size_uint = 1 << 27;
caps->max_shader_buffer_size = 1 << 27;
caps->max_vertex_attrib_stride = 2048;
caps->max_vertex_element_src_offset = 2047;
caps->constant_buffer_offset_alignment = 256;

4
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
View file

@ -279,7 +279,7 @@ nvc0_init_screen_caps(struct nvc0_screen *screen)
caps->max_texel_offset = 7;
caps->min_texture_gather_offset = -32;
caps->max_texture_gather_offset = 31;
caps->max_texel_buffer_elements_uint = 128 * 1024 * 1024;
caps->max_texel_buffer_elements = 128 * 1024 * 1024;
caps->glsl_feature_level = 430;
caps->glsl_feature_level_compatibility = 430;
caps->max_render_targets = 8;
@ -293,7 +293,7 @@ nvc0_init_screen_caps(struct nvc0_screen *screen)
caps->max_geometry_total_output_components = 1024;
caps->max_vertex_streams = 4;
caps->max_gs_invocations = 32;
caps->max_shader_buffer_size_uint = 1 << 27;
caps->max_shader_buffer_size = 1 << 27;
caps->max_vertex_attrib_stride = 2048;
caps->max_vertex_element_src_offset = 2047;
caps->constant_buffer_offset_alignment = 256;

2
src/gallium/drivers/panfrost/pan_screen.c
View file

@ -653,7 +653,7 @@ panfrost_init_screen_caps(struct panfrost_screen *screen)
caps->texture_border_color_quirk = dev->arch == 7 || dev->arch >= 10 ?
PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_FREEDRENO : 0;
caps->max_texel_buffer_elements_uint = PAN_MAX_TEXEL_BUFFER_ELEMENTS;
caps->max_texel_buffer_elements = PAN_MAX_TEXEL_BUFFER_ELEMENTS;
/* Must be at least 64 for correct behaviour */
caps->texture_buffer_offset_alignment = 64;

2
src/gallium/drivers/r300/r300_screen.c
View file

@ -662,7 +662,7 @@ static void r300_init_screen_caps(struct r300_screen* r300screen)
caps->shareable_shaders = false;
caps->max_gs_invocations = 32;
caps->max_shader_buffer_size_uint = 1 << 27;
caps->max_shader_buffer_size = 1 << 27;
/* SWTCL-only features. */
caps->primitive_restart =

4
src/gallium/drivers/r600/r600_pipe.c
View file

@ -412,7 +412,7 @@ static void r600_init_screen_caps(struct r600_screen *rscreen)
caps->nir_images_as_deref = false;
caps->fake_sw_msaa = false;
caps->max_texel_buffer_elements_uint =
caps->max_texel_buffer_elements =
MIN2(rscreen->b.info.max_heap_size_kb * 1024ull / 4, INT_MAX);
caps->min_map_buffer_alignment = R600_MAP_BUFFER_ALIGNMENT;
@ -451,7 +451,7 @@ static void r600_init_screen_caps(struct r600_screen *rscreen)
caps->max_gs_invocations = 32;
/* shader buffer objects */
caps->max_shader_buffer_size_uint = 1 << 27;
caps->max_shader_buffer_size = 1 << 27;
caps->max_combined_shader_buffers = 8;
caps->int64 =

8
src/gallium/drivers/radeonsi/si_get.c
View file

@ -1388,10 +1388,10 @@ void si_init_screen_caps(struct si_screen *sscreen)
if (sizeof(void*) == 4)
max_size = MIN2(max_size, 512 * 1024 * 1024);
caps->max_constant_buffer_size_uint =
caps->max_shader_buffer_size_uint = max_size;
caps->max_constant_buffer_size =
caps->max_shader_buffer_size = max_size;
unsigned max_texels = caps->max_shader_buffer_size_uint;
unsigned max_texels = caps->max_shader_buffer_size;
/* FYI, BUF_RSRC_WORD2.NUM_RECORDS field limit is UINT32_MAX. */
@ -1405,7 +1405,7 @@ void si_init_screen_caps(struct si_screen *sscreen)
* TODO: Remove this after the gallium interface is changed. */
max_texels = MIN2(max_texels, UINT32_MAX / 16);
caps->max_texel_buffer_elements_uint = max_texels;
caps->max_texel_buffer_elements = max_texels;
/* Allow 1/4th of the heap size. */
caps->max_texture_mb = sscreen->info.max_heap_size_kb / 1024 / 4;

2
src/gallium/drivers/radeonsi/si_pipe.c
View file

@ -1280,7 +1280,7 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws,
si_init_screen_caps(sscreen);
sscreen->max_texel_buffer_elements = sscreen->b.caps.max_texel_buffer_elements_uint;
sscreen->max_texel_buffer_elements = sscreen->b.caps.max_texel_buffer_elements;
if (sscreen->debug_flags & DBG(INFO))
ac_print_gpu_info(&sscreen->info, stdout);

4
src/gallium/drivers/softpipe/sp_screen.c
View file

@ -309,7 +309,7 @@ softpipe_init_screen_caps(struct softpipe_screen *sp_screen)
caps->timer_resolution = true;
caps->cube_map_array = true;
caps->texture_buffer_objects = true;
caps->max_texel_buffer_elements_uint = 65536;
caps->max_texel_buffer_elements = 65536;
caps->texture_buffer_offset_alignment = 16;
caps->texture_transfer_modes = 0;
caps->max_viewports = PIPE_MAX_VIEWPORTS;
@ -366,7 +366,7 @@ softpipe_init_screen_caps(struct softpipe_screen *sp_screen)
caps->pci_device =
caps->pci_function = 0;
caps->max_gs_invocations = 32;
caps->max_shader_buffer_size_uint = 1 << 27;
caps->max_shader_buffer_size = 1 << 27;
caps->shader_buffer_offset_alignment = 4;
caps->image_store_formatted = true;

4
src/gallium/drivers/svga/svga_screen.c
View file

@ -595,7 +595,7 @@ svga_init_screen_caps(struct svga_screen *svgascreen)
/* convert bytes to texels for the case of the largest texel
* size: float[4].
*/
caps->max_texel_buffer_elements_uint =
caps->max_texel_buffer_elements =
SVGA3D_DX_MAX_RESOURCE_SIZE / (4 * sizeof(float));
caps->min_texel_offset = sws->have_vgpu10 ? VGPU10_MIN_TEXEL_FETCH_OFFSET : 0;
@ -677,7 +677,7 @@ svga_init_screen_caps(struct svga_screen *svgascreen)
caps->allow_mapped_buffers_during_execution = false;
caps->tgsi_div = true;
caps->max_gs_invocations = 32;
caps->max_shader_buffer_size_uint = 1 << 27;
caps->max_shader_buffer_size = 1 << 27;
/* Verify this once protocol is finalized. Setting it to minimum value. */
caps->max_shader_patch_varyings = sws->have_sm5 ? 30 : 0;
caps->texture_float_linear = true;

6
src/gallium/drivers/virgl/virgl_screen.c
View file

@ -425,7 +425,7 @@ virgl_init_screen_caps(struct virgl_screen *vscreen)
caps->cube_map_array = vscreen->caps.caps.v1.bset.cube_map_array;
caps->texture_multisample = vscreen->caps.caps.v1.bset.texture_multisample;
caps->max_viewports = vscreen->caps.caps.v1.max_viewports;
caps->max_texel_buffer_elements_uint = vscreen->caps.caps.v1.max_tbo_size;
caps->max_texel_buffer_elements = vscreen->caps.caps.v1.max_tbo_size;
caps->texture_border_color_quirk = 0;
caps->endianness = PIPE_ENDIAN_LITTLE;
caps->query_pipeline_statistics =
@ -505,7 +505,7 @@ virgl_init_screen_caps(struct virgl_screen *vscreen)
caps->allow_mapped_buffers_during_execution = 0;
caps->clip_halfz = vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_CLIP_HALFZ;
caps->max_gs_invocations = 32;
caps->max_shader_buffer_size_uint = 1 << 27;
caps->max_shader_buffer_size = 1 << 27;
caps->vendor_id = 0x1af4;
caps->device_id = 0x1010;
caps->video_memory =
@ -536,7 +536,7 @@ virgl_init_screen_caps(struct virgl_screen *vscreen)
caps->gl_spirv = true;
if (vscreen->caps.caps.v2.host_feature_check_version >= 13)
caps->max_constant_buffer_size_uint = vscreen->caps.caps.v2.max_uniform_block_size;
caps->max_constant_buffer_size = vscreen->caps.caps.v2.max_uniform_block_size;
caps->min_line_width =
caps->min_line_width_aa =

4
src/gallium/drivers/zink/zink_screen.c
View file

@ -1032,7 +1032,7 @@ zink_init_screen_caps(struct zink_screen *screen)
caps->texture_transfer_modes = mode;
}
caps->max_texel_buffer_elements_uint =
caps->max_texel_buffer_elements =
MIN2(get_smallest_buffer_heap(screen),
screen->info.props.limits.maxTexelBufferElements);
@ -1133,7 +1133,7 @@ zink_init_screen_caps(struct zink_screen *screen)
/* 1<<27 is required by VK spec */
assert(screen->info.props.limits.maxStorageBufferRange >= 1 << 27);
/* clamp to VK spec minimum */
caps->max_shader_buffer_size_uint =
caps->max_shader_buffer_size =
MIN2(get_smallest_buffer_heap(screen), screen->info.props.limits.maxStorageBufferRange);
caps->fs_coord_origin_upper_left = true;

2
src/gallium/frontends/clover/core/device.cpp
View file

@ -243,7 +243,7 @@ device::max_images_write() const {
size_t
device::max_image_buffer_size() const {
return pipe->caps.max_texel_buffer_elements_uint;
return pipe->caps.max_texel_buffer_elements;
}
cl_uint

4
src/gallium/frontends/lavapipe/lvp_device.c
View file

@ -807,9 +807,9 @@ lvp_get_properties(const struct lvp_physical_device *device, struct vk_propertie
.maxImageDimension3D = (1 << device->pscreen->caps.max_texture_3d_levels),
.maxImageDimensionCube = (1 << device->pscreen->caps.max_texture_cube_levels),
.maxImageArrayLayers = device->pscreen->caps.max_texture_array_layers,
.maxTexelBufferElements = device->pscreen->caps.max_texel_buffer_elements_uint,
.maxTexelBufferElements = device->pscreen->caps.max_texel_buffer_elements,
.maxUniformBufferRange = min_shader_param(device->pscreen, PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE),
.maxStorageBufferRange = device->pscreen->caps.max_shader_buffer_size_uint,
.maxStorageBufferRange = device->pscreen->caps.max_shader_buffer_size,
.maxPushConstantsSize = MAX_PUSH_CONSTANTS_SIZE,
.maxMemoryAllocationCount = UINT32_MAX,
.maxSamplerAllocationCount = 32 * 1024,

4
src/gallium/frontends/rusticl/core/device.rs
View file

@ -732,7 +732,7 @@ impl Device {
1 << 26,
min(
self.max_mem_alloc(),
self.screen.caps().max_shader_buffer_size_uint as u64,
self.screen.caps().max_shader_buffer_size as u64,
),
)
}
@ -905,7 +905,7 @@ impl Device {
self.max_mem_alloc() / MAX_PIXEL_SIZE_BYTES,
c_int::MAX as cl_ulong,
),
self.screen.caps().max_texel_buffer_elements_uint as cl_ulong,
self.screen.caps().max_texel_buffer_elements as cl_ulong,
) as usize
} else {
0

6
src/gallium/include/pipe/p_defines.h
View file

@ -1043,7 +1043,7 @@ struct pipe_caps {
unsigned texture_transfer_modes;
/* pipe_quirk_texture_border_color_swizzle */
unsigned texture_border_color_quirk;
unsigned max_texel_buffer_elements_uint;
unsigned max_texel_buffer_elements;
unsigned max_viewports;
unsigned max_geometry_output_vertices;
unsigned max_geometry_total_output_components;
@ -1071,7 +1071,7 @@ struct pipe_caps {
unsigned constbuf0_flags;
unsigned max_conservative_raster_subpixel_precision_bias;
unsigned max_gs_invocations;
unsigned max_shader_buffer_size_uint;
unsigned max_shader_buffer_size;
unsigned max_combined_shader_buffers;
unsigned max_combined_hw_atomic_counters;
unsigned max_combined_hw_atomic_counter_buffers;
@ -1089,7 +1089,7 @@ struct pipe_caps {
unsigned max_sparse_texture_size;
unsigned max_sparse_3d_texture_size;
unsigned max_sparse_array_texture_layers;
unsigned max_constant_buffer_size_uint;
unsigned max_constant_buffer_size;
unsigned query_timestamp_bits;
unsigned shader_subgroup_size;
unsigned shader_subgroup_supported_stages;

6
src/mesa/state_tracker/st_extensions.c
View file

@ -184,7 +184,7 @@ void st_init_limits(struct pipe_screen *screen,
screen->caps.quads_follow_provoking_vertex_convention;
c->MaxUniformBlockSize =
screen->caps.max_constant_buffer_size_uint;
screen->caps.max_constant_buffer_size;
if (c->MaxUniformBlockSize < 16384) {
can_ubo = false;
@ -547,7 +547,7 @@ void st_init_limits(struct pipe_screen *screen,
c->MaxCombinedShaderOutputResources +=
c->MaxCombinedShaderStorageBlocks;
c->MaxShaderStorageBlockSize =
screen->caps.max_shader_buffer_size_uint;
screen->caps.max_shader_buffer_size;
if (c->Program[MESA_SHADER_FRAGMENT].MaxShaderStorageBlocks)
extensions->ARB_shader_storage_buffer_object = GL_TRUE;
}
@ -1529,7 +1529,7 @@ void st_init_extensions(struct pipe_screen *screen,
if (extensions->ARB_texture_buffer_object) {
consts->MaxTextureBufferSize =
screen->caps.max_texel_buffer_elements_uint;
screen->caps.max_texel_buffer_elements;
consts->TextureBufferOffsetAlignment =
screen->caps.texture_buffer_offset_alignment;