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ilo: add a new struct for context states

Browse source 
Move pipe states in ilo_context to the new ilo_state_vector.  The motivation
is that ilo_context consists of several loosely related things.  When we need
an ilo_context somewhere, we usually need only one or two of the things in it.
This change makes ilo_state_vector one such thing.

An immediate result is that we no longer need ilo_context in 3D pipelines,
something we have planned for since early days.
This commit is contained in:
Chia-I Wu 2014-09-20 00:46:35 +08:00
parent 284d767be0
commit 6c0de4b979
20 changed files with 674 additions and 656 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

35
src/gallium/drivers/ilo/ilo_3d.c
View file

@ -456,7 +456,7 @@ ilo_3d_destroy(struct ilo_3d *hw3d)
}
static bool
draw_vbo(struct ilo_3d *hw3d, const struct ilo_context *ilo,
draw_vbo(struct ilo_3d *hw3d, const struct ilo_state_vector *vec,
int *prim_generated, int *prim_emitted)
{
bool need_flush = false;
@ -471,15 +471,15 @@ draw_vbo(struct ilo_3d *hw3d, const struct ilo_context *ilo,
* happens in the middle of a batch buffer, we need to insert manual
* flushes.
*/
need_flush = (ilo->dirty & ILO_DIRTY_FB);
need_flush = (vec->dirty & ILO_DIRTY_FB);
/* same to SO target changes */
need_flush |= (ilo->dirty & ILO_DIRTY_SO);
need_flush |= (vec->dirty & ILO_DIRTY_SO);
}
/* make sure there is enough room first */
max_len = ilo_3d_pipeline_estimate_size(hw3d->pipeline,
ILO_3D_PIPELINE_DRAW, ilo);
ILO_3D_PIPELINE_DRAW, vec);
if (need_flush) {
max_len += ilo_3d_pipeline_estimate_size(hw3d->pipeline,
ILO_3D_PIPELINE_FLUSH, NULL);
@ -494,7 +494,7 @@ draw_vbo(struct ilo_3d *hw3d, const struct ilo_context *ilo,
if (need_flush)
ilo_3d_pipeline_emit_flush(hw3d->pipeline);
return ilo_3d_pipeline_emit_draw(hw3d->pipeline, ilo,
return ilo_3d_pipeline_emit_draw(hw3d->pipeline, vec,
prim_generated, prim_emitted);
}
@ -621,7 +621,7 @@ ilo_check_restart_index(const struct ilo_context *ilo, unsigned restart_index)
return true;
/* Note: indices must be unsigned byte, unsigned short or unsigned int */
switch (ilo->ib.index_size) {
switch (ilo->state_vector.ib.index_size) {
case 1:
return ((restart_index & 0xff) == 0xff);
break;
@ -674,7 +674,7 @@ static void
ilo_draw_vbo_with_sw_restart(struct pipe_context *pipe,
const struct pipe_draw_info *info)
{
struct ilo_context *ilo = ilo_context(pipe);
struct ilo_state_vector *vec = &ilo_context(pipe)->state_vector;
struct pipe_draw_info *restart_info = NULL;
int sub_prim_count = 1;
@ -690,21 +690,22 @@ ilo_draw_vbo_with_sw_restart(struct pipe_context *pipe,
return;
}
if (ilo->ib.buffer) {
if (vec->ib.buffer) {
struct pipe_transfer *transfer;
const void *map;
map = pipe_buffer_map(pipe, ilo->ib.buffer,
map = pipe_buffer_map(pipe, vec->ib.buffer,
PIPE_TRANSFER_READ, &transfer);
sub_prim_count = ilo_find_sub_primitives(map + ilo->ib.offset,
ilo->ib.index_size, info, restart_info);
sub_prim_count = ilo_find_sub_primitives(map + vec->ib.offset,
vec->ib.index_size, info, restart_info);
pipe_buffer_unmap(pipe, transfer);
}
else {
sub_prim_count = ilo_find_sub_primitives(ilo->ib.user_buffer,
ilo->ib.index_size, info, restart_info);
sub_prim_count =
ilo_find_sub_primitives(vec->ib.user_buffer,
vec->ib.index_size, info, restart_info);
}
info = restart_info;
@ -738,7 +739,7 @@ ilo_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
u_prim_name(info->mode), info->start, info->count);
}
ilo_dump_dirty_flags(ilo->dirty);
ilo_state_vector_dump_dirty(&ilo->state_vector);
}
if (!ilo_3d_pass_render_condition(ilo))
@ -763,15 +764,15 @@ ilo_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
ilo_blit_resolve_framebuffer(ilo);
/* If draw_vbo ever fails, return immediately. */
if (!draw_vbo(hw3d, ilo, &prim_generated, &prim_emitted))
if (!draw_vbo(hw3d, &ilo->state_vector, &prim_generated, &prim_emitted))
return;
/* clear dirty status */
ilo->dirty = 0x0;
ilo->state_vector.dirty = 0x0;
hw3d->new_batch = false;
/* avoid dangling pointer reference */
ilo->draw = NULL;
ilo->state_vector.draw = NULL;
update_prim_count(hw3d, prim_generated, prim_emitted);

15
src/gallium/drivers/ilo/ilo_3d_pipeline.c
View file

@ -29,7 +29,6 @@
#include "intel_winsys.h"
#include "ilo_blitter.h"
#include "ilo_context.h"
#include "ilo_cp.h"
#include "ilo_state.h"
#include "ilo_3d_pipeline_gen6.h"
@ -150,13 +149,13 @@ handle_invalid_batch_bo(struct ilo_3d_pipeline *p, bool unset)
*/
bool
ilo_3d_pipeline_emit_draw(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
int *prim_generated, int *prim_emitted)
{
bool success;
if (ilo->dirty & ILO_DIRTY_SO &&
ilo->so.enabled && !ilo->so.append_bitmask) {
if (vec->dirty & ILO_DIRTY_SO &&
vec->so.enabled && !vec->so.append_bitmask) {
/*
* We keep track of the SVBI in the driver, so that we can restore it
* when the HW context is invalidated (by another process). The value
@ -179,9 +178,9 @@ ilo_3d_pipeline_emit_draw(struct ilo_3d_pipeline *p,
handle_invalid_batch_bo(p, false);
/* draw! */
p->emit_draw(p, ilo);
p->emit_draw(p, vec);
if (ilo_builder_validate(&ilo->cp->builder, 0, NULL)) {
if (ilo_builder_validate(&p->cp->builder, 0, NULL)) {
success = true;
} else {
/* rewind */
@ -201,11 +200,11 @@ ilo_3d_pipeline_emit_draw(struct ilo_3d_pipeline *p,
if (success) {
const int num_verts =
u_vertices_per_prim(u_reduced_prim(ilo->draw->mode));
u_vertices_per_prim(u_reduced_prim(vec->draw->mode));
const int max_emit =
(p->state.so_max_vertices - p->state.so_num_vertices) / num_verts;
const int generated =
u_reduced_prims_for_vertices(ilo->draw->mode, ilo->draw->count);
u_reduced_prims_for_vertices(vec->draw->mode, vec->draw->count);
const int emitted = MIN2(generated, max_emit);
p->state.so_num_vertices += emitted * num_verts;

6
src/gallium/drivers/ilo/ilo_3d_pipeline.h
View file

@ -34,7 +34,7 @@
struct intel_bo;
struct ilo_blitter;
struct ilo_cp;
struct ilo_context;
struct ilo_state_vector;
enum ilo_3d_pipeline_invalidate_flags {
ILO_3D_PIPELINE_INVALIDATE_HW = 1 << 0,
@ -74,7 +74,7 @@ struct ilo_3d_pipeline {
const void *arg);
void (*emit_draw)(struct ilo_3d_pipeline *pipeline,
const struct ilo_context *ilo);
const struct ilo_state_vector *vec);
void (*emit_flush)(struct ilo_3d_pipeline *pipeline);
@ -166,7 +166,7 @@ ilo_3d_pipeline_estimate_size(struct ilo_3d_pipeline *pipeline,
bool
ilo_3d_pipeline_emit_draw(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
int *prim_generated, int *prim_emitted);
void

355
src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c
View file

@ -34,7 +34,6 @@
#include "ilo_builder_3d.h"
#include "ilo_builder_mi.h"
#include "ilo_builder_render.h"
#include "ilo_context.h"
#include "ilo_cp.h"
#include "ilo_shader.h"
#include "ilo_state.h"
@ -182,7 +181,7 @@ gen6_wa_pipe_control_vs_const_flush(struct ilo_3d_pipeline *p)
void
gen6_pipeline_common_select(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* PIPELINE_SELECT */
@ -196,7 +195,7 @@ gen6_pipeline_common_select(struct ilo_3d_pipeline *p,
void
gen6_pipeline_common_sip(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* STATE_SIP */
@ -210,7 +209,7 @@ gen6_pipeline_common_sip(struct ilo_3d_pipeline *p,
void
gen6_pipeline_common_base_address(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* STATE_BASE_ADDRESS */
@ -260,18 +259,18 @@ gen6_pipeline_common_base_address(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_common_urb(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_URB */
if (DIRTY(VE) || DIRTY(VS) || DIRTY(GS)) {
const bool gs_active = (ilo->gs || (ilo->vs &&
ilo_shader_get_kernel_param(ilo->vs, ILO_KERNEL_VS_GEN6_SO)));
const bool gs_active = (vec->gs || (vec->vs &&
ilo_shader_get_kernel_param(vec->vs, ILO_KERNEL_VS_GEN6_SO)));
int vs_entry_size, gs_entry_size;
int vs_total_size, gs_total_size;
vs_entry_size = (ilo->vs) ?
ilo_shader_get_kernel_param(ilo->vs, ILO_KERNEL_OUTPUT_COUNT) : 0;
vs_entry_size = (vec->vs) ?
ilo_shader_get_kernel_param(vec->vs, ILO_KERNEL_OUTPUT_COUNT) : 0;
/*
* As indicated by 2e712e41db0c0676e9f30fc73172c0e8de8d84d4, VF and VS
@ -293,17 +292,17 @@ gen6_pipeline_common_urb(struct ilo_3d_pipeline *p,
* VS-generated output data, output URB availability isn't a
* factor."
*/
if (vs_entry_size < ilo->ve->count)
vs_entry_size = ilo->ve->count;
if (vs_entry_size < vec->ve->count)
vs_entry_size = vec->ve->count;
gs_entry_size = (ilo->gs) ?
ilo_shader_get_kernel_param(ilo->gs, ILO_KERNEL_OUTPUT_COUNT) :
gs_entry_size = (vec->gs) ?
ilo_shader_get_kernel_param(vec->gs, ILO_KERNEL_OUTPUT_COUNT) :
(gs_active) ? vs_entry_size : 0;
/* in bytes */
vs_entry_size *= sizeof(float) * 4;
gs_entry_size *= sizeof(float) * 4;
vs_total_size = ilo->dev->urb_size;
vs_total_size = p->dev->urb_size;
if (gs_active) {
vs_total_size /= 2;
@ -334,7 +333,7 @@ gen6_pipeline_common_urb(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_common_pointers_1(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_VIEWPORT_STATE_POINTERS */
@ -348,7 +347,7 @@ gen6_pipeline_common_pointers_1(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_common_pointers_2(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_CC_STATE_POINTERS */
@ -374,7 +373,7 @@ gen6_pipeline_common_pointers_2(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_common_pointers_3(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_SCISSOR_STATE_POINTERS */
@ -396,20 +395,20 @@ gen6_pipeline_common_pointers_3(struct ilo_3d_pipeline *p,
void
gen6_pipeline_vf(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
if (ilo_dev_gen(p->dev) >= ILO_GEN(7.5)) {
/* 3DSTATE_INDEX_BUFFER */
if (DIRTY(IB) || session->batch_bo_changed) {
gen6_3DSTATE_INDEX_BUFFER(&p->cp->builder,
&ilo->ib, false);
&vec->ib, false);
}
/* 3DSTATE_VF */
if (session->primitive_restart_changed) {
gen7_3DSTATE_VF(&p->cp->builder, ilo->draw->primitive_restart,
ilo->draw->restart_index);
gen7_3DSTATE_VF(&p->cp->builder, vec->draw->primitive_restart,
vec->draw->restart_index);
}
}
else {
@ -417,33 +416,33 @@ gen6_pipeline_vf(struct ilo_3d_pipeline *p,
if (DIRTY(IB) || session->primitive_restart_changed ||
session->batch_bo_changed) {
gen6_3DSTATE_INDEX_BUFFER(&p->cp->builder,
&ilo->ib, ilo->draw->primitive_restart);
&vec->ib, vec->draw->primitive_restart);
}
}
/* 3DSTATE_VERTEX_BUFFERS */
if (DIRTY(VB) || DIRTY(VE) || session->batch_bo_changed)
gen6_3DSTATE_VERTEX_BUFFERS(&p->cp->builder, ilo->ve, &ilo->vb);
gen6_3DSTATE_VERTEX_BUFFERS(&p->cp->builder, vec->ve, &vec->vb);
/* 3DSTATE_VERTEX_ELEMENTS */
if (DIRTY(VE) || DIRTY(VS)) {
const struct ilo_ve_state *ve = ilo->ve;
const struct ilo_ve_state *ve = vec->ve;
bool last_velement_edgeflag = false;
bool prepend_generate_ids = false;
if (ilo->vs) {
if (ilo_shader_get_kernel_param(ilo->vs,
if (vec->vs) {
if (ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_VS_INPUT_EDGEFLAG)) {
/* we rely on the state tracker here */
assert(ilo_shader_get_kernel_param(ilo->vs,
assert(ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_INPUT_COUNT) == ve->count);
last_velement_edgeflag = true;
}
if (ilo_shader_get_kernel_param(ilo->vs,
if (ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_VS_INPUT_INSTANCEID) ||
ilo_shader_get_kernel_param(ilo->vs,
ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_VS_INPUT_VERTEXID))
prepend_generate_ids = true;
}
@ -455,7 +454,7 @@ gen6_pipeline_vf(struct ilo_3d_pipeline *p,
void
gen6_pipeline_vf_statistics(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_VF_STATISTICS */
@ -465,17 +464,17 @@ gen6_pipeline_vf_statistics(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_vf_draw(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DPRIMITIVE */
gen6_3DPRIMITIVE(&p->cp->builder, ilo->draw, &ilo->ib);
gen6_3DPRIMITIVE(&p->cp->builder, vec->draw, &vec->ib);
p->state.has_gen6_wa_pipe_control = false;
}
void
gen6_pipeline_vs(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
const bool emit_3dstate_vs = (DIRTY(VS) || DIRTY(SAMPLER_VS) ||
@ -499,9 +498,9 @@ gen6_pipeline_vs(struct ilo_3d_pipeline *p,
/* 3DSTATE_VS */
if (emit_3dstate_vs) {
const int num_samplers = ilo->sampler[PIPE_SHADER_VERTEX].count;
const int num_samplers = vec->sampler[PIPE_SHADER_VERTEX].count;
gen6_3DSTATE_VS(&p->cp->builder, ilo->vs, num_samplers);
gen6_3DSTATE_VS(&p->cp->builder, vec->vs, num_samplers);
}
if (emit_3dstate_constant_vs && ilo_dev_gen(p->dev) == ILO_GEN(6))
@ -510,7 +509,7 @@ gen6_pipeline_vs(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_gs(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_CONSTANT_GS */
@ -522,26 +521,26 @@ gen6_pipeline_gs(struct ilo_3d_pipeline *p,
session->prim_changed || session->kernel_bo_changed) {
const int verts_per_prim = u_vertices_per_prim(session->reduced_prim);
gen6_3DSTATE_GS(&p->cp->builder, ilo->gs, ilo->vs, verts_per_prim);
gen6_3DSTATE_GS(&p->cp->builder, vec->gs, vec->vs, verts_per_prim);
}
}
bool
gen6_pipeline_update_max_svbi(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
if (DIRTY(VS) || DIRTY(GS) || DIRTY(SO)) {
const struct pipe_stream_output_info *so_info =
(ilo->gs) ? ilo_shader_get_kernel_so_info(ilo->gs) :
(ilo->vs) ? ilo_shader_get_kernel_so_info(ilo->vs) : NULL;
(vec->gs) ? ilo_shader_get_kernel_so_info(vec->gs) :
(vec->vs) ? ilo_shader_get_kernel_so_info(vec->vs) : NULL;
unsigned max_svbi = 0xffffffff;
int i;
for (i = 0; i < so_info->num_outputs; i++) {
const int output_buffer = so_info->output[i].output_buffer;
const struct pipe_stream_output_target *so =
ilo->so.states[output_buffer];
vec->so.states[output_buffer];
const int struct_size = so_info->stride[output_buffer] * 4;
const int elem_size = so_info->output[i].num_components * 4;
int buf_size, count;
@ -572,10 +571,10 @@ gen6_pipeline_update_max_svbi(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_gs_svbi(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
const bool emit = gen6_pipeline_update_max_svbi(p, ilo, session);
const bool emit = gen6_pipeline_update_max_svbi(p, vec, session);
/* 3DSTATE_GS_SVB_INDEX */
if (emit) {
@ -608,7 +607,7 @@ gen6_pipeline_gs_svbi(struct ilo_3d_pipeline *p,
void
gen6_pipeline_clip(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_CLIP */
@ -620,34 +619,34 @@ gen6_pipeline_clip(struct ilo_3d_pipeline *p,
* We do not do 2D clipping yet. Guard band test should only be enabled
* when the viewport is larger than the framebuffer.
*/
for (i = 0; i < ilo->viewport.count; i++) {
const struct ilo_viewport_cso *vp = &ilo->viewport.cso[i];
for (i = 0; i < vec->viewport.count; i++) {
const struct ilo_viewport_cso *vp = &vec->viewport.cso[i];
if (vp->min_x > 0.0f || vp->max_x < ilo->fb.state.width ||
vp->min_y > 0.0f || vp->max_y < ilo->fb.state.height) {
if (vp->min_x > 0.0f || vp->max_x < vec->fb.state.width ||
vp->min_y > 0.0f || vp->max_y < vec->fb.state.height) {
enable_guardband = false;
break;
}
}
gen6_3DSTATE_CLIP(&p->cp->builder, ilo->rasterizer,
ilo->fs, enable_guardband, 1);
gen6_3DSTATE_CLIP(&p->cp->builder, vec->rasterizer,
vec->fs, enable_guardband, 1);
}
}
static void
gen6_pipeline_sf(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_SF */
if (DIRTY(RASTERIZER) || DIRTY(FS))
gen6_3DSTATE_SF(&p->cp->builder, ilo->rasterizer, ilo->fs);
gen6_3DSTATE_SF(&p->cp->builder, vec->rasterizer, vec->fs);
}
void
gen6_pipeline_sf_rect(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_DRAWING_RECTANGLE */
@ -656,13 +655,13 @@ gen6_pipeline_sf_rect(struct ilo_3d_pipeline *p,
gen6_wa_pipe_control_post_sync(p, false);
gen6_3DSTATE_DRAWING_RECTANGLE(&p->cp->builder, 0, 0,
ilo->fb.state.width, ilo->fb.state.height);
vec->fb.state.width, vec->fb.state.height);
}
}
static void
gen6_pipeline_wm(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_CONSTANT_PS */
@ -676,29 +675,29 @@ gen6_pipeline_wm(struct ilo_3d_pipeline *p,
/* 3DSTATE_WM */
if (DIRTY(FS) || DIRTY(SAMPLER_FS) || DIRTY(BLEND) || DIRTY(DSA) ||
DIRTY(RASTERIZER) || session->kernel_bo_changed) {
const int num_samplers = ilo->sampler[PIPE_SHADER_FRAGMENT].count;
const bool dual_blend = ilo->blend->dual_blend;
const bool cc_may_kill = (ilo->dsa->dw_alpha ||
ilo->blend->alpha_to_coverage);
const int num_samplers = vec->sampler[PIPE_SHADER_FRAGMENT].count;
const bool dual_blend = vec->blend->dual_blend;
const bool cc_may_kill = (vec->dsa->dw_alpha ||
vec->blend->alpha_to_coverage);
if (ilo_dev_gen(p->dev) == ILO_GEN(6) && session->hw_ctx_changed)
gen6_wa_pipe_control_wm_max_threads_stall(p);
gen6_3DSTATE_WM(&p->cp->builder, ilo->fs, num_samplers,
ilo->rasterizer, dual_blend, cc_may_kill, 0);
gen6_3DSTATE_WM(&p->cp->builder, vec->fs, num_samplers,
vec->rasterizer, dual_blend, cc_may_kill, 0);
}
}
static void
gen6_pipeline_wm_multisample(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_MULTISAMPLE and 3DSTATE_SAMPLE_MASK */
if (DIRTY(SAMPLE_MASK) || DIRTY(FB)) {
const uint32_t *packed_sample_pos;
packed_sample_pos = (ilo->fb.num_samples > 1) ?
packed_sample_pos = (vec->fb.num_samples > 1) ?
&p->packed_sample_position_4x : &p->packed_sample_position_1x;
if (ilo_dev_gen(p->dev) == ILO_GEN(6)) {
@ -707,17 +706,17 @@ gen6_pipeline_wm_multisample(struct ilo_3d_pipeline *p,
}
gen6_3DSTATE_MULTISAMPLE(&p->cp->builder,
ilo->fb.num_samples, packed_sample_pos,
ilo->rasterizer->state.half_pixel_center);
vec->fb.num_samples, packed_sample_pos,
vec->rasterizer->state.half_pixel_center);
gen6_3DSTATE_SAMPLE_MASK(&p->cp->builder,
(ilo->fb.num_samples > 1) ? ilo->sample_mask : 0x1);
(vec->fb.num_samples > 1) ? vec->sample_mask : 0x1);
}
}
static void
gen6_pipeline_wm_depth(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_DEPTH_BUFFER and 3DSTATE_CLEAR_PARAMS */
@ -725,9 +724,9 @@ gen6_pipeline_wm_depth(struct ilo_3d_pipeline *p,
const struct ilo_zs_surface *zs;
uint32_t clear_params;
if (ilo->fb.state.zsbuf) {
if (vec->fb.state.zsbuf) {
const struct ilo_surface_cso *surface =
(const struct ilo_surface_cso *) ilo->fb.state.zsbuf;
(const struct ilo_surface_cso *) vec->fb.state.zsbuf;
const struct ilo_texture_slice *slice =
ilo_texture_get_slice(ilo_texture(surface->base.texture),
surface->base.u.tex.level, surface->base.u.tex.first_layer);
@ -738,7 +737,7 @@ gen6_pipeline_wm_depth(struct ilo_3d_pipeline *p,
clear_params = slice->clear_value;
}
else {
zs = &ilo->fb.null_zs;
zs = &vec->fb.null_zs;
clear_params = 0;
}
@ -756,33 +755,33 @@ gen6_pipeline_wm_depth(struct ilo_3d_pipeline *p,
void
gen6_pipeline_wm_raster(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_POLY_STIPPLE_PATTERN and 3DSTATE_POLY_STIPPLE_OFFSET */
if ((DIRTY(RASTERIZER) || DIRTY(POLY_STIPPLE)) &&
ilo->rasterizer->state.poly_stipple_enable) {
vec->rasterizer->state.poly_stipple_enable) {
if (ilo_dev_gen(p->dev) == ILO_GEN(6))
gen6_wa_pipe_control_post_sync(p, false);
gen6_3DSTATE_POLY_STIPPLE_PATTERN(&p->cp->builder,
&ilo->poly_stipple);
&vec->poly_stipple);
gen6_3DSTATE_POLY_STIPPLE_OFFSET(&p->cp->builder, 0, 0);
}
/* 3DSTATE_LINE_STIPPLE */
if (DIRTY(RASTERIZER) && ilo->rasterizer->state.line_stipple_enable) {
if (DIRTY(RASTERIZER) && vec->rasterizer->state.line_stipple_enable) {
if (ilo_dev_gen(p->dev) == ILO_GEN(6))
gen6_wa_pipe_control_post_sync(p, false);
gen6_3DSTATE_LINE_STIPPLE(&p->cp->builder,
ilo->rasterizer->state.line_stipple_pattern,
ilo->rasterizer->state.line_stipple_factor + 1);
vec->rasterizer->state.line_stipple_pattern,
vec->rasterizer->state.line_stipple_factor + 1);
}
/* 3DSTATE_AA_LINE_PARAMETERS */
if (DIRTY(RASTERIZER) && ilo->rasterizer->state.line_smooth) {
if (DIRTY(RASTERIZER) && vec->rasterizer->state.line_smooth) {
if (ilo_dev_gen(p->dev) == ILO_GEN(6))
gen6_wa_pipe_control_post_sync(p, false);
@ -792,29 +791,29 @@ gen6_pipeline_wm_raster(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_state_viewports(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* SF_CLIP_VIEWPORT and CC_VIEWPORT */
if (ilo_dev_gen(p->dev) >= ILO_GEN(7) && DIRTY(VIEWPORT)) {
p->state.SF_CLIP_VIEWPORT = gen7_SF_CLIP_VIEWPORT(&p->cp->builder,
ilo->viewport.cso, ilo->viewport.count);
vec->viewport.cso, vec->viewport.count);
p->state.CC_VIEWPORT = gen6_CC_VIEWPORT(&p->cp->builder,
ilo->viewport.cso, ilo->viewport.count);
vec->viewport.cso, vec->viewport.count);
session->viewport_state_changed = true;
}
/* SF_VIEWPORT, CLIP_VIEWPORT, and CC_VIEWPORT */
else if (DIRTY(VIEWPORT)) {
p->state.CLIP_VIEWPORT = gen6_CLIP_VIEWPORT(&p->cp->builder,
ilo->viewport.cso, ilo->viewport.count);
vec->viewport.cso, vec->viewport.count);
p->state.SF_VIEWPORT = gen6_SF_VIEWPORT(&p->cp->builder,
ilo->viewport.cso, ilo->viewport.count);
vec->viewport.cso, vec->viewport.count);
p->state.CC_VIEWPORT = gen6_CC_VIEWPORT(&p->cp->builder,
ilo->viewport.cso, ilo->viewport.count);
vec->viewport.cso, vec->viewport.count);
session->viewport_state_changed = true;
}
@ -822,13 +821,13 @@ gen6_pipeline_state_viewports(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_state_cc(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* BLEND_STATE */
if (DIRTY(BLEND) || DIRTY(FB) || DIRTY(DSA)) {
p->state.BLEND_STATE = gen6_BLEND_STATE(&p->cp->builder,
ilo->blend, &ilo->fb, ilo->dsa);
vec->blend, &vec->fb, vec->dsa);
session->cc_state_blend_changed = true;
}
@ -836,8 +835,8 @@ gen6_pipeline_state_cc(struct ilo_3d_pipeline *p,
/* COLOR_CALC_STATE */
if (DIRTY(DSA) || DIRTY(STENCIL_REF) || DIRTY(BLEND_COLOR)) {
p->state.COLOR_CALC_STATE =
gen6_COLOR_CALC_STATE(&p->cp->builder, &ilo->stencil_ref,
ilo->dsa->alpha_ref, &ilo->blend_color);
gen6_COLOR_CALC_STATE(&p->cp->builder, &vec->stencil_ref,
vec->dsa->alpha_ref, &vec->blend_color);
session->cc_state_cc_changed = true;
}
@ -845,7 +844,7 @@ gen6_pipeline_state_cc(struct ilo_3d_pipeline *p,
/* DEPTH_STENCIL_STATE */
if (DIRTY(DSA)) {
p->state.DEPTH_STENCIL_STATE =
gen6_DEPTH_STENCIL_STATE(&p->cp->builder, ilo->dsa);
gen6_DEPTH_STENCIL_STATE(&p->cp->builder, vec->dsa);
session->cc_state_dsa_changed = true;
}
@ -853,14 +852,14 @@ gen6_pipeline_state_cc(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_state_scissors(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* SCISSOR_RECT */
if (DIRTY(SCISSOR) || DIRTY(VIEWPORT)) {
/* there should be as many scissors as there are viewports */
p->state.SCISSOR_RECT = gen6_SCISSOR_RECT(&p->cp->builder,
&ilo->scissor, ilo->viewport.count);
&vec->scissor, vec->viewport.count);
session->scissor_state_changed = true;
}
@ -868,12 +867,12 @@ gen6_pipeline_state_scissors(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_state_surfaces_rt(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* SURFACE_STATEs for render targets */
if (DIRTY(FB)) {
const struct ilo_fb_state *fb = &ilo->fb;
const struct ilo_fb_state *fb = &vec->fb;
const int offset = ILO_WM_DRAW_SURFACE(0);
uint32_t *surface_state = &p->state.wm.SURFACE_STATE[offset];
int i;
@ -915,10 +914,10 @@ gen6_pipeline_state_surfaces_rt(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_state_surfaces_so(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
const struct ilo_so_state *so = &ilo->so;
const struct ilo_so_state *so = &vec->so;
if (ilo_dev_gen(p->dev) != ILO_GEN(6))
return;
@ -926,8 +925,8 @@ gen6_pipeline_state_surfaces_so(struct ilo_3d_pipeline *p,
/* SURFACE_STATEs for stream output targets */
if (DIRTY(VS) || DIRTY(GS) || DIRTY(SO)) {
const struct pipe_stream_output_info *so_info =
(ilo->gs) ? ilo_shader_get_kernel_so_info(ilo->gs) :
(ilo->vs) ? ilo_shader_get_kernel_so_info(ilo->vs) : NULL;
(vec->gs) ? ilo_shader_get_kernel_so_info(vec->gs) :
(vec->vs) ? ilo_shader_get_kernel_so_info(vec->vs) : NULL;
const int offset = ILO_GS_SO_SURFACE(0);
uint32_t *surface_state = &p->state.gs.SURFACE_STATE[offset];
int i;
@ -957,11 +956,11 @@ gen6_pipeline_state_surfaces_so(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_state_surfaces_view(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
int shader_type,
struct gen6_pipeline_session *session)
{
const struct ilo_view_state *view = &ilo->view[shader_type];
const struct ilo_view_state *view = &vec->view[shader_type];
uint32_t *surface_state;
int offset, i;
bool skip = false;
@ -1019,11 +1018,11 @@ gen6_pipeline_state_surfaces_view(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_state_surfaces_const(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
int shader_type,
struct gen6_pipeline_session *session)
{
const struct ilo_cbuf_state *cbuf = &ilo->cbuf[shader_type];
const struct ilo_cbuf_state *cbuf = &vec->cbuf[shader_type];
uint32_t *surface_state;
bool *binding_table_changed;
int offset, count, i;
@ -1075,7 +1074,7 @@ gen6_pipeline_state_surfaces_const(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_state_binding_tables(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
int shader_type,
struct gen6_pipeline_session *session)
{
@ -1134,16 +1133,16 @@ gen6_pipeline_state_binding_tables(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_state_samplers(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
int shader_type,
struct gen6_pipeline_session *session)
{
const struct ilo_sampler_cso * const *samplers =
ilo->sampler[shader_type].cso;
vec->sampler[shader_type].cso;
const struct pipe_sampler_view * const *views =
(const struct pipe_sampler_view **) ilo->view[shader_type].states;
const int num_samplers = ilo->sampler[shader_type].count;
const int num_views = ilo->view[shader_type].count;
(const struct pipe_sampler_view **) vec->view[shader_type].states;
const int num_samplers = vec->sampler[shader_type].count;
const int num_views = vec->view[shader_type].count;
uint32_t *sampler_state, *border_color_state;
bool emit_border_color = false;
bool skip = false;
@ -1204,16 +1203,16 @@ gen6_pipeline_state_samplers(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_state_pcb(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* push constant buffer for VS */
if (DIRTY(VS) || DIRTY(CBUF) || DIRTY(CLIP)) {
const int cbuf0_size = (ilo->vs) ?
ilo_shader_get_kernel_param(ilo->vs,
const int cbuf0_size = (vec->vs) ?
ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_PCB_CBUF0_SIZE) : 0;
const int clip_state_size = (ilo->vs) ?
ilo_shader_get_kernel_param(ilo->vs,
const int clip_state_size = (vec->vs) ?
ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_VS_PCB_UCP_SIZE) : 0;
const int total_size = cbuf0_size + clip_state_size;
@ -1226,7 +1225,7 @@ gen6_pipeline_state_pcb(struct ilo_3d_pipeline *p,
if (cbuf0_size) {
const struct ilo_cbuf_state *cbuf =
&ilo->cbuf[PIPE_SHADER_VERTEX];
&vec->cbuf[PIPE_SHADER_VERTEX];
if (cbuf0_size <= cbuf->cso[0].user_buffer_size) {
memcpy(pcb, cbuf->cso[0].user_buffer, cbuf0_size);
@ -1242,7 +1241,7 @@ gen6_pipeline_state_pcb(struct ilo_3d_pipeline *p,
}
if (clip_state_size)
memcpy(pcb, &ilo->clip, clip_state_size);
memcpy(pcb, &vec->clip, clip_state_size);
session->pcb_state_vs_changed = true;
}
@ -1256,11 +1255,11 @@ gen6_pipeline_state_pcb(struct ilo_3d_pipeline *p,
/* push constant buffer for FS */
if (DIRTY(FS) || DIRTY(CBUF)) {
const int cbuf0_size = (ilo->fs) ?
ilo_shader_get_kernel_param(ilo->fs, ILO_KERNEL_PCB_CBUF0_SIZE) : 0;
const int cbuf0_size = (vec->fs) ?
ilo_shader_get_kernel_param(vec->fs, ILO_KERNEL_PCB_CBUF0_SIZE) : 0;
if (cbuf0_size) {
const struct ilo_cbuf_state *cbuf = &ilo->cbuf[PIPE_SHADER_FRAGMENT];
const struct ilo_cbuf_state *cbuf = &vec->cbuf[PIPE_SHADER_FRAGMENT];
void *pcb;
p->state.wm.PUSH_CONSTANT_BUFFER =
@ -1292,7 +1291,7 @@ gen6_pipeline_state_pcb(struct ilo_3d_pipeline *p,
static void
gen6_pipeline_commands(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/*
@ -1300,66 +1299,66 @@ gen6_pipeline_commands(struct ilo_3d_pipeline *p,
* that of the classic i965 driver. It allows us to compare the command
* streams easily.
*/
gen6_pipeline_common_select(p, ilo, session);
gen6_pipeline_gs_svbi(p, ilo, session);
gen6_pipeline_common_sip(p, ilo, session);
gen6_pipeline_vf_statistics(p, ilo, session);
gen6_pipeline_common_base_address(p, ilo, session);
gen6_pipeline_common_pointers_1(p, ilo, session);
gen6_pipeline_common_urb(p, ilo, session);
gen6_pipeline_common_pointers_2(p, ilo, session);
gen6_pipeline_wm_multisample(p, ilo, session);
gen6_pipeline_vs(p, ilo, session);
gen6_pipeline_gs(p, ilo, session);
gen6_pipeline_clip(p, ilo, session);
gen6_pipeline_sf(p, ilo, session);
gen6_pipeline_wm(p, ilo, session);
gen6_pipeline_common_pointers_3(p, ilo, session);
gen6_pipeline_wm_depth(p, ilo, session);
gen6_pipeline_wm_raster(p, ilo, session);
gen6_pipeline_sf_rect(p, ilo, session);
gen6_pipeline_vf(p, ilo, session);
gen6_pipeline_vf_draw(p, ilo, session);
gen6_pipeline_common_select(p, vec, session);
gen6_pipeline_gs_svbi(p, vec, session);
gen6_pipeline_common_sip(p, vec, session);
gen6_pipeline_vf_statistics(p, vec, session);
gen6_pipeline_common_base_address(p, vec, session);
gen6_pipeline_common_pointers_1(p, vec, session);
gen6_pipeline_common_urb(p, vec, session);
gen6_pipeline_common_pointers_2(p, vec, session);
gen6_pipeline_wm_multisample(p, vec, session);
gen6_pipeline_vs(p, vec, session);
gen6_pipeline_gs(p, vec, session);
gen6_pipeline_clip(p, vec, session);
gen6_pipeline_sf(p, vec, session);
gen6_pipeline_wm(p, vec, session);
gen6_pipeline_common_pointers_3(p, vec, session);
gen6_pipeline_wm_depth(p, vec, session);
gen6_pipeline_wm_raster(p, vec, session);
gen6_pipeline_sf_rect(p, vec, session);
gen6_pipeline_vf(p, vec, session);
gen6_pipeline_vf_draw(p, vec, session);
}
void
gen6_pipeline_states(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
int shader_type;
gen6_pipeline_state_viewports(p, ilo, session);
gen6_pipeline_state_cc(p, ilo, session);
gen6_pipeline_state_scissors(p, ilo, session);
gen6_pipeline_state_pcb(p, ilo, session);
gen6_pipeline_state_viewports(p, vec, session);
gen6_pipeline_state_cc(p, vec, session);
gen6_pipeline_state_scissors(p, vec, session);
gen6_pipeline_state_pcb(p, vec, session);
/*
* upload all SURAFCE_STATEs together so that we know there are minimal
* paddings
*/
gen6_pipeline_state_surfaces_rt(p, ilo, session);
gen6_pipeline_state_surfaces_so(p, ilo, session);
gen6_pipeline_state_surfaces_rt(p, vec, session);
gen6_pipeline_state_surfaces_so(p, vec, session);
for (shader_type = 0; shader_type < PIPE_SHADER_TYPES; shader_type++) {
gen6_pipeline_state_surfaces_view(p, ilo, shader_type, session);
gen6_pipeline_state_surfaces_const(p, ilo, shader_type, session);
gen6_pipeline_state_surfaces_view(p, vec, shader_type, session);
gen6_pipeline_state_surfaces_const(p, vec, shader_type, session);
}
for (shader_type = 0; shader_type < PIPE_SHADER_TYPES; shader_type++) {
gen6_pipeline_state_samplers(p, ilo, shader_type, session);
gen6_pipeline_state_samplers(p, vec, shader_type, session);
/* this must be called after all SURFACE_STATEs are uploaded */
gen6_pipeline_state_binding_tables(p, ilo, shader_type, session);
gen6_pipeline_state_binding_tables(p, vec, shader_type, session);
}
}
void
gen6_pipeline_prepare(const struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
memset(session, 0, sizeof(*session));
session->pipe_dirty = ilo->dirty;
session->reduced_prim = u_reduced_prim(ilo->draw->mode);
session->pipe_dirty = vec->dirty;
session->reduced_prim = u_reduced_prim(vec->draw->mode);
/* available space before the session */
session->init_cp_space = ilo_cp_space(p->cp);
@ -1394,58 +1393,58 @@ gen6_pipeline_prepare(const struct ilo_3d_pipeline *p,
(p->invalidate_flags & ILO_3D_PIPELINE_INVALIDATE_KERNEL_BO);
session->prim_changed = (p->state.reduced_prim != session->reduced_prim);
session->primitive_restart_changed =
(p->state.primitive_restart != ilo->draw->primitive_restart);
(p->state.primitive_restart != vec->draw->primitive_restart);
}
}
void
gen6_pipeline_draw(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* force all states to be uploaded if the state bo changed */
if (session->state_bo_changed)
session->pipe_dirty = ILO_DIRTY_ALL;
else
session->pipe_dirty = ilo->dirty;
session->pipe_dirty = vec->dirty;
session->emit_draw_states(p, ilo, session);
session->emit_draw_states(p, vec, session);
/* force all commands to be uploaded if the HW context changed */
if (session->hw_ctx_changed)
session->pipe_dirty = ILO_DIRTY_ALL;
else
session->pipe_dirty = ilo->dirty;
session->pipe_dirty = vec->dirty;
session->emit_draw_commands(p, ilo, session);
session->emit_draw_commands(p, vec, session);
}
void
gen6_pipeline_end(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* sanity check size estimation */
assert(session->init_cp_space - ilo_cp_space(p->cp) <=
ilo_3d_pipeline_estimate_size(p, ILO_3D_PIPELINE_DRAW, ilo));
ilo_3d_pipeline_estimate_size(p, ILO_3D_PIPELINE_DRAW, vec));
p->state.reduced_prim = session->reduced_prim;
p->state.primitive_restart = ilo->draw->primitive_restart;
p->state.primitive_restart = vec->draw->primitive_restart;
}
static void
ilo_3d_pipeline_emit_draw_gen6(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo)
const struct ilo_state_vector *vec)
{
struct gen6_pipeline_session session;
gen6_pipeline_prepare(p, ilo, &session);
gen6_pipeline_prepare(p, vec, &session);
session.emit_draw_states = gen6_pipeline_states;
session.emit_draw_commands = gen6_pipeline_commands;
gen6_pipeline_draw(p, ilo, &session);
gen6_pipeline_end(p, ilo, &session);
gen6_pipeline_draw(p, vec, &session);
gen6_pipeline_end(p, vec, &session);
}
void
@ -1748,7 +1747,7 @@ gen6_pipeline_max_command_size(const struct ilo_3d_pipeline *p)
int
gen6_pipeline_estimate_state_size(const struct ilo_3d_pipeline *p,
const struct ilo_context *ilo)
const struct ilo_state_vector *vec)
{
static int static_size;
int sh_type, size;
@ -1790,35 +1789,35 @@ gen6_pipeline_estimate_state_size(const struct ilo_3d_pipeline *p,
int num_samplers, num_surfaces, pcb_size;
/* samplers */
num_samplers = ilo->sampler[sh_type].count;
num_samplers = vec->sampler[sh_type].count;
/* sampler views and constant buffers */
num_surfaces = ilo->view[sh_type].count +
util_bitcount(ilo->cbuf[sh_type].enabled_mask);
num_surfaces = vec->view[sh_type].count +
util_bitcount(vec->cbuf[sh_type].enabled_mask);
pcb_size = 0;
switch (sh_type) {
case PIPE_SHADER_VERTEX:
if (ilo->vs) {
if (vec->vs) {
if (ilo_dev_gen(p->dev) == ILO_GEN(6)) {
const struct pipe_stream_output_info *so_info =
ilo_shader_get_kernel_so_info(ilo->vs);
ilo_shader_get_kernel_so_info(vec->vs);
/* stream outputs */
num_surfaces += so_info->num_outputs;
}
pcb_size = ilo_shader_get_kernel_param(ilo->vs,
pcb_size = ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_PCB_CBUF0_SIZE);
pcb_size += ilo_shader_get_kernel_param(ilo->vs,
pcb_size += ilo_shader_get_kernel_param(vec->vs,
ILO_KERNEL_VS_PCB_UCP_SIZE);
}
break;
case PIPE_SHADER_GEOMETRY:
if (ilo->gs && ilo_dev_gen(p->dev) == ILO_GEN(6)) {
if (vec->gs && ilo_dev_gen(p->dev) == ILO_GEN(6)) {
const struct pipe_stream_output_info *so_info =
ilo_shader_get_kernel_so_info(ilo->gs);
ilo_shader_get_kernel_so_info(vec->gs);
/* stream outputs */
num_surfaces += so_info->num_outputs;
@ -1826,10 +1825,10 @@ gen6_pipeline_estimate_state_size(const struct ilo_3d_pipeline *p,
break;
case PIPE_SHADER_FRAGMENT:
/* render targets */
num_surfaces += ilo->fb.state.nr_cbufs;
num_surfaces += vec->fb.state.nr_cbufs;
if (ilo->fs) {
pcb_size = ilo_shader_get_kernel_param(ilo->fs,
if (vec->fs) {
pcb_size = ilo_shader_get_kernel_param(vec->fs,
ILO_KERNEL_PCB_CBUF0_SIZE);
}
break;
@ -1867,7 +1866,7 @@ ilo_3d_pipeline_estimate_size_gen6(struct ilo_3d_pipeline *p,
switch (action) {
case ILO_3D_PIPELINE_DRAW:
{
const struct ilo_context *ilo = arg;
const struct ilo_state_vector *ilo = arg;
size = gen6_pipeline_max_command_size(p) +
gen6_pipeline_estimate_state_size(p, ilo);

36
src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.h
View file

@ -31,7 +31,7 @@
#include "ilo_common.h"
struct ilo_3d_pipeline;
struct ilo_context;
struct ilo_state_vector;
struct gen6_pipeline_session {
uint32_t pipe_dirty;
@ -47,11 +47,11 @@ struct gen6_pipeline_session {
bool primitive_restart_changed;
void (*emit_draw_states)(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void (*emit_draw_commands)(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
/* indirect states */
@ -81,77 +81,77 @@ struct gen6_rectlist_session {
void
gen6_pipeline_prepare(const struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_draw(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_end(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_common_select(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_common_sip(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_common_base_address(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_vf(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_vf_statistics(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_vs(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_clip(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_sf_rect(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_wm_raster(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
void
gen6_pipeline_states(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
bool
gen6_pipeline_update_max_svbi(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *ilo,
struct gen6_pipeline_session *session);
int
gen6_pipeline_estimate_state_size(const struct ilo_3d_pipeline *p,
const struct ilo_context *ilo);
const struct ilo_state_vector *ilo);
void
ilo_3d_pipeline_emit_flush_gen6(struct ilo_3d_pipeline *p);

159
src/gallium/drivers/ilo/ilo_3d_pipeline_gen7.c
View file

@ -31,7 +31,6 @@
#include "ilo_blitter.h"
#include "ilo_builder_3d.h"
#include "ilo_builder_render.h"
#include "ilo_context.h"
#include "ilo_cp.h"
#include "ilo_shader.h"
#include "ilo_state.h"
@ -187,7 +186,7 @@ gen7_wa_pipe_control_ps_max_threads_stall(struct ilo_3d_pipeline *p)
static void
gen7_pipeline_common_urb(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_URB_{VS,GS,HS,DS} */
@ -197,8 +196,8 @@ gen7_pipeline_common_urb(struct ilo_3d_pipeline *p,
p->dev->gt == 3) ? 32768 : 16384;
int vs_entry_size, vs_total_size;
vs_entry_size = (ilo->vs) ?
ilo_shader_get_kernel_param(ilo->vs, ILO_KERNEL_OUTPUT_COUNT) : 0;
vs_entry_size = (vec->vs) ?
ilo_shader_get_kernel_param(vec->vs, ILO_KERNEL_OUTPUT_COUNT) : 0;
/*
* From the Ivy Bridge PRM, volume 2 part 1, page 35:
@ -208,11 +207,11 @@ gen7_pipeline_common_urb(struct ilo_3d_pipeline *p,
* Allocation Size must be sized to the maximum of the vertex input
* and output structures."
*/
if (vs_entry_size < ilo->ve->count)
vs_entry_size = ilo->ve->count;
if (vs_entry_size < vec->ve->count)
vs_entry_size = vec->ve->count;
vs_entry_size *= sizeof(float) * 4;
vs_total_size = ilo->dev->urb_size - offset;
vs_total_size = p->dev->urb_size - offset;
gen7_wa_pipe_control_vs_depth_stall(p);
@ -227,7 +226,7 @@ gen7_pipeline_common_urb(struct ilo_3d_pipeline *p,
static void
gen7_pipeline_common_pcb_alloc(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_PUSH_CONSTANT_ALLOC_{VS,PS} */
@ -253,7 +252,7 @@ gen7_pipeline_common_pcb_alloc(struct ilo_3d_pipeline *p,
static void
gen7_pipeline_common_pointers_1(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_VIEWPORT_STATE_POINTERS_{CC,SF_CLIP} */
@ -268,7 +267,7 @@ gen7_pipeline_common_pointers_1(struct ilo_3d_pipeline *p,
static void
gen7_pipeline_common_pointers_2(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_BLEND_STATE_POINTERS */
@ -292,7 +291,7 @@ gen7_pipeline_common_pointers_2(struct ilo_3d_pipeline *p,
static void
gen7_pipeline_vs(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
const bool emit_3dstate_binding_table = session->binding_table_vs_changed;
@ -329,15 +328,15 @@ gen7_pipeline_vs(struct ilo_3d_pipeline *p,
/* 3DSTATE_VS */
if (emit_3dstate_vs) {
const int num_samplers = ilo->sampler[PIPE_SHADER_VERTEX].count;
const int num_samplers = vec->sampler[PIPE_SHADER_VERTEX].count;
gen6_3DSTATE_VS(&p->cp->builder, ilo->vs, num_samplers);
gen6_3DSTATE_VS(&p->cp->builder, vec->vs, num_samplers);
}
}
static void
gen7_pipeline_hs(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_CONSTANT_HS and 3DSTATE_HS */
@ -353,7 +352,7 @@ gen7_pipeline_hs(struct ilo_3d_pipeline *p,
static void
gen7_pipeline_te(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_TE */
@ -363,7 +362,7 @@ gen7_pipeline_te(struct ilo_3d_pipeline *p,
static void
gen7_pipeline_ds(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_CONSTANT_DS and 3DSTATE_DS */
@ -380,7 +379,7 @@ gen7_pipeline_ds(struct ilo_3d_pipeline *p,
static void
gen7_pipeline_gs(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_CONSTANT_GS and 3DSTATE_GS */
@ -398,37 +397,37 @@ gen7_pipeline_gs(struct ilo_3d_pipeline *p,
static void
gen7_pipeline_sol(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
const struct pipe_stream_output_info *so_info;
const struct ilo_shader_state *shader;
bool dirty_sh = false;
if (ilo->gs) {
shader = ilo->gs;
if (vec->gs) {
shader = vec->gs;
dirty_sh = DIRTY(GS);
}
else {
shader = ilo->vs;
shader = vec->vs;
dirty_sh = DIRTY(VS);
}
so_info = ilo_shader_get_kernel_so_info(shader);
gen6_pipeline_update_max_svbi(p, ilo, session);
gen6_pipeline_update_max_svbi(p, vec, session);
/* 3DSTATE_SO_BUFFER */
if ((DIRTY(SO) || dirty_sh || session->batch_bo_changed) &&
ilo->so.enabled) {
vec->so.enabled) {
int i;
for (i = 0; i < ilo->so.count; i++) {
for (i = 0; i < vec->so.count; i++) {
const int stride = so_info->stride[i] * 4; /* in bytes */
int base = 0;
gen7_3DSTATE_SO_BUFFER(&p->cp->builder, i, base, stride,
ilo->so.states[i]);
vec->so.states[i]);
}
for (; i < 4; i++)
@ -436,51 +435,51 @@ gen7_pipeline_sol(struct ilo_3d_pipeline *p,
}
/* 3DSTATE_SO_DECL_LIST */
if (dirty_sh && ilo->so.enabled)
if (dirty_sh && vec->so.enabled)
gen7_3DSTATE_SO_DECL_LIST(&p->cp->builder, so_info);
/* 3DSTATE_STREAMOUT */
if (DIRTY(SO) || DIRTY(RASTERIZER) || dirty_sh) {
const unsigned buffer_mask = (1 << ilo->so.count) - 1;
const unsigned buffer_mask = (1 << vec->so.count) - 1;
const int output_count = ilo_shader_get_kernel_param(shader,
ILO_KERNEL_OUTPUT_COUNT);
gen7_3DSTATE_STREAMOUT(&p->cp->builder, buffer_mask, output_count,
ilo->rasterizer->state.rasterizer_discard);
vec->rasterizer->state.rasterizer_discard);
}
}
static void
gen7_pipeline_sf(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_SBE */
if (DIRTY(RASTERIZER) || DIRTY(FS))
gen7_3DSTATE_SBE(&p->cp->builder, ilo->rasterizer, ilo->fs);
gen7_3DSTATE_SBE(&p->cp->builder, vec->rasterizer, vec->fs);
/* 3DSTATE_SF */
if (DIRTY(RASTERIZER) || DIRTY(FB)) {
struct pipe_surface *zs = ilo->fb.state.zsbuf;
struct pipe_surface *zs = vec->fb.state.zsbuf;
gen7_wa_pipe_control_cs_stall(p, true, true);
gen7_3DSTATE_SF(&p->cp->builder, ilo->rasterizer,
gen7_3DSTATE_SF(&p->cp->builder, vec->rasterizer,
(zs) ? zs->format : PIPE_FORMAT_NONE);
}
}
static void
gen7_pipeline_wm(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_WM */
if (DIRTY(FS) || DIRTY(BLEND) || DIRTY(DSA) || DIRTY(RASTERIZER)) {
const bool cc_may_kill = (ilo->dsa->dw_alpha ||
ilo->blend->alpha_to_coverage);
const bool cc_may_kill = (vec->dsa->dw_alpha ||
vec->blend->alpha_to_coverage);
gen7_3DSTATE_WM(&p->cp->builder, ilo->fs,
ilo->rasterizer, cc_may_kill, 0);
gen7_3DSTATE_WM(&p->cp->builder, vec->fs,
vec->rasterizer, cc_may_kill, 0);
}
/* 3DSTATE_BINDING_TABLE_POINTERS_PS */
@ -506,15 +505,15 @@ gen7_pipeline_wm(struct ilo_3d_pipeline *p,
/* 3DSTATE_PS */
if (DIRTY(FS) || DIRTY(SAMPLER_FS) || DIRTY(BLEND) ||
session->kernel_bo_changed) {
const int num_samplers = ilo->sampler[PIPE_SHADER_FRAGMENT].count;
const bool dual_blend = ilo->blend->dual_blend;
const int num_samplers = vec->sampler[PIPE_SHADER_FRAGMENT].count;
const bool dual_blend = vec->blend->dual_blend;
if ((ilo_dev_gen(p->dev) == ILO_GEN(7) ||
ilo_dev_gen(p->dev) == ILO_GEN(7.5)) &&
session->hw_ctx_changed)
gen7_wa_pipe_control_ps_max_threads_stall(p);
gen7_3DSTATE_PS(&p->cp->builder, ilo->fs, num_samplers, dual_blend);
gen7_3DSTATE_PS(&p->cp->builder, vec->fs, num_samplers, dual_blend);
}
/* 3DSTATE_SCISSOR_STATE_POINTERS */
@ -547,9 +546,9 @@ gen7_pipeline_wm(struct ilo_3d_pipeline *p,
const struct ilo_zs_surface *zs;
uint32_t clear_params;
if (ilo->fb.state.zsbuf) {
if (vec->fb.state.zsbuf) {
const struct ilo_surface_cso *surface =
(const struct ilo_surface_cso *) ilo->fb.state.zsbuf;
(const struct ilo_surface_cso *) vec->fb.state.zsbuf;
const struct ilo_texture_slice *slice =
ilo_texture_get_slice(ilo_texture(surface->base.texture),
surface->base.u.tex.level, surface->base.u.tex.first_layer);
@ -559,7 +558,7 @@ gen7_pipeline_wm(struct ilo_3d_pipeline *p,
clear_params = slice->clear_value;
}
else {
zs = &ilo->fb.null_zs;
zs = &vec->fb.null_zs;
clear_params = 0;
}
@ -572,7 +571,7 @@ gen7_pipeline_wm(struct ilo_3d_pipeline *p,
static void
gen7_pipeline_wm_multisample(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DSTATE_MULTISAMPLE and 3DSTATE_SAMPLE_MASK */
@ -582,33 +581,33 @@ gen7_pipeline_wm_multisample(struct ilo_3d_pipeline *p,
gen7_wa_pipe_control_cs_stall(p, true, true);
packed_sample_pos =
(ilo->fb.num_samples > 4) ? p->packed_sample_position_8x :
(ilo->fb.num_samples > 1) ? &p->packed_sample_position_4x :
(vec->fb.num_samples > 4) ? p->packed_sample_position_8x :
(vec->fb.num_samples > 1) ? &p->packed_sample_position_4x :
&p->packed_sample_position_1x;
gen6_3DSTATE_MULTISAMPLE(&p->cp->builder,
ilo->fb.num_samples, packed_sample_pos,
ilo->rasterizer->state.half_pixel_center);
vec->fb.num_samples, packed_sample_pos,
vec->rasterizer->state.half_pixel_center);
gen7_3DSTATE_SAMPLE_MASK(&p->cp->builder,
(ilo->fb.num_samples > 1) ? ilo->sample_mask : 0x1,
ilo->fb.num_samples);
(vec->fb.num_samples > 1) ? vec->sample_mask : 0x1,
vec->fb.num_samples);
}
}
static void
gen7_pipeline_vf_draw(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/* 3DPRIMITIVE */
gen7_3DPRIMITIVE(&p->cp->builder, ilo->draw, &ilo->ib);
gen7_3DPRIMITIVE(&p->cp->builder, vec->draw, &vec->ib);
p->state.has_gen6_wa_pipe_control = false;
}
static void
gen7_pipeline_commands(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
struct gen6_pipeline_session *session)
{
/*
@ -616,43 +615,43 @@ gen7_pipeline_commands(struct ilo_3d_pipeline *p,
* that of the classic i965 driver. It allows us to compare the command
* streams easily.
*/
gen6_pipeline_common_select(p, ilo, session);
gen6_pipeline_common_sip(p, ilo, session);
gen6_pipeline_vf_statistics(p, ilo, session);
gen7_pipeline_common_pcb_alloc(p, ilo, session);
gen6_pipeline_common_base_address(p, ilo, session);
gen7_pipeline_common_pointers_1(p, ilo, session);
gen7_pipeline_common_urb(p, ilo, session);
gen7_pipeline_common_pointers_2(p, ilo, session);
gen7_pipeline_wm_multisample(p, ilo, session);
gen7_pipeline_gs(p, ilo, session);
gen7_pipeline_hs(p, ilo, session);
gen7_pipeline_te(p, ilo, session);
gen7_pipeline_ds(p, ilo, session);
gen7_pipeline_vs(p, ilo, session);
gen7_pipeline_sol(p, ilo, session);
gen6_pipeline_clip(p, ilo, session);
gen7_pipeline_sf(p, ilo, session);
gen7_pipeline_wm(p, ilo, session);
gen6_pipeline_wm_raster(p, ilo, session);
gen6_pipeline_sf_rect(p, ilo, session);
gen6_pipeline_vf(p, ilo, session);
gen7_pipeline_vf_draw(p, ilo, session);
gen6_pipeline_common_select(p, vec, session);
gen6_pipeline_common_sip(p, vec, session);
gen6_pipeline_vf_statistics(p, vec, session);
gen7_pipeline_common_pcb_alloc(p, vec, session);
gen6_pipeline_common_base_address(p, vec, session);
gen7_pipeline_common_pointers_1(p, vec, session);
gen7_pipeline_common_urb(p, vec, session);
gen7_pipeline_common_pointers_2(p, vec, session);
gen7_pipeline_wm_multisample(p, vec, session);
gen7_pipeline_gs(p, vec, session);
gen7_pipeline_hs(p, vec, session);
gen7_pipeline_te(p, vec, session);
gen7_pipeline_ds(p, vec, session);
gen7_pipeline_vs(p, vec, session);
gen7_pipeline_sol(p, vec, session);
gen6_pipeline_clip(p, vec, session);
gen7_pipeline_sf(p, vec, session);
gen7_pipeline_wm(p, vec, session);
gen6_pipeline_wm_raster(p, vec, session);
gen6_pipeline_sf_rect(p, vec, session);
gen6_pipeline_vf(p, vec, session);
gen7_pipeline_vf_draw(p, vec, session);
}
static void
ilo_3d_pipeline_emit_draw_gen7(struct ilo_3d_pipeline *p,
const struct ilo_context *ilo)
const struct ilo_state_vector *vec)
{
struct gen6_pipeline_session session;
gen6_pipeline_prepare(p, ilo, &session);
gen6_pipeline_prepare(p, vec, &session);
session.emit_draw_states = gen6_pipeline_states;
session.emit_draw_commands = gen7_pipeline_commands;
gen6_pipeline_draw(p, ilo, &session);
gen6_pipeline_end(p, ilo, &session);
gen6_pipeline_draw(p, vec, &session);
gen6_pipeline_end(p, vec, &session);
}
static void
@ -941,7 +940,7 @@ ilo_3d_pipeline_estimate_size_gen7(struct ilo_3d_pipeline *p,
switch (action) {
case ILO_3D_PIPELINE_DRAW:
{
const struct ilo_context *ilo = arg;
const struct ilo_state_vector *ilo = arg;
size = gen7_pipeline_max_command_size(p) +
gen6_pipeline_estimate_state_size(p, ilo);

5
src/gallium/drivers/ilo/ilo_blit.c
View file

@ -64,9 +64,10 @@ ilo_clear(struct pipe_context *pipe,
unsigned stencil)
{
struct ilo_context *ilo = ilo_context(pipe);
struct ilo_state_vector *vec = &ilo->state_vector;
if ((buffers & PIPE_CLEAR_DEPTHSTENCIL) && ilo->fb.state.zsbuf) {
if (ilo_blitter_rectlist_clear_zs(ilo->blitter, ilo->fb.state.zsbuf,
if ((buffers & PIPE_CLEAR_DEPTHSTENCIL) && vec->fb.state.zsbuf) {
if (ilo_blitter_rectlist_clear_zs(ilo->blitter, vec->fb.state.zsbuf,
buffers & PIPE_CLEAR_DEPTHSTENCIL, depth, stencil))
buffers &= ~PIPE_CLEAR_DEPTHSTENCIL;

13
src/gallium/drivers/ilo/ilo_blit.h
View file

@ -33,8 +33,6 @@
#include "ilo_state.h"
#include "ilo_resource.h"
struct ilo_context;
void
ilo_blit_resolve_slices_for_hiz(struct ilo_context *ilo,
struct pipe_resource *res, unsigned level,
@ -157,14 +155,15 @@ ilo_blit_resolve_view(struct ilo_context *ilo,
static inline void
ilo_blit_resolve_framebuffer(struct ilo_context *ilo)
{
const struct pipe_framebuffer_state *fb = &ilo->fb.state;
struct ilo_state_vector *vec = &ilo->state_vector;
const struct pipe_framebuffer_state *fb = &vec->fb.state;
unsigned sh, i;
/* Not all bound views are sampled by the shaders. How do we tell? */
for (sh = 0; sh < Elements(ilo->view); sh++) {
for (i = 0; i < ilo->view[sh].count; i++) {
if (ilo->view[sh].states[i])
ilo_blit_resolve_view(ilo, ilo->view[sh].states[i]);
for (sh = 0; sh < Elements(vec->view); sh++) {
for (i = 0; i < vec->view[sh].count; i++) {
if (vec->view[sh].states[i])
ilo_blit_resolve_view(ilo, vec->view[sh].states[i]);
}
}

2
src/gallium/drivers/ilo/ilo_blitter.h
View file

@ -29,7 +29,6 @@
#define ILO_BLITTER_H
#include "ilo_common.h"
#include "ilo_context.h"
#include "ilo_state.h"
enum ilo_blitter_uses {
@ -49,6 +48,7 @@ enum ilo_blitter_rectlist_op {
struct blitter_context;
struct pipe_resource;
struct pipe_surface;
struct ilo_context;
struct ilo_blitter {
struct ilo_context *ilo;

51
src/gallium/drivers/ilo/ilo_blitter_pipe.c
View file

@ -45,26 +45,27 @@ ilo_blitter_pipe_begin(struct ilo_blitter *blitter,
bool scissor_enable)
{
struct blitter_context *b = blitter->pipe_blitter;
struct ilo_context *ilo = blitter->ilo;
struct ilo_state_vector *vec = &blitter->ilo->state_vector;
struct ilo_3d *hw3d = blitter->ilo->hw3d;
/* vertex states */
util_blitter_save_vertex_buffer_slot(b, ilo->vb.states);
util_blitter_save_vertex_elements(b, (void *) ilo->ve);
util_blitter_save_vertex_shader(b, ilo->vs);
util_blitter_save_geometry_shader(b, ilo->gs);
util_blitter_save_so_targets(b, ilo->so.count, ilo->so.states);
util_blitter_save_rasterizer(b, (void *) ilo->rasterizer);
util_blitter_save_vertex_buffer_slot(b, vec->vb.states);
util_blitter_save_vertex_elements(b, (void *) vec->ve);
util_blitter_save_vertex_shader(b, vec->vs);
util_blitter_save_geometry_shader(b, vec->gs);
util_blitter_save_so_targets(b, vec->so.count, vec->so.states);
util_blitter_save_rasterizer(b, (void *) vec->rasterizer);
/* fragment states */
util_blitter_save_fragment_shader(b, ilo->fs);
util_blitter_save_depth_stencil_alpha(b, (void *) ilo->dsa);
util_blitter_save_blend(b, (void *) ilo->blend);
util_blitter_save_sample_mask(b, ilo->sample_mask);
util_blitter_save_stencil_ref(b, &ilo->stencil_ref);
util_blitter_save_viewport(b, &ilo->viewport.viewport0);
util_blitter_save_fragment_shader(b, vec->fs);
util_blitter_save_depth_stencil_alpha(b, (void *) vec->dsa);
util_blitter_save_blend(b, (void *) vec->blend);
util_blitter_save_sample_mask(b, vec->sample_mask);
util_blitter_save_stencil_ref(b, &vec->stencil_ref);
util_blitter_save_viewport(b, &vec->viewport.viewport0);
if (scissor_enable)
util_blitter_save_scissor(b, &ilo->scissor.scissor0);
util_blitter_save_scissor(b, &vec->scissor.scissor0);
switch (op) {
case ILO_BLITTER_PIPE_BLIT:
@ -74,27 +75,27 @@ ilo_blitter_pipe_begin(struct ilo_blitter *blitter,
* util_blitter_copy_texture()
*/
util_blitter_save_fragment_sampler_states(b,
ilo->sampler[PIPE_SHADER_FRAGMENT].count,
(void **) ilo->sampler[PIPE_SHADER_FRAGMENT].cso);
vec->sampler[PIPE_SHADER_FRAGMENT].count,
(void **) vec->sampler[PIPE_SHADER_FRAGMENT].cso);
util_blitter_save_fragment_sampler_views(b,
ilo->view[PIPE_SHADER_FRAGMENT].count,
ilo->view[PIPE_SHADER_FRAGMENT].states);
vec->view[PIPE_SHADER_FRAGMENT].count,
vec->view[PIPE_SHADER_FRAGMENT].states);
util_blitter_save_framebuffer(b, &ilo->fb.state);
util_blitter_save_framebuffer(b, &vec->fb.state);
/* resource_copy_region() or blit() does not honor render condition */
util_blitter_save_render_condition(b,
ilo->hw3d->render_condition.query,
ilo->hw3d->render_condition.cond,
ilo->hw3d->render_condition.mode);
hw3d->render_condition.query,
hw3d->render_condition.cond,
hw3d->render_condition.mode);
break;
case ILO_BLITTER_PIPE_CLEAR:
/*
* we are about to call util_blitter_clear_render_target() or
* util_blitter_clear_depth_stencil()
*/
util_blitter_save_framebuffer(b, &ilo->fb.state);
util_blitter_save_framebuffer(b, &vec->fb.state);
break;
case ILO_BLITTER_PIPE_CLEAR_FB:
/* we are about to call util_blitter_clear() */
@ -212,11 +213,13 @@ ilo_blitter_pipe_clear_fb(struct ilo_blitter *blitter,
const union pipe_color_union *color,
double depth, unsigned stencil)
{
struct ilo_state_vector *vec = &blitter->ilo->state_vector;
/* TODO we should pause/resume some queries */
ilo_blitter_pipe_begin(blitter, ILO_BLITTER_PIPE_CLEAR_FB, false);
util_blitter_clear(blitter->pipe_blitter,
blitter->ilo->fb.state.width, blitter->ilo->fb.state.height, 1,
vec->fb.state.width, vec->fb.state.height, 1,
buffers, color, depth, stencil);
ilo_blitter_pipe_end(blitter);

4
src/gallium/drivers/ilo/ilo_context.c
View file

@ -70,7 +70,7 @@ ilo_context_destroy(struct pipe_context *pipe)
{
struct ilo_context *ilo = ilo_context(pipe);
ilo_cleanup_states(ilo);
ilo_state_vector_cleanup(&ilo->state_vector);
if (ilo->uploader)
u_upload_destroy(ilo->uploader);
@ -136,7 +136,7 @@ ilo_context_create(struct pipe_screen *screen, void *priv)
ilo_init_video_functions(ilo);
ilo_init_gpgpu_functions(ilo);
ilo_init_states(ilo);
ilo_state_vector_init(ilo->dev, &ilo->state_vector);
/*
* These must be called last as u_upload/u_blitter are clients of the pipe

44
src/gallium/drivers/ilo/ilo_context.h
View file

@ -34,15 +34,14 @@
#include "ilo_common.h"
#include "ilo_state.h"
struct pipe_draw_info;
struct u_upload_mgr;
struct intel_winsys;
struct intel_bo;
struct ilo_3d;
struct ilo_blitter;
struct ilo_cp;
struct ilo_screen;
struct ilo_shader_state;
struct ilo_shader_cache;
struct ilo_context {
struct pipe_context base;
@ -60,44 +59,7 @@ struct ilo_context {
struct u_upload_mgr *uploader;
const struct pipe_draw_info *draw;
uint32_t dirty;
struct ilo_vb_state vb;
const struct ilo_ve_state *ve;
struct ilo_ib_state ib;
struct ilo_shader_state *vs;
struct ilo_shader_state *gs;
struct ilo_so_state so;
struct pipe_clip_state clip;
struct ilo_viewport_state viewport;
struct ilo_scissor_state scissor;
const struct ilo_rasterizer_state *rasterizer;
struct pipe_poly_stipple poly_stipple;
unsigned sample_mask;
struct ilo_shader_state *fs;
const struct ilo_dsa_state *dsa;
struct pipe_stencil_ref stencil_ref;
const struct ilo_blend_state *blend;
struct pipe_blend_color blend_color;
struct ilo_fb_state fb;
/* shader resources */
struct ilo_sampler_state sampler[PIPE_SHADER_TYPES];
struct ilo_view_state view[PIPE_SHADER_TYPES];
struct ilo_cbuf_state cbuf[PIPE_SHADER_TYPES];
struct ilo_resource_state resource;
/* GPGPU */
struct ilo_shader_state *cs;
struct ilo_resource_state cs_resource;
struct ilo_global_binding global_binding;
struct ilo_state_vector state_vector;
};
static inline struct ilo_context *

67
src/gallium/drivers/ilo/ilo_shader.c
View file

@ -164,7 +164,7 @@ ilo_shader_cache_invalidate(struct ilo_shader_cache *shc)
void
ilo_shader_variant_init(struct ilo_shader_variant *variant,
const struct ilo_shader_info *info,
const struct ilo_context *ilo)
const struct ilo_state_vector *vec)
{
int num_views, i;
@ -173,27 +173,27 @@ ilo_shader_variant_init(struct ilo_shader_variant *variant,
switch (info->type) {
case PIPE_SHADER_VERTEX:
variant->u.vs.rasterizer_discard =
ilo->rasterizer->state.rasterizer_discard;
vec->rasterizer->state.rasterizer_discard;
variant->u.vs.num_ucps =
util_last_bit(ilo->rasterizer->state.clip_plane_enable);
util_last_bit(vec->rasterizer->state.clip_plane_enable);
break;
case PIPE_SHADER_GEOMETRY:
variant->u.gs.rasterizer_discard =
ilo->rasterizer->state.rasterizer_discard;
variant->u.gs.num_inputs = ilo->vs->shader->out.count;
for (i = 0; i < ilo->vs->shader->out.count; i++) {
vec->rasterizer->state.rasterizer_discard;
variant->u.gs.num_inputs = vec->vs->shader->out.count;
for (i = 0; i < vec->vs->shader->out.count; i++) {
variant->u.gs.semantic_names[i] =
ilo->vs->shader->out.semantic_names[i];
vec->vs->shader->out.semantic_names[i];
variant->u.gs.semantic_indices[i] =
ilo->vs->shader->out.semantic_indices[i];
vec->vs->shader->out.semantic_indices[i];
}
break;
case PIPE_SHADER_FRAGMENT:
variant->u.fs.flatshade =
(info->has_color_interp && ilo->rasterizer->state.flatshade);
(info->has_color_interp && vec->rasterizer->state.flatshade);
variant->u.fs.fb_height = (info->has_pos) ?
ilo->fb.state.height : 1;
variant->u.fs.num_cbufs = ilo->fb.state.nr_cbufs;
vec->fb.state.height : 1;
variant->u.fs.num_cbufs = vec->fb.state.nr_cbufs;
break;
default:
assert(!"unknown shader type");
@ -201,19 +201,19 @@ ilo_shader_variant_init(struct ilo_shader_variant *variant,
}
/* use PCB unless constant buffer 0 is not in user buffer */
if ((ilo->cbuf[info->type].enabled_mask & 0x1) &&
!ilo->cbuf[info->type].cso[0].user_buffer)
if ((vec->cbuf[info->type].enabled_mask & 0x1) &&
!vec->cbuf[info->type].cso[0].user_buffer)
variant->use_pcb = false;
else
variant->use_pcb = true;
num_views = ilo->view[info->type].count;
num_views = vec->view[info->type].count;
assert(info->num_samplers <= num_views);
variant->num_sampler_views = info->num_samplers;
for (i = 0; i < info->num_samplers; i++) {
const struct pipe_sampler_view *view = ilo->view[info->type].states[i];
const struct ilo_sampler_cso *sampler = ilo->sampler[info->type].cso[i];
const struct pipe_sampler_view *view = vec->view[info->type].states[i];
const struct ilo_sampler_cso *sampler = vec->sampler[info->type].cso[i];
if (view) {
variant->sampler_view_swizzles[i].r = view->swizzle_r;
@ -253,7 +253,7 @@ ilo_shader_variant_init(struct ilo_shader_variant *variant,
static void
ilo_shader_variant_guess(struct ilo_shader_variant *variant,
const struct ilo_shader_info *info,
const struct ilo_context *ilo)
const struct ilo_state_vector *vec)
{
int i;
@ -267,7 +267,7 @@ ilo_shader_variant_guess(struct ilo_shader_variant *variant,
case PIPE_SHADER_FRAGMENT:
variant->u.fs.flatshade = false;
variant->u.fs.fb_height = (info->has_pos) ?
ilo->fb.state.height : 1;
vec->fb.state.height : 1;
variant->u.fs.num_cbufs = 1;
break;
default:
@ -434,7 +434,8 @@ ilo_shader_info_parse_tokens(struct ilo_shader_info *info)
* Create a shader state.
*/
static struct ilo_shader_state *
ilo_shader_state_create(const struct ilo_context *ilo,
ilo_shader_state_create(const struct ilo_dev_info *dev,
const struct ilo_state_vector *vec,
int type, const void *templ)
{
struct ilo_shader_state *state;
@ -444,7 +445,7 @@ ilo_shader_state_create(const struct ilo_context *ilo,
if (!state)
return NULL;
state->info.dev = ilo->dev;
state->info.dev = dev;
state->info.type = type;
if (type == PIPE_SHADER_COMPUTE) {
@ -469,7 +470,7 @@ ilo_shader_state_create(const struct ilo_context *ilo,
ilo_shader_info_parse_tokens(&state->info);
/* guess and compile now */
ilo_shader_variant_guess(&variant, &state->info, ilo);
ilo_shader_variant_guess(&variant, &state->info, vec);
if (!ilo_shader_state_use_variant(state, &variant)) {
ilo_shader_destroy(state);
return NULL;
@ -675,11 +676,12 @@ ilo_shader_state_use_variant(struct ilo_shader_state *state,
struct ilo_shader_state *
ilo_shader_create_vs(const struct ilo_dev_info *dev,
const struct pipe_shader_state *state,
const struct ilo_context *precompile)
const struct ilo_state_vector *precompile)
{
struct ilo_shader_state *shader;
shader = ilo_shader_state_create(precompile, PIPE_SHADER_VERTEX, state);
shader = ilo_shader_state_create(dev, precompile,
PIPE_SHADER_VERTEX, state);
/* states used in ilo_shader_variant_init() */
shader->info.non_orthogonal_states = ILO_DIRTY_VIEW_VS |
@ -692,11 +694,12 @@ ilo_shader_create_vs(const struct ilo_dev_info *dev,
struct ilo_shader_state *
ilo_shader_create_gs(const struct ilo_dev_info *dev,
const struct pipe_shader_state *state,
const struct ilo_context *precompile)
const struct ilo_state_vector *precompile)
{
struct ilo_shader_state *shader;
shader = ilo_shader_state_create(precompile, PIPE_SHADER_GEOMETRY, state);
shader = ilo_shader_state_create(dev, precompile,
PIPE_SHADER_GEOMETRY, state);
/* states used in ilo_shader_variant_init() */
shader->info.non_orthogonal_states = ILO_DIRTY_VIEW_GS |
@ -710,11 +713,12 @@ ilo_shader_create_gs(const struct ilo_dev_info *dev,
struct ilo_shader_state *
ilo_shader_create_fs(const struct ilo_dev_info *dev,
const struct pipe_shader_state *state,
const struct ilo_context *precompile)
const struct ilo_state_vector *precompile)
{
struct ilo_shader_state *shader;
shader = ilo_shader_state_create(precompile, PIPE_SHADER_FRAGMENT, state);
shader = ilo_shader_state_create(dev, precompile,
PIPE_SHADER_FRAGMENT, state);
/* states used in ilo_shader_variant_init() */
shader->info.non_orthogonal_states = ILO_DIRTY_VIEW_FS |
@ -728,11 +732,12 @@ ilo_shader_create_fs(const struct ilo_dev_info *dev,
struct ilo_shader_state *
ilo_shader_create_cs(const struct ilo_dev_info *dev,
const struct pipe_compute_state *state,
const struct ilo_context *precompile)
const struct ilo_state_vector *precompile)
{
struct ilo_shader_state *shader;
shader = ilo_shader_state_create(precompile, PIPE_SHADER_COMPUTE, state);
shader = ilo_shader_state_create(dev, precompile,
PIPE_SHADER_COMPUTE, state);
shader->info.non_orthogonal_states = 0;
@ -773,7 +778,7 @@ ilo_shader_get_type(const struct ilo_shader_state *shader)
*/
bool
ilo_shader_select_kernel(struct ilo_shader_state *shader,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
uint32_t dirty)
{
const struct ilo_shader * const cur = shader->shader;
@ -782,7 +787,7 @@ ilo_shader_select_kernel(struct ilo_shader_state *shader,
if (!(shader->info.non_orthogonal_states & dirty))
return false;
ilo_shader_variant_init(&variant, &shader->info, ilo);
ilo_shader_variant_init(&variant, &shader->info, vec);
ilo_shader_state_use_variant(shader, &variant);
return (shader->shader != cur);

12
src/gallium/drivers/ilo/ilo_shader.h
View file

@ -71,11 +71,11 @@ struct ilo_kernel_routing {
struct intel_bo;
struct ilo_builder;
struct ilo_context;
struct ilo_rasterizer_state;
struct ilo_shader_cache;
struct ilo_shader_state;
struct ilo_shader_cso;
struct ilo_state_vector;
struct ilo_shader_cache *
ilo_shader_cache_create(void);
@ -101,22 +101,22 @@ ilo_shader_cache_invalidate(struct ilo_shader_cache *shc);
struct ilo_shader_state *
ilo_shader_create_vs(const struct ilo_dev_info *dev,
const struct pipe_shader_state *state,
const struct ilo_context *precompile);
const struct ilo_state_vector *precompile);
struct ilo_shader_state *
ilo_shader_create_gs(const struct ilo_dev_info *dev,
const struct pipe_shader_state *state,
const struct ilo_context *precompile);
const struct ilo_state_vector *precompile);
struct ilo_shader_state *
ilo_shader_create_fs(const struct ilo_dev_info *dev,
const struct pipe_shader_state *state,
const struct ilo_context *precompile);
const struct ilo_state_vector *precompile);
struct ilo_shader_state *
ilo_shader_create_cs(const struct ilo_dev_info *dev,
const struct pipe_compute_state *state,
const struct ilo_context *precompile);
const struct ilo_state_vector *precompile);
void
ilo_shader_destroy(struct ilo_shader_state *shader);
@ -126,7 +126,7 @@ ilo_shader_get_type(const struct ilo_shader_state *shader);
bool
ilo_shader_select_kernel(struct ilo_shader_state *shader,
const struct ilo_context *ilo,
const struct ilo_state_vector *vec,
uint32_t dirty);
bool

449
src/gallium/drivers/ilo/ilo_state.c
View file

File diff suppressed because it is too large Load diff

67
src/gallium/drivers/ilo/ilo_state.h
View file

@ -28,6 +28,8 @@
#ifndef ILO_STATE_H
#define ILO_STATE_H
#include "pipe/p_state.h"
#include "ilo_common.h"
/**
@ -138,9 +140,7 @@ enum ilo_dirty_flags {
ILO_DIRTY_ALL = 0xffffffff,
};
struct pipe_draw_info;
struct pipe_resource;
struct intel_bo;
struct ilo_buffer;
struct ilo_context;
struct ilo_shader_state;
@ -377,24 +377,67 @@ struct ilo_shader_cso {
uint32_t payload[5];
};
struct ilo_state_vector {
const struct pipe_draw_info *draw;
uint32_t dirty;
struct ilo_vb_state vb;
const struct ilo_ve_state *ve;
struct ilo_ib_state ib;
struct ilo_shader_state *vs;
struct ilo_shader_state *gs;
struct ilo_so_state so;
struct pipe_clip_state clip;
struct ilo_viewport_state viewport;
struct ilo_scissor_state scissor;
const struct ilo_rasterizer_state *rasterizer;
struct pipe_poly_stipple poly_stipple;
unsigned sample_mask;
struct ilo_shader_state *fs;
const struct ilo_dsa_state *dsa;
struct pipe_stencil_ref stencil_ref;
const struct ilo_blend_state *blend;
struct pipe_blend_color blend_color;
struct ilo_fb_state fb;
/* shader resources */
struct ilo_sampler_state sampler[PIPE_SHADER_TYPES];
struct ilo_view_state view[PIPE_SHADER_TYPES];
struct ilo_cbuf_state cbuf[PIPE_SHADER_TYPES];
struct ilo_resource_state resource;
/* GPGPU */
struct ilo_shader_state *cs;
struct ilo_resource_state cs_resource;
struct ilo_global_binding global_binding;
};
void
ilo_init_state_functions(struct ilo_context *ilo);
void
ilo_init_states(struct ilo_context *ilo);
void
ilo_cleanup_states(struct ilo_context *ilo);
void
ilo_finalize_3d_states(struct ilo_context *ilo,
const struct pipe_draw_info *draw);
void
ilo_mark_states_with_resource_renamed(struct ilo_context *ilo,
struct pipe_resource *res);
ilo_state_vector_init(const struct ilo_dev_info *dev,
struct ilo_state_vector *vec);
void
ilo_dump_dirty_flags(uint32_t dirty);
ilo_state_vector_cleanup(struct ilo_state_vector *vec);
void
ilo_state_vector_resource_renamed(struct ilo_state_vector *vec,
struct pipe_resource *res);
void
ilo_state_vector_dump_dirty(const struct ilo_state_vector *vec);
#endif /* ILO_STATE_H */

4
src/gallium/drivers/ilo/ilo_transfer.c
View file

@ -1083,7 +1083,7 @@ choose_transfer_method(struct ilo_context *ilo, struct ilo_transfer *xfer)
}
if (resource_renamed)
ilo_mark_states_with_resource_renamed(ilo, res);
ilo_state_vector_resource_renamed(&ilo->state_vector, res);
}
return true;
@ -1101,7 +1101,7 @@ buf_pwrite(struct ilo_context *ilo, struct ilo_buffer *buf,
if ((usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) &&
ilo_buffer_rename_bo(buf)) {
ilo_mark_states_with_resource_renamed(ilo, &buf->base);
ilo_state_vector_resource_renamed(&ilo->state_vector, &buf->base);
unblocked = true;
}
else {

1
src/gallium/drivers/ilo/shader/ilo_shader_fs.c
View file

@ -32,7 +32,6 @@
#include "toy_legalize.h"
#include "toy_optimize.h"
#include "toy_helpers.h"
#include "ilo_context.h"
#include "ilo_shader_internal.h"
struct fs_compile_context {

4
src/gallium/drivers/ilo/shader/ilo_shader_internal.h
View file

@ -29,7 +29,7 @@
#define ILO_SHADER_INTERNAL_H
#include "ilo_common.h"
#include "ilo_context.h"
#include "ilo_state.h"
#include "ilo_shader.h"
/* XXX The interface needs to be reworked */
@ -189,7 +189,7 @@ struct ilo_shader_state {
void
ilo_shader_variant_init(struct ilo_shader_variant *variant,
const struct ilo_shader_info *info,
const struct ilo_context *ilo);
const struct ilo_state_vector *vec);
bool
ilo_shader_state_use_variant(struct ilo_shader_state *state,

1
src/gallium/drivers/ilo/shader/ilo_shader_vs.c
View file

@ -32,7 +32,6 @@
#include "toy_legalize.h"
#include "toy_optimize.h"
#include "toy_helpers.h"
#include "ilo_context.h"
#include "ilo_shader_internal.h"
struct vs_compile_context {