diff --git a/src/intel/compiler/brw_disasm.c b/src/intel/compiler/brw_disasm.c index b5c88a56f78..3e5741b03a9 100644 --- a/src/intel/compiler/brw_disasm.c +++ b/src/intel/compiler/brw_disasm.c @@ -796,12 +796,6 @@ reg(FILE *file, unsigned _reg_file, unsigned _reg_nr) case BRW_ARF_MASK: format(file, "mask%d", _reg_nr & 0x0f); break; - case BRW_ARF_MASK_STACK: - format(file, "ms%d", _reg_nr & 0x0f); - break; - case BRW_ARF_MASK_STACK_DEPTH: - format(file, "msd%d", _reg_nr & 0x0f); - break; case BRW_ARF_STATE: format(file, "sr%d", _reg_nr & 0x0f); break; diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h index cf698496eb9..9b368f6fa7f 100644 --- a/src/intel/compiler/brw_eu_defines.h +++ b/src/intel/compiler/brw_eu_defines.h @@ -753,8 +753,6 @@ enum ENUM_PACKED gfx10_align1_3src_exec_type { #define BRW_ARF_ACCUMULATOR 0x20 #define BRW_ARF_FLAG 0x30 #define BRW_ARF_MASK 0x40 -#define BRW_ARF_MASK_STACK 0x50 -#define BRW_ARF_MASK_STACK_DEPTH 0x60 #define BRW_ARF_STATE 0x70 #define BRW_ARF_CONTROL 0x80 #define BRW_ARF_NOTIFICATION_COUNT 0x90 diff --git a/src/intel/compiler/brw_reg.h b/src/intel/compiler/brw_reg.h index 74936626b4b..f72be6cf950 100644 --- a/src/intel/compiler/brw_reg.h +++ b/src/intel/compiler/brw_reg.h @@ -987,21 +987,6 @@ brw_dmask_reg() return brw_sr0_reg(2); } -static inline struct brw_reg -brw_mask_stack_reg(unsigned subnr) -{ - return suboffset(retype(brw_vec16_reg(BRW_ARCHITECTURE_REGISTER_FILE, - BRW_ARF_MASK_STACK, 0), - BRW_TYPE_UB), subnr); -} - -static inline struct brw_reg -brw_mask_stack_depth_reg(unsigned subnr) -{ - return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE, - BRW_ARF_MASK_STACK_DEPTH, subnr); -} - static inline struct brw_reg brw_vgrf(unsigned nr, enum brw_reg_type type) {