From 6b9524f8641ee2deb1c24dcf59fa85c7d2b610b0 Mon Sep 17 00:00:00 2001 From: Eric Engestrom Date: Fri, 12 Dec 2025 08:50:35 +0100 Subject: [PATCH] nak: cleanup derelict allow(dead_code) annotations As well as one `allow(non_camel_case_types)`. Part-of: --- src/nouveau/compiler/nak/builder.rs | 1 - src/nouveau/compiler/nak/ir.rs | 23 ------------------- src/nouveau/compiler/nak/sm32.rs | 2 -- .../compiler/nak/sm75_instr_latencies.rs | 2 -- .../compiler/nak/sm80_instr_latencies.rs | 1 - src/nouveau/compiler/nak/sph.rs | 2 -- 6 files changed, 31 deletions(-) diff --git a/src/nouveau/compiler/nak/builder.rs b/src/nouveau/compiler/nak/builder.rs index f5e51df764f..a91f8358bf8 100644 --- a/src/nouveau/compiler/nak/builder.rs +++ b/src/nouveau/compiler/nak/builder.rs @@ -948,7 +948,6 @@ impl SSAInstrBuilder<'_> { self.b.into_vec() } - #[allow(dead_code)] pub fn into_mapped_instrs(self) -> MappedInstrs { self.b.into_mapped_instrs() } diff --git a/src/nouveau/compiler/nak/ir.rs b/src/nouveau/compiler/nak/ir.rs index 8a398003d36..d101f34e7c5 100644 --- a/src/nouveau/compiler/nak/ir.rs +++ b/src/nouveau/compiler/nak/ir.rs @@ -554,11 +554,7 @@ impl fmt::Display for Dst { #[derive(Clone, Eq, Hash, PartialEq)] pub enum CBuf { Binding(u8), - - #[allow(dead_code)] BindlessSSA([SSAValue; 2]), - - #[allow(dead_code)] BindlessUGPR(RegRef), } @@ -605,7 +601,6 @@ pub enum SrcRef { } impl SrcRef { - #[allow(dead_code)] pub fn is_alu(&self) -> bool { match self { SrcRef::Zero | SrcRef::Imm32(_) | SrcRef::CBuf(_) => true, @@ -641,7 +636,6 @@ impl SrcRef { } } - #[allow(dead_code)] pub fn is_barrier(&self) -> bool { match self { SrcRef::SSA(ssa) => ssa.file() == RegFile::Bar, @@ -897,7 +891,6 @@ impl SrcMod { } #[derive(Clone, Copy, PartialEq)] -#[allow(dead_code)] pub enum SrcSwizzle { None, Xx, @@ -1733,7 +1726,6 @@ pub enum IntCmpType { } impl IntCmpType { - #[allow(dead_code)] pub fn is_signed(&self) -> bool { match self { IntCmpType::U32 => false, @@ -1936,7 +1928,6 @@ pub struct TexCBufRef { pub offset: u16, } -#[allow(dead_code)] #[derive(Clone, Copy, Eq, PartialEq)] pub enum TexRef { Bound(u16), @@ -2113,7 +2104,6 @@ impl fmt::Display for TexOffsetMode { } } -#[allow(dead_code)] #[derive(Clone, Copy, Eq, PartialEq)] pub enum TexQuery { Dimension, @@ -2322,7 +2312,6 @@ impl fmt::Display for MemType { } } -#[allow(dead_code)] #[derive(Clone, Copy, Eq, Hash, PartialEq)] pub enum MemOrder { Constant, @@ -3482,7 +3471,6 @@ impl DisplayOp for OpImma { impl_display_for_op!(OpImma); #[derive(Clone, Copy, Eq, PartialEq)] -#[allow(dead_code)] pub enum HmmaSize { M16N8K16, M16N8K8, @@ -6473,7 +6461,6 @@ impl DisplayOp for OpLdc { impl_display_for_op!(OpLdc); #[derive(Clone, Copy, Eq, PartialEq)] -#[allow(dead_code)] pub enum LdsmSize { M8N8, MT8N8, @@ -9320,18 +9307,15 @@ pub trait ShaderModel { self.sm() >= 20 && self.sm() < 30 } - #[allow(dead_code)] fn is_kepler_a(&self) -> bool { self.sm() >= 30 && self.sm() < 32 } - #[allow(dead_code)] fn is_kepler_b(&self) -> bool { // TK1 is SM 3.2 and desktop Kepler B is SM 3.3+ self.sm() >= 32 && self.sm() < 40 } - #[allow(dead_code)] fn is_kepler(&self) -> bool { self.is_kepler_a() || self.is_kepler_b() } @@ -9349,22 +9333,18 @@ pub trait ShaderModel { self.sm() >= 60 && self.sm() < 70 } - #[allow(dead_code)] fn is_volta(&self) -> bool { self.sm() >= 70 && self.sm() < 73 } - #[allow(dead_code)] fn is_turing(&self) -> bool { self.sm() >= 73 && self.sm() < 80 } - #[allow(dead_code)] fn is_ampere(&self) -> bool { self.sm() >= 80 && self.sm() < 89 } - #[allow(dead_code)] fn is_ada(&self) -> bool { self.sm() == 89 } @@ -9374,17 +9354,14 @@ pub trait ShaderModel { self.sm() >= 90 && self.sm() < 100 } - #[allow(dead_code)] fn is_blackwell_a(&self) -> bool { self.sm() >= 100 && self.sm() < 110 } - #[allow(dead_code)] fn is_blackwell_b(&self) -> bool { self.sm() >= 120 && self.sm() < 130 } - #[allow(dead_code)] fn is_blackwell(&self) -> bool { self.is_blackwell_a() || self.is_blackwell_b() } diff --git a/src/nouveau/compiler/nak/sm32.rs b/src/nouveau/compiler/nak/sm32.rs index 4543c7edc18..7dabf6d3774 100644 --- a/src/nouveau/compiler/nak/sm32.rs +++ b/src/nouveau/compiler/nak/sm32.rs @@ -129,7 +129,6 @@ impl ShaderModel for ShaderModel32 { trait SM32Op { fn legalize(&mut self, b: &mut LegalizeBuilder); - #[allow(dead_code)] fn encode(&self, e: &mut SM32Encoder<'_>); } @@ -141,7 +140,6 @@ fn true_reg() -> RegRef { RegRef::new(RegFile::Pred, 7, 1) } -#[allow(dead_code)] struct SM32Encoder<'a> { sm: &'a ShaderModel32, ip: usize, diff --git a/src/nouveau/compiler/nak/sm75_instr_latencies.rs b/src/nouveau/compiler/nak/sm75_instr_latencies.rs index f94824d995d..f9b90b3b669 100644 --- a/src/nouveau/compiler/nak/sm75_instr_latencies.rs +++ b/src/nouveau/compiler/nak/sm75_instr_latencies.rs @@ -869,8 +869,6 @@ impl RegLatencySM75 { } } -#[allow(non_camel_case_types)] -#[allow(dead_code)] #[derive(Debug)] enum URegLatencySM75 { Udp, diff --git a/src/nouveau/compiler/nak/sm80_instr_latencies.rs b/src/nouveau/compiler/nak/sm80_instr_latencies.rs index e564db5434c..d0a6d9ae46c 100644 --- a/src/nouveau/compiler/nak/sm80_instr_latencies.rs +++ b/src/nouveau/compiler/nak/sm80_instr_latencies.rs @@ -70,7 +70,6 @@ enum URegLatencySM80 { VoteU, } -#[allow(dead_code)] #[derive(Debug)] enum UPredLatencySM80 { Coupled, diff --git a/src/nouveau/compiler/nak/sph.rs b/src/nouveau/compiler/nak/sph.rs index 268b1ad4546..e01a6cbb20c 100644 --- a/src/nouveau/compiler/nak/sph.rs +++ b/src/nouveau/compiler/nak/sph.rs @@ -303,7 +303,6 @@ impl ShaderProgramHeader { } #[inline] - #[allow(dead_code)] pub fn set_shader_local_memory_crs_size( &mut self, shader_local_memory_crs_size: u32, @@ -442,7 +441,6 @@ impl ShaderProgramHeader { } #[inline] - #[allow(dead_code)] pub fn set_uses_underestimate(&mut self, uses_underestimate: bool) { assert!(self.shader_type == ShaderType::Fragment); self.set_bit(611, uses_underestimate);