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intel: infer scalar'ness locally for brw_vectorize_lower_mem_access

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Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23098>
This commit is contained in:
Rohan Garg 2023-05-17 17:26:35 +02:00
parent 3a8f5c2783
commit 6b8fe32322
1 changed files with 2 additions and 3 deletions
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5
src/intel/compiler/brw_nir.c
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@ -1441,10 +1441,10 @@ get_mem_access_size_align(nir_intrinsic_op intrin, uint8_t bytes,
static void
brw_vectorize_lower_mem_access(nir_shader *nir,
const struct brw_compiler *compiler,
bool is_scalar,
bool robust_buffer_access)
{
bool progress = false;
const bool is_scalar = compiler->scalar_stage[nir->info.stage];
if (is_scalar) {
nir_load_store_vectorize_options options = {
@ -1569,8 +1569,7 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,
brw_nir_optimize(nir, compiler);
}
brw_vectorize_lower_mem_access(nir, compiler, is_scalar,
robust_buffer_access);
brw_vectorize_lower_mem_access(nir, compiler, robust_buffer_access);
if (OPT(nir_lower_int64))
brw_nir_optimize(nir, compiler);