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kk: Handle accurate OpSMod and default point size requirements
Reviewed-by: Arcady Goldmints-Orlov <arcady@lunarg.com> Reviewed-by: Aitor Camacho <aitor@lunarg.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41663>
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4 changed files with 34 additions and 2 deletions
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@ -10,12 +10,18 @@ import sys
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import math
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a = 'a'
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b = 'b'
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lower_pack = [
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lower = [
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# Based on the VIR lowering
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(('f2f16_rtz', 'a@32'),
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('bcsel', ('flt', ('fabs', a), ('fabs', ('f2f32', ('f2f16_rtne', a)))),
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('isub', ('f2f16_rtne', a), 1), ('f2f16_rtne', a))),
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# Handle imod behavior with negative values using lowering
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(('imod', a, b),
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('bcsel', ('ior', ('ieq', ('irem', a, b), 0), ('ieq', ('isign', a), ('isign', b))),
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('irem', a, b), ('iadd', ('irem', a, b), b))),
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]
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@ -32,7 +38,7 @@ def run():
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print('#include "msl_private.h"')
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print(nir_algebraic.AlgebraicPass("msl_nir_lower_algebraic_late", lower_pack).render())
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print(nir_algebraic.AlgebraicPass("msl_nir_lower_algebraic_late", lower).render())
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if __name__ == '__main__':
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main()
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@ -242,6 +242,30 @@ msl_ensure_vertex_position_output(nir_shader *nir)
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return false;
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}
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bool
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msl_ensure_vertex_point_size_output(nir_shader *nir)
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{
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assert(nir->info.stage == MESA_SHADER_VERTEX);
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bool has_point_size_write =
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nir->info.outputs_written & BITFIELD64_BIT(VARYING_SLOT_PSIZ);
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if (!has_point_size_write) {
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nir_function_impl *entrypoint = nir_shader_get_entrypoint(nir);
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nir_builder b = nir_builder_at(nir_before_impl(entrypoint));
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struct nir_io_semantics io_semantics = {
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.location = VARYING_SLOT_PSIZ,
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.num_slots = 1u,
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};
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nir_store_output(&b, nir_imm_float(&b, 1.0f), nir_imm_int(&b, 0u),
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.base = 0u, .range = 1u, .write_mask = 0x1, .component = 0u,
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.src_type = nir_type_float32, .io_semantics = io_semantics);
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nir->info.outputs_written |= BITFIELD64_BIT(VARYING_SLOT_PSIZ);
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}
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return true;
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}
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static bool
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msl_fs_io_types(nir_builder *b, nir_intrinsic_instr *intr, void *data)
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{
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@ -72,6 +72,7 @@ bool msl_lower_textures(nir_shader *s);
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bool msl_lower_static_sample_mask(nir_shader *nir, uint32_t sample_mask);
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bool msl_ensure_depth_write(nir_shader *nir);
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bool msl_ensure_vertex_position_output(nir_shader *nir);
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bool msl_ensure_vertex_point_size_output(nir_shader *nir);
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bool msl_nir_fs_io_types(nir_shader *nir);
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bool msl_nir_vs_io_types(nir_shader *nir);
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bool msl_nir_fake_guard_for_discards(struct nir_shader *nir);
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@ -503,6 +503,7 @@ kk_lower_nir(struct kk_device *dev, nir_shader *nir,
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glsl_get_natural_size_align_bytes);
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NIR_PASS(_, nir, msl_ensure_vertex_position_output);
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NIR_PASS(_, nir, msl_ensure_vertex_point_size_output);
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} else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
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NIR_PASS(_, nir, kk_nir_lower_fs_multiview, state->mv->view_mask);
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