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amd: addrlib update for April

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Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10445>
This commit is contained in:
Marek Olšák 2021-04-25 14:40:17 -04:00 • committed by Marge Bot
parent 804e292440
commit 6b18fcb38b
3 changed files with 34 additions and 27 deletions
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47
src/amd/addrlib/src/core/addrlib2.h
View file

@ -46,31 +46,36 @@ namespace V2
* @brief Flags for SwizzleModeTable
************************************************************************************************************************
*/
struct SwizzleModeFlags
union SwizzleModeFlags
{
// Swizzle mode
UINT_32 isLinear : 1; // Linear
struct
{
// Swizzle mode
UINT_32 isLinear : 1; // Linear
// Block size
UINT_32 is256b : 1; // Block size is 256B
UINT_32 is4kb : 1; // Block size is 4KB
UINT_32 is64kb : 1; // Block size is 64KB
UINT_32 isVar : 1; // Block size is variable
// Block size
UINT_32 is256b : 1; // Block size is 256B
UINT_32 is4kb : 1; // Block size is 4KB
UINT_32 is64kb : 1; // Block size is 64KB
UINT_32 isVar : 1; // Block size is variable
UINT_32 isZ : 1; // Z order swizzle mode
UINT_32 isStd : 1; // Standard swizzle mode
UINT_32 isDisp : 1; // Display swizzle mode
UINT_32 isRot : 1; // Rotate swizzle mode
UINT_32 isZ : 1; // Z order swizzle mode
UINT_32 isStd : 1; // Standard swizzle mode
UINT_32 isDisp : 1; // Display swizzle mode
UINT_32 isRot : 1; // Rotate swizzle mode
// XOR mode
UINT_32 isXor : 1; // XOR after swizzle if set
// XOR mode
UINT_32 isXor : 1; // XOR after swizzle if set
UINT_32 isT : 1; // T mode
UINT_32 isT : 1; // T mode
// GFX10
UINT_32 isRtOpt : 1; // mode opt for render target
// GFX10
UINT_32 isRtOpt : 1; // mode opt for render target
UINT_32 reserved : 20; // Reserved bits
UINT_32 reserved : 20; // Reserved bits
};
UINT_32 u32All;
};
struct Dim2d
@ -323,11 +328,7 @@ protected:
BOOL_32 IsValidSwMode(AddrSwizzleMode swizzleMode) const
{
// Don't dereference a reinterpret_cast pointer so as not to break
// strict-aliasing rules.
UINT_32 mode;
memcpy(&mode, &m_swizzleModeTable[swizzleMode], sizeof(UINT_32));
return mode != 0;
return (m_swizzleModeTable[swizzleMode].u32All != 0);
}
// Checking block size

9
src/amd/addrlib/src/gfx10/gfx10addrlib.cpp
View file

@ -1480,7 +1480,7 @@ VOID Gfx10Lib::ConvertSwizzlePatternToEquation(
const UINT_32 blkXMask = dim.w - 1;
const UINT_32 blkYMask = dim.h - 1;
ADDR_BIT_SETTING swizzle[ADDR_MAX_EQUATION_BIT];
ADDR_BIT_SETTING swizzle[ADDR_MAX_EQUATION_BIT] = {};
UINT_32 xMask = 0;
UINT_32 yMask = 0;
UINT_32 bMask = (1 << elemLog2) - 1;
@ -1683,7 +1683,7 @@ VOID Gfx10Lib::ConvertSwizzlePatternToEquation(
const UINT_32 blkYMask = (1 << blkYLog2) - 1;
const UINT_32 blkZMask = (1 << blkZLog2) - 1;
ADDR_BIT_SETTING swizzle[ADDR_MAX_EQUATION_BIT];
ADDR_BIT_SETTING swizzle[ADDR_MAX_EQUATION_BIT] = {};
UINT_32 xMask = 0;
UINT_32 yMask = 0;
UINT_32 zMask = 0;
@ -3186,7 +3186,10 @@ ADDR_E_RETURNCODE Gfx10Lib::HwlGetPreferredSurfaceSetting(
// Select the biggest allowed block type
minSizeBlk = Log2NonPow2(allowedBlockSet.value) + 1;
minSizeBlk = (minSizeBlk == AddrBlockMaxTiledType) ? AddrBlockLinear : minSizeBlk;
if (minSizeBlk == static_cast<UINT_32>(AddrBlockMaxTiledType))
{
minSizeBlk = AddrBlockLinear;
}
}
switch (minSizeBlk)

5
src/amd/addrlib/src/gfx9/gfx9addrlib.cpp
View file

@ -3808,7 +3808,10 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting(
// Select the biggest allowed block type
minSizeBlk = Log2NonPow2(allowedBlockSet.value) + 1;
minSizeBlk = (minSizeBlk == AddrBlockMaxTiledType) ? AddrBlockLinear : minSizeBlk;
if (minSizeBlk == static_cast<UINT_32>(AddrBlockMaxTiledType))
{
minSizeBlk = AddrBlockLinear;
}
}
switch (minSizeBlk)