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nouveau: header update

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This commit is contained in:
Ben Skeggs 2007-12-30 01:17:47 +11:00
parent 24cfb7d2e2
commit 6af6bb6817
2 changed files with 35 additions and 21 deletions
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26
src/mesa/pipe/nouveau/nouveau_class.h
View file

@ -3700,8 +3700,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define NV34TCL_DMA_QUERY 0x000001a8
#define NV34TCL_DMA_IN_MEMORY7 0x000001ac
#define NV34TCL_DMA_IN_MEMORY8 0x000001b0
#define NV34TCL_DMA_COLOR2 0x000001b4
#define NV34TCL_DMA_COLOR3 0x000001b8
#define NV34TCL_VIEWPORT_HORIZ 0x00000200
#define NV34TCL_VIEWPORT_HORIZ_X_SHIFT 0
#define NV34TCL_VIEWPORT_HORIZ_X_MASK 0x0000ffff
@ -3772,10 +3770,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define NV34TCL_VIEWPORT_CLIP_VERT_T_MASK 0x0000ffff
#define NV34TCL_VIEWPORT_CLIP_VERT_D_SHIFT 16
#define NV34TCL_VIEWPORT_CLIP_VERT_D_MASK 0xffff0000
#define NV34TCL_COLOR2_PITCH 0x00000280
#define NV34TCL_COLOR3_PITCH 0x00000284
#define NV34TCL_COLOR2_OFFSET 0x00000288
#define NV34TCL_COLOR3_OFFSET 0x0000028c
#define NV34TCL_DITHER_ENABLE 0x00000300
#define NV34TCL_ALPHA_FUNC_ENABLE 0x00000304
#define NV34TCL_ALPHA_FUNC_FUNC 0x00000308
@ -5118,9 +5112,29 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define NV40TCL_TEX_WRAP_R_MIRROR_CLAMP_TO_EDGE 0x00060000
#define NV40TCL_TEX_WRAP_R_MIRROR_CLAMP_TO_BORDER 0x00070000
#define NV40TCL_TEX_WRAP_R_MIRROR_CLAMP 0x00080000
#define NV40TCL_TEX_WRAP_RCOMP_SHIFT 28
#define NV40TCL_TEX_WRAP_RCOMP_MASK 0xf0000000
#define NV40TCL_TEX_WRAP_RCOMP_NEVER 0x00000000
#define NV40TCL_TEX_WRAP_RCOMP_GREATER 0x10000000
#define NV40TCL_TEX_WRAP_RCOMP_EQUAL 0x20000000
#define NV40TCL_TEX_WRAP_RCOMP_GEQUAL 0x30000000
#define NV40TCL_TEX_WRAP_RCOMP_LESS 0x40000000
#define NV40TCL_TEX_WRAP_RCOMP_NOTEQUAL 0x50000000
#define NV40TCL_TEX_WRAP_RCOMP_LEQUAL 0x60000000
#define NV40TCL_TEX_WRAP_RCOMP_ALWAYS 0x70000000
#define NV40TCL_TEX_ENABLE(x) (0x00001a0c+((x)*32))
#define NV40TCL_TEX_ENABLE__SIZE 0x00000010
#define NV40TCL_TEX_ENABLE_ENABLE (1 << 31)
#define NV40TCL_TEX_ENABLE_ANISO_SHIFT 4
#define NV40TCL_TEX_ENABLE_ANISO_MASK 0x000000f0
#define NV40TCL_TEX_ENABLE_ANISO_NONE 0x00000000
#define NV40TCL_TEX_ENABLE_ANISO_2X 0x00000010
#define NV40TCL_TEX_ENABLE_ANISO_4X 0x00000020
#define NV40TCL_TEX_ENABLE_ANISO_6X 0x00000030
#define NV40TCL_TEX_ENABLE_ANISO_8X 0x00000040
#define NV40TCL_TEX_ENABLE_ANISO_10X 0x00000050
#define NV40TCL_TEX_ENABLE_ANISO_12X 0x00000060
#define NV40TCL_TEX_ENABLE_ANISO_16X 0x00000070
#define NV40TCL_TEX_SWIZZLE(x) (0x00001a10+((x)*32))
#define NV40TCL_TEX_SWIZZLE__SIZE 0x00000010
#define NV40TCL_TEX_SWIZZLE_S0_X_SHIFT 14

30
src/mesa/pipe/nv40/nv40_state.c
View file

@ -127,24 +127,24 @@ nv40_sampler_state_create(struct pipe_context *pipe,
ps->wrap |= (1 << 5);
if (cso->max_anisotropy >= 16.0) {
ps->en |= (7 << 4);
ps->en |= NV40TCL_TEX_ENABLE_ANISO_16X;
} else
if (cso->max_anisotropy >= 12.0) {
ps->en |= (6 << 4);
ps->en |= NV40TCL_TEX_ENABLE_ANISO_12X;
} else
if (cso->max_anisotropy >= 10.0) {
ps->en |= (5 << 4);
ps->en |= NV40TCL_TEX_ENABLE_ANISO_10X;
} else
if (cso->max_anisotropy >= 8.0) {
ps->en |= (4 << 4);
ps->en |= NV40TCL_TEX_ENABLE_ANISO_8X;
} else
if (cso->max_anisotropy >= 6.0) {
ps->en |= (3 << 4);
ps->en |= NV40TCL_TEX_ENABLE_ANISO_6X;
} else
if (cso->max_anisotropy >= 4.0) {
ps->en |= (2 << 4);
ps->en |= NV40TCL_TEX_ENABLE_ANISO_4X;
} else {
ps->en |= (1 << 4); /* 2.0 */
ps->en |= NV40TCL_TEX_ENABLE_ANISO_2X;
}
}
@ -195,28 +195,28 @@ nv40_sampler_state_create(struct pipe_context *pipe,
if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
switch (cso->compare_func) {
case PIPE_FUNC_NEVER:
ps->wrap |= (0x0 << 28);
ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_NEVER;
break;
case PIPE_FUNC_GREATER:
ps->wrap |= (0x1 << 28);
ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_GREATER;
break;
case PIPE_FUNC_EQUAL:
ps->wrap |= (0x2 << 28);
ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_EQUAL;
break;
case PIPE_FUNC_GEQUAL:
ps->wrap |= (0x3 << 28);
ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_GEQUAL;
break;
case PIPE_FUNC_LESS:
ps->wrap |= (0x4 << 28);
ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_LESS;
break;
case PIPE_FUNC_NOTEQUAL:
ps->wrap |= (0x5 << 28);
ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_NOTEQUAL;
break;
case PIPE_FUNC_LEQUAL:
ps->wrap |= (0x6 << 28);
ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_LEQUAL;
break;
case PIPE_FUNC_ALWAYS:
ps->wrap |= (0x7 << 28);
ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_ALWAYS;
break;
default:
break;