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amd: lower load_frag_shading_rate in NIR

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Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32782>
This commit is contained in:
Marek Olšák 2024-12-25 12:44:59 -05:00 • committed by Marge Bot
parent 6d2e29ff6e
commit 6ad5225b2a
4 changed files with 15 additions and 58 deletions
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15
src/amd/common/ac_nir.c
View file

@ -254,6 +254,21 @@ lower_intrinsic_to_arg(nir_builder *b, nir_instr *instr, void *state)
replacement = nir_vec2(b, nir_ffract(b, ac_nir_load_arg(b, s->args, s->args->frag_pos[0])),
nir_ffract(b, ac_nir_load_arg(b, s->args, s->args->frag_pos[1])));
break;
case nir_intrinsic_load_frag_shading_rate: {
/* VRS Rate X = Ancillary[2:3]
* VRS Rate Y = Ancillary[4:5]
*/
nir_def *x_rate = ac_nir_unpack_arg(b, s->args, s->args->ancillary, 2, 2);
nir_def *y_rate = ac_nir_unpack_arg(b, s->args, s->args->ancillary, 4, 2);
/* xRate = xRate == 0x1 ? Horizontal2Pixels : None. */
x_rate = nir_bcsel(b, nir_ieq_imm(b, x_rate, 1), nir_imm_int(b, 4), nir_imm_int(b, 0));
/* yRate = yRate == 0x1 ? Vertical2Pixels : None. */
y_rate = nir_bcsel(b, nir_ieq_imm(b, y_rate, 1), nir_imm_int(b, 1), nir_imm_int(b, 0));
replacement = nir_ior(b, x_rate, y_rate);
break;
}
default:
return false;
}

30
src/amd/compiler/aco_instruction_selection.cpp
View file

@ -5523,33 +5523,6 @@ emit_interp_mov_instr(isel_context* ctx, unsigned idx, unsigned component, unsig
emit_extract_vector(ctx, tmp, high_16bits, dst);
}
void
emit_load_frag_shading_rate(isel_context* ctx, Temp dst)
{
Builder bld(ctx->program, ctx->block);
Temp cond;
/* VRS Rate X = Ancillary[2:3]
* VRS Rate Y = Ancillary[4:5]
*/
Temp x_rate = bld.vop3(aco_opcode::v_bfe_u32, bld.def(v1), get_arg(ctx, ctx->args->ancillary),
Operand::c32(2u), Operand::c32(2u));
Temp y_rate = bld.vop3(aco_opcode::v_bfe_u32, bld.def(v1), get_arg(ctx, ctx->args->ancillary),
Operand::c32(4u), Operand::c32(2u));
/* xRate = xRate == 0x1 ? Horizontal2Pixels : None. */
cond = bld.vopc(aco_opcode::v_cmp_eq_i32, bld.def(bld.lm), Operand::c32(1u), Operand(x_rate));
x_rate = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1), bld.copy(bld.def(v1), Operand::zero()),
bld.copy(bld.def(v1), Operand::c32(4u)), cond);
/* yRate = yRate == 0x1 ? Vertical2Pixels : None. */
cond = bld.vopc(aco_opcode::v_cmp_eq_i32, bld.def(bld.lm), Operand::c32(1u), Operand(y_rate));
y_rate = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1), bld.copy(bld.def(v1), Operand::zero()),
bld.copy(bld.def(v1), Operand::c32(1u)), cond);
bld.vop2(aco_opcode::v_or_b32, Definition(dst), Operand(x_rate), Operand(y_rate));
}
void
visit_load_interpolated_input(isel_context* ctx, nir_intrinsic_instr* instr)
{
@ -8122,9 +8095,6 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr)
bld.copy(Definition(get_ssa_temp(ctx, &instr->def)), get_arg(ctx, ctx->args->front_face));
break;
}
case nir_intrinsic_load_frag_shading_rate:
emit_load_frag_shading_rate(ctx, get_ssa_temp(ctx, &instr->def));
break;
case nir_intrinsic_load_tess_coord: visit_load_tess_coord(ctx, instr); break;
case nir_intrinsic_load_interpolated_input: visit_load_interpolated_input(ctx, instr); break;
case nir_intrinsic_store_output: visit_store_output(ctx, instr); break;

1
src/amd/compiler/aco_instruction_selection_setup.cpp
View file

@ -557,7 +557,6 @@ init_context(isel_context* ctx, nir_shader* shader)
case nir_intrinsic_load_barycentric_at_offset:
case nir_intrinsic_load_interpolated_input:
case nir_intrinsic_load_front_face_fsign:
case nir_intrinsic_load_frag_shading_rate:
case nir_intrinsic_load_local_invocation_index:
case nir_intrinsic_load_subgroup_invocation:
case nir_intrinsic_load_tess_coord:

27
src/amd/llvm/ac_nir_to_llvm.c
View file

@ -2836,30 +2836,6 @@ static LLVMValueRef visit_load(struct ac_nir_context *ctx, nir_intrinsic_instr *
return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
}
static LLVMValueRef
emit_load_frag_shading_rate(struct ac_nir_context *ctx)
{
LLVMValueRef x_rate, y_rate, cond;
/* VRS Rate X = Ancillary[2:3]
* VRS Rate Y = Ancillary[4:5]
*/
x_rate = ac_unpack_param(&ctx->ac, ac_get_arg(&ctx->ac, ctx->args->ancillary), 2, 2);
y_rate = ac_unpack_param(&ctx->ac, ac_get_arg(&ctx->ac, ctx->args->ancillary), 4, 2);
/* xRate = xRate == 0x1 ? Horizontal2Pixels : None. */
cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, x_rate, ctx->ac.i32_1, "");
x_rate = LLVMBuildSelect(ctx->ac.builder, cond,
LLVMConstInt(ctx->ac.i32, 4, false), ctx->ac.i32_0, "");
/* yRate = yRate == 0x1 ? Vertical2Pixels : None. */
cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, y_rate, ctx->ac.i32_1, "");
y_rate = LLVMBuildSelect(ctx->ac.builder, cond,
ctx->ac.i32_1, ctx->ac.i32_0, "");
return LLVMBuildOr(ctx->ac.builder, x_rate, y_rate, "");
}
static bool visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *instr)
{
LLVMValueRef result = NULL;
@ -2956,9 +2932,6 @@ static bool visit_intrinsic(struct ac_nir_context *ctx, nir_intrinsic_instr *ins
} else
fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
break;
case nir_intrinsic_load_frag_shading_rate:
result = emit_load_frag_shading_rate(ctx);
break;
case nir_intrinsic_load_front_face:
result = emit_float_cmp(&ctx->ac, LLVMRealOLT, ctx->ac.f32_0,
ac_get_arg(&ctx->ac, ctx->args->front_face));