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asahi: do not NIH util_is_aligned

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Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38169>
This commit is contained in:
Alyssa Rosenzweig 2025-10-30 14:31:00 -04:00 • committed by Marge Bot
parent 5f53e6edc0
commit 6ac9bfdd1c
2 changed files with 14 additions and 28 deletions
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23
src/asahi/vulkan/hk_cmd_draw.c
View file

@ -465,13 +465,6 @@ hk_build_bg_eot(struct hk_cmd_buffer *cmd, const VkRenderingInfo *info,
return ret;
}
static bool
is_aligned(unsigned x, unsigned pot_alignment)
{
assert(util_is_power_of_two_nonzero(pot_alignment));
return (x & (pot_alignment - 1)) == 0;
}
static void
hk_merge_render_iview(struct hk_rendering_state *render,
struct hk_image_view *iview, bool zls)
@ -669,7 +662,7 @@ hk_CmdBeginRendering(VkCommandBuffer commandBuffer,
/* Main stride in pages */
assert((z_layout->depth_px == 1 ||
is_aligned(z_layout->layer_stride_B, AIL_PAGESIZE)) &&
util_is_aligned(z_layout->layer_stride_B, AIL_PAGESIZE)) &&
"Page aligned Z layers");
unsigned stride_pages = z_layout->layer_stride_B / AIL_PAGESIZE;
@ -684,9 +677,9 @@ hk_CmdBeginRendering(VkCommandBuffer commandBuffer,
z_layout->level_offsets_compressed_B[level];
/* Meta stride in cache lines */
assert(
is_aligned(z_layout->compression_layer_stride_B, AIL_CACHELINE) &&
"Cacheline aligned Z meta layers");
assert(util_is_aligned(z_layout->compression_layer_stride_B,
AIL_CACHELINE) &&
"Cacheline aligned Z meta layers");
unsigned stride_lines =
z_layout->compression_layer_stride_B / AIL_CACHELINE;
@ -721,7 +714,7 @@ hk_CmdBeginRendering(VkCommandBuffer commandBuffer,
/* Main stride in pages */
assert((s_layout->depth_px == 1 ||
is_aligned(s_layout->layer_stride_B, AIL_PAGESIZE)) &&
util_is_aligned(s_layout->layer_stride_B, AIL_PAGESIZE)) &&
"Page aligned S layers");
unsigned stride_pages = s_layout->layer_stride_B / AIL_PAGESIZE;
render->cr.stencil.stride = ((stride_pages - 1) << 14) | 1;
@ -733,9 +726,9 @@ hk_CmdBeginRendering(VkCommandBuffer commandBuffer,
s_layout->level_offsets_compressed_B[level];
/* Meta stride in cache lines */
assert(
is_aligned(s_layout->compression_layer_stride_B, AIL_CACHELINE) &&
"Cacheline aligned S meta layers");
assert(util_is_aligned(s_layout->compression_layer_stride_B,
AIL_CACHELINE) &&
"Cacheline aligned S meta layers");
unsigned stride_lines =
s_layout->compression_layer_stride_B / AIL_CACHELINE;

19
src/gallium/drivers/asahi/agx_pipe.c
View file

@ -1206,13 +1206,6 @@ agx_flush_resource(struct pipe_context *pctx, struct pipe_resource *pres)
}
}
static bool
is_aligned(unsigned x, unsigned pot_alignment)
{
assert(util_is_power_of_two_nonzero(pot_alignment));
return (x & (pot_alignment - 1)) == 0;
}
static unsigned
build_timestamp_offset(struct agx_batch *batch, unsigned offset)
{
@ -1284,7 +1277,7 @@ agx_cmdbuf(struct agx_device *dev, struct drm_asahi_cmd_render *c,
/* Main stride in pages */
assert((zres->layout.depth_px == 1 ||
is_aligned(zres->layout.layer_stride_B, AIL_PAGESIZE)) &&
util_is_aligned(zres->layout.layer_stride_B, AIL_PAGESIZE)) &&
"Page aligned Z layers");
unsigned stride_pages = zres->layout.layer_stride_B / AIL_PAGESIZE;
@ -1297,8 +1290,8 @@ agx_cmdbuf(struct agx_device *dev, struct drm_asahi_cmd_render *c,
zres->layout.level_offsets_compressed_B[level];
/* Meta stride in cache lines */
assert(is_aligned(zres->layout.compression_layer_stride_B,
AIL_CACHELINE) &&
assert(util_is_aligned(zres->layout.compression_layer_stride_B,
AIL_CACHELINE) &&
"Cacheline aligned Z meta layers");
unsigned stride_lines =
zres->layout.compression_layer_stride_B / AIL_CACHELINE;
@ -1322,7 +1315,7 @@ agx_cmdbuf(struct agx_device *dev, struct drm_asahi_cmd_render *c,
/* Main stride in pages */
assert((sres->layout.depth_px == 1 ||
is_aligned(sres->layout.layer_stride_B, AIL_PAGESIZE)) &&
util_is_aligned(sres->layout.layer_stride_B, AIL_PAGESIZE)) &&
"Page aligned S layers");
unsigned stride_pages = sres->layout.layer_stride_B / AIL_PAGESIZE;
c->stencil.stride = ((stride_pages - 1) << 14) | 1;
@ -1334,8 +1327,8 @@ agx_cmdbuf(struct agx_device *dev, struct drm_asahi_cmd_render *c,
sres->layout.level_offsets_compressed_B[level];
/* Meta stride in cache lines */
assert(is_aligned(sres->layout.compression_layer_stride_B,
AIL_CACHELINE) &&
assert(util_is_aligned(sres->layout.compression_layer_stride_B,
AIL_CACHELINE) &&
"Cacheline aligned S meta layers");
unsigned stride_lines =
sres->layout.compression_layer_stride_B / AIL_CACHELINE;