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ir3: Parse (eq) flag

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24433>
This commit is contained in:
Connor Abbott 2023-07-31 19:21:33 +02:00 • committed by Marge Bot
parent f22437654a
commit 6aabdb7a57
5 changed files with 20 additions and 13 deletions
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26
src/freedreno/ir3/ir3.h
View file

@ -313,24 +313,26 @@ typedef enum ir3_instruction_flags {
/* (jp) flag is set on jump targets:
*/
IR3_INSTR_JP = BIT(2),
IR3_INSTR_UL = BIT(3),
IR3_INSTR_3D = BIT(4),
IR3_INSTR_A = BIT(5),
IR3_INSTR_O = BIT(6),
IR3_INSTR_P = BIT(7),
IR3_INSTR_S = BIT(8),
IR3_INSTR_S2EN = BIT(9),
IR3_INSTR_SAT = BIT(10),
/* (eq) flag kills helper invocations when they are no longer needed */
IR3_INSTR_EQ = BIT(3),
IR3_INSTR_UL = BIT(4),
IR3_INSTR_3D = BIT(5),
IR3_INSTR_A = BIT(6),
IR3_INSTR_O = BIT(7),
IR3_INSTR_P = BIT(8),
IR3_INSTR_S = BIT(9),
IR3_INSTR_S2EN = BIT(10),
IR3_INSTR_SAT = BIT(11),
/* (cat5/cat6) Bindless */
IR3_INSTR_B = BIT(11),
IR3_INSTR_B = BIT(12),
/* (cat5/cat6) nonuniform */
IR3_INSTR_NONUNIF = BIT(12),
IR3_INSTR_NONUNIF = BIT(13),
/* (cat5-only) Get some parts of the encoding from a1.x */
IR3_INSTR_A1EN = BIT(13),
IR3_INSTR_A1EN = BIT(14),
/* meta-flags, for intermediate stages of IR, ie.
* before register assignment is done:
*/
IR3_INSTR_MARK = BIT(14),
IR3_INSTR_MARK = BIT(15),
IR3_INSTR_UNUSED = BIT(16),
} ir3_instruction_flags;

1
src/freedreno/ir3/ir3_lexer.l
View file

@ -122,6 +122,7 @@ static int parse_reg(const char *str)
"(neg_infinity)" return TOKEN(T_NEG_INFINITY);
"(ei)" return TOKEN(T_EI);
"(jp)" return TOKEN(T_JP);
"(eq)" return TOKEN(T_EQ_FLAG);
"(sat)" return TOKEN(T_SAT);
"(rpt"[0-7]")" ir3_yylval.num = strtol(yytext+4, NULL, 10); return T_RPT;
"(nop"[0-7]")" ir3_yylval.num = strtol(yytext+4, NULL, 10); return T_NOP;

2
src/freedreno/ir3/ir3_parser.y
View file

@ -373,6 +373,7 @@ static void print_token(FILE *file, int type, YYSTYPE value)
%token <tok> T_SY
%token <tok> T_SS
%token <tok> T_JP
%token <tok> T_EQ_FLAG
%token <tok> T_SAT
%token <num> T_RPT
%token <tok> T_UL
@ -805,6 +806,7 @@ tex_header: T_A_TEX '(' T_REGISTER ')'
iflag: T_SY { iflags.flags |= IR3_INSTR_SY; }
| T_SS { iflags.flags |= IR3_INSTR_SS; }
| T_JP { iflags.flags |= IR3_INSTR_JP; }
| T_EQ_FLAG { iflags.flags |= IR3_INSTR_EQ; }
| T_SAT { iflags.flags |= IR3_INSTR_SAT; }
| T_RPT { iflags.repeat = $1; }
| T_UL { iflags.flags |= IR3_INSTR_UL; }

1
src/freedreno/ir3/tests/disasm.c
View file

@ -64,6 +64,7 @@ static const struct test {
/* cat0 */
INSTR_6XX(00000000_00000000, "nop"),
INSTR_6XX(00000200_00000000, "(rpt2)nop"),
INSTR_6XX(00010000_00000000, "(eq)nop"),
INSTR_6XX(03000000_00000000, "end"),
INSTR_6XX(00800000_00000004, "br p0.x, #4"),
INSTR_6XX(00800000_fffffffc, "br p0.x, #-4"),

3
src/freedreno/isa/ir3-cat0.xml
View file

@ -49,6 +49,7 @@ SOFTWARE.
<map name="COMP2">src->cat0.comp2</map>
<map name="INV1">src->cat0.inv1</map>
<map name="INV2">src->cat0.inv2</map>
<map name="EQ">!!(src->flags &amp; IR3_INSTR_EQ)</map>
</encode>
</bitset>
@ -296,4 +297,4 @@ SOFTWARE.
<!-- TODO rest of cat0 -->
</isa>
</isa>