intel/compiler: store u_printf_info in prog_data

So that the driver can decode the printf buffer.

We're not going to use the NIR data directly from the driver
(Iris/Anv) because the late compile steps might want to add more
printfs.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25814>

src/intel/compiler/brw_compiler.c

@@ -320,3 +320,28 @@ brw_write_shader_relocs(const struct brw_isa_info *isa,
       }
    }
 }
+
+void
+brw_stage_prog_data_add_printf(struct brw_stage_prog_data *prog_data,
+                               void *mem_ctx,
+                               const u_printf_info *print)
+{
+   prog_data->printf_info_count++;
+   prog_data->printf_info = reralloc(mem_ctx, prog_data->printf_info,
+                                     u_printf_info,
+                                     prog_data->printf_info_count);
+
+   prog_data->printf_info[prog_data->printf_info_count - 1] = *print;
+   if (print->string_size > 0) {
+      prog_data->printf_info[prog_data->printf_info_count - 1].strings =
+         ralloc_size(mem_ctx, print->string_size);
+      memcpy(prog_data->printf_info[prog_data->printf_info_count - 1].strings,
+             print->strings, print->string_size);
+   }
+   if (print->num_args > 0) {
+      prog_data->printf_info[prog_data->printf_info_count - 1].arg_sizes =
+         ralloc_array(mem_ctx, __typeof__(*print->arg_sizes), print->num_args);
+      memcpy(prog_data->printf_info[prog_data->printf_info_count - 1].arg_sizes,
+             print->arg_sizes, sizeof(print->arg_sizes[0]) *print->num_args);
+   }
+}

src/intel/compiler/brw_compiler.h

@@ -33,6 +33,7 @@
 #include "util/enum_operators.h"
 #include "util/ralloc.h"
 #include "util/u_math.h"
+#include "util/u_printf.h"
 #include "brw_isa_info.h"
 #include "intel_shader_enums.h"
 
@@ -557,6 +558,10 @@ struct brw_stage_prog_data {
 
    /* Whether shader uses atomic operations. */
    bool uses_atomic_load_store;
+
+   /* Printf descriptions contained by the shader */
+   uint32_t printf_info_count;
+   u_printf_info *printf_info;
 };
 
 static inline uint32_t *
@@ -571,6 +576,11 @@ brw_stage_prog_data_add_params(struct brw_stage_prog_data *prog_data,
    return prog_data->param + old_nr_params;
 }
 
+void
+brw_stage_prog_data_add_printf(struct brw_stage_prog_data *prog_data,
+                               void *mem_ctx,
+                               const u_printf_info *print);
+
 enum brw_barycentric_mode {
    BRW_BARYCENTRIC_PERSPECTIVE_PIXEL       = 0,
    BRW_BARYCENTRIC_PERSPECTIVE_CENTROID    = 1,

src/intel/compiler/brw_fs_nir.cpp

@@ -8457,6 +8457,12 @@ nir_to_brw(fs_visitor *s)
       .bld     = fs_builder(s).at_end(),
    };
 
+   for (unsigned i = 0; i < s->nir->printf_info_count; i++) {
+      brw_stage_prog_data_add_printf(s->prog_data,
+                                     s->mem_ctx,
+                                     &s->nir->printf_info[i]);
+   }
+
    emit_shader_float_controls_execution_mode(ntb);
 
    /* emit the arrays used for inputs and outputs - load/store intrinsics will